From 023f1dd9275f19a97cfcace4ea224e594db063bc Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Mon, 30 Nov 2009 05:27:08 +0000 Subject: Whitespace removal. --- c/src/lib/libcpu/m68k/mcf5206/include/mcf5206e.h | 2 +- c/src/lib/libcpu/m68k/mcf5206/include/mcfuart.h | 6 ++--- c/src/lib/libcpu/m68k/mcf5206/timer/timerisr.S | 2 +- c/src/lib/libcpu/m68k/mcf5223x/cache/cachepd.c | 2 +- c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c | 4 ++-- c/src/lib/libcpu/m68k/mcf5235/include/mcf5235.h | 24 ++++++++++---------- c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c | 26 +++++++++++----------- c/src/lib/libcpu/m68k/mcf5272/include/mcf5272.h | 8 +++---- c/src/lib/libcpu/m68k/mcf5272/timer/timer.c | 10 ++++----- c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S | 2 +- c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c | 8 +++---- c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dma.h | 24 ++++++++++---------- c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dmaApi.c | 14 ++++++------ c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasks.c | 2 +- .../lib/libcpu/m68k/mcf548x/mcdma/MCD_tasksInit.c | 12 +++++----- c/src/lib/libcpu/m68k/mcf548x/mcdma/mcdma_glue.c | 4 ++-- 16 files changed, 75 insertions(+), 75 deletions(-) (limited to 'c') diff --git a/c/src/lib/libcpu/m68k/mcf5206/include/mcf5206e.h b/c/src/lib/libcpu/m68k/mcf5206/include/mcf5206e.h index 96c01b21a9..4f984a8740 100644 --- a/c/src/lib/libcpu/m68k/mcf5206/include/mcf5206e.h +++ b/c/src/lib/libcpu/m68k/mcf5206/include/mcf5206e.h @@ -582,7 +582,7 @@ #define MCF5206E_TMR_CE_NONE (0x0000) /* Disable Interrupt on capture event */ #define MCF5206E_TMR_OM (0x0020) /* Output Mode - Toggle output */ -#define MCF5206E_TMR_ORI (0x0010) /* Output Reference Interrupt +#define MCF5206E_TMR_ORI (0x0010) /* Output Reference Interrupt Enable */ #define MCF5206E_TMR_FRR (0x0008) /* Free Run/Restart */ #define MCF5206E_TMR_ICLK (0x0006) /* Input Clock Source */ diff --git a/c/src/lib/libcpu/m68k/mcf5206/include/mcfuart.h b/c/src/lib/libcpu/m68k/mcf5206/include/mcfuart.h index d7ef61289d..7ad1de2935 100644 --- a/c/src/lib/libcpu/m68k/mcf5206/include/mcfuart.h +++ b/c/src/lib/libcpu/m68k/mcf5206/include/mcfuart.h @@ -27,7 +27,7 @@ #define SYSTEM_CLOCK_FREQUENCY BSP_SYSTEM_FREQUENCY #endif -/* +/* * The following structure is a descriptor of single UART channel. * It contains the initialization information about channel and * current operating values @@ -37,12 +37,12 @@ typedef struct mcfuart { uint8_t intvec; /* UART interrupt vector number, or 0 if polled I/O */ void *tty; /* termios channel descriptor */ - + volatile const uint8_t *tx_buf; /* Transmit buffer from termios */ volatile uint32_t tx_buf_len; /* Transmit buffer length */ volatile uint32_t tx_ptr; /* Index of next char to transmit*/ rtems_isr_entry old_handler; /* Saved interrupt handler */ - + tcflag_t c_iflag; /* termios input mode flags */ bool parerr_mark_flag; /* Parity error processing state */ diff --git a/c/src/lib/libcpu/m68k/mcf5206/timer/timerisr.S b/c/src/lib/libcpu/m68k/mcf5206/timer/timerisr.S index f9d693e1ed..8fcb619857 100644 --- a/c/src/lib/libcpu/m68k/mcf5206/timer/timerisr.S +++ b/c/src/lib/libcpu/m68k/mcf5206/timer/timerisr.S @@ -27,7 +27,7 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/c/src/lib/libcpu/m68k/mcf5223x/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf5223x/cache/cachepd.c index 549c3e81bd..28da66b85c 100644 --- a/c/src/lib/libcpu/m68k/mcf5223x/cache/cachepd.c +++ b/c/src/lib/libcpu/m68k/mcf5223x/cache/cachepd.c @@ -5,7 +5,7 @@ * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ diff --git a/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c index 361cfa1bfc..e806bdd733 100644 --- a/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c +++ b/c/src/lib/libcpu/m68k/mcf5235/cache/cachepd.c @@ -6,13 +6,13 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * $Id$ */ #include #include - + /* * Default value for the cacr is set by the BSP */ diff --git a/c/src/lib/libcpu/m68k/mcf5235/include/mcf5235.h b/c/src/lib/libcpu/m68k/mcf5235/include/mcf5235.h index 7bec837d84..fd81a1bb47 100644 --- a/c/src/lib/libcpu/m68k/mcf5235/include/mcf5235.h +++ b/c/src/lib/libcpu/m68k/mcf5235/include/mcf5235.h @@ -158,7 +158,7 @@ typedef volatile uint32 vuint32; /* 32 bits */ /* * Functions provided by mcf5xxx.s */ - + int asm_set_ipl (uint32); void mcf5xxx_wr_cacr (uint32); void mcf5xxx_wr_acr0 (uint32); @@ -862,16 +862,16 @@ extern uint8 __IPSBAR[]; #define MCF5235_CAN_MBUF1_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C009C+((x)*0x30000)])) #define MCF5235_CAN_MBUF2_DATAL(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00A8+((x)*0x30000)])) #define MCF5235_CAN_MBUF2_DATAH(x) (*(vuint32 *)(void *)(&__IPSBAR[0x1C00AC+((x)*0x30000)])) - - -/* Bit definitions and macros for MCF5235_CAN_CANMCR */ -#define MCF5235_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) -#define MCF5235_CAN_CANMCR_SUPV (0x00800000) -#define MCF5235_CAN_CANMCR_FRZACK (0x01000000) -#define MCF5235_CAN_CANMCR_SOFTRST (0x02000000) -#define MCF5235_CAN_CANMCR_HALT (0x10000000) -#define MCF5235_CAN_CANMCR_FRZ (0x40000000) -#define MCF5235_CAN_CANMCR_MDIS (0x80000000) + + +/* Bit definitions and macros for MCF5235_CAN_CANMCR */ +#define MCF5235_CAN_CANMCR_MAXMB(x) (((x)&0x0000000F)<<0) +#define MCF5235_CAN_CANMCR_SUPV (0x00800000) +#define MCF5235_CAN_CANMCR_FRZACK (0x01000000) +#define MCF5235_CAN_CANMCR_SOFTRST (0x02000000) +#define MCF5235_CAN_CANMCR_HALT (0x10000000) +#define MCF5235_CAN_CANMCR_FRZ (0x40000000) +#define MCF5235_CAN_CANMCR_MDIS (0x80000000) #define MCF5235_CAN_CANCTRL_PROPSEG(x) (((x)&0x00000007)<<0) #define MCF5235_CAN_CANCTRL_LOM (0x00000008) #define MCF5235_CAN_CANCTRL_LBUF (0x00000010) @@ -1737,7 +1737,7 @@ extern uint8 __IPSBAR[]; /************************************************************ * -* Clock +* Clock *************************************************************/ /* Register read/write macros */ #define MCF5235_FMPLL_SYNCR (*(vuint32*)(void*)(&__IPSBAR[0x120000])) diff --git a/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c b/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c index 0de4c75d97..1fd2853452 100644 --- a/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c +++ b/c/src/lib/libcpu/m68k/mcf5272/clock/ckinit.c @@ -1,8 +1,8 @@ /* * Clock Driver for MCF5272 CPU * - * This driver initailizes timer1 on the MCF5272 as the - * main system clock + * This driver initailizes timer1 on the MCF5272 as the + * main system clock * * Copyright 2004 Cogent Computer Systems * Author: Jay Monkman @@ -40,7 +40,7 @@ volatile uint32_t Clock_driver_ticks; /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -52,7 +52,7 @@ rtems_isr (*rtems_clock_hook)(rtems_vector_number) = NULL; * * PARAMETERS: * vector - timer interrupt vector number - + * RETURNS: * none */ @@ -91,10 +91,10 @@ Clock_exit(void) icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); icr |= (MCF5272_ICR1_TMR1_IPL(0) | MCF5272_ICR1_TMR1_PI); g_intctrl_regs->icr1 = icr; - + /* reset timer1 */ g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; - + /* clear pending */ g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; } @@ -117,17 +117,17 @@ Install_clock(rtems_isr_entry clock_isr) uint32_t icr; Clock_driver_ticks = 0; if (rtems_configuration_get_ticks_per_timeslice()) { - + /* Register the interrupt handler */ set_vector(clock_isr, BSP_INTVEC_TMR1, 1); - + /* Reset timer 1 */ g_timer_regs->tmr1 = MCF5272_TMR_RST; g_timer_regs->tmr1 = MCF5272_TMR_CLK_STOP; g_timer_regs->tmr1 = MCF5272_TMR_RST; g_timer_regs->tcn1 = 0; /* reset counter */ g_timer_regs->ter1 = MCF5272_TER_REF | MCF5272_TER_CAP; - + /* Set Timer 1 prescaler so that it counts in microseconds */ g_timer_regs->tmr1 = ( ((((BSP_SYSTEM_FREQUENCY / 1000000) - 1) << MCF5272_TMR_PS_SHIFT) | @@ -137,12 +137,12 @@ Install_clock(rtems_isr_entry clock_isr) MCF5272_TMR_CLK_MSTR | MCF5272_TMR_RST)); - /* Set the timer timeout value from the BSP config */ + /* Set the timer timeout value from the BSP config */ g_timer_regs->trr1 = rtems_configuration_get_microseconds_per_tick() - 1; /* Feed system frequency to the timer */ g_timer_regs->tmr1 |= MCF5272_TMR_CLK_MSTR; - + /* Configure timer1 interrupts */ icr = g_intctrl_regs->icr1; icr = icr & ~(MCF5272_ICR1_TMR1_MASK | MCF5272_ICR1_TMR1_PI); @@ -174,10 +174,10 @@ Clock_initialize(rtems_device_major_number major, void *pargp) { Install_clock (Clock_isr); - + /* Make major/minor avail to others such as shared memory driver */ rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } diff --git a/c/src/lib/libcpu/m68k/mcf5272/include/mcf5272.h b/c/src/lib/libcpu/m68k/mcf5272/include/mcf5272.h index 8b5707de14..87cc9229d0 100644 --- a/c/src/lib/libcpu/m68k/mcf5272/include/mcf5272.h +++ b/c/src/lib/libcpu/m68k/mcf5272/include/mcf5272.h @@ -281,7 +281,7 @@ typedef struct { volatile uint16_t _res3; volatile uint16_t pbdat; - volatile uint16_t pcddr; + volatile uint16_t pcddr; volatile uint16_t _res4; volatile uint16_t _res5; @@ -321,7 +321,7 @@ typedef struct { typedef struct { volatile uint32_t dcmr; - + volatile uint16_t _res0; volatile uint16_t dcir; @@ -586,12 +586,12 @@ typedef struct { volatile uint16_t rfmr; volatile uint16_t _res3; volatile uint16_t rfmmr; - volatile uint8_t _res4[3]; + volatile uint8_t _res4[3]; volatile uint8_t far; volatile uint32_t asr; volatile uint32_t drr1; volatile uint32_t drr2; - volatile uint16_t _res5; + volatile uint16_t _res5; volatile uint16_t specr; volatile uint16_t _res6; volatile uint16_t ep0sr; diff --git a/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c b/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c index 6eaadfcc23..02f6e17f59 100644 --- a/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c +++ b/c/src/lib/libcpu/m68k/mcf5272/timer/timer.c @@ -18,7 +18,7 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * timer.c,v 1.1 2001/10/26 19:32:40 joel Exp */ @@ -26,7 +26,7 @@ #include #include -#define TRR2_VAL 65530 +#define TRR2_VAL 65530 uint32_t Timer_interrupts; @@ -51,7 +51,7 @@ benchmark_timer_initialize(void) uint32_t icr; /* Catch timer2 interrupts */ set_vector(timerisr, BSP_INTVEC_TMR2, 0); - + /* Reset Timer */ g_timer_regs->tmr2 = MCF5272_TMR_RST; g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP; @@ -116,12 +116,12 @@ benchmark_timer_read( void ) * rolled over. */ clicks = g_timer_regs->tcn2; - + /* Stop Timer... */ g_timer_regs->tmr2 = MCF5272_TMR_CLK_STOP | MCF5272_TMR_RST; /* - * Total is calculated by taking into account the number of timer + * Total is calculated by taking into account the number of timer * overflow interrupts since the timer was initialized and clicks * since the last interrupts. */ diff --git a/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S b/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S index 66519623f2..5834a47bac 100644 --- a/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S +++ b/c/src/lib/libcpu/m68k/mcf5272/timer/timerisr.S @@ -27,7 +27,7 @@ * found in the file LICENSE in this distribution or at * * http://www.rtems.com/license/LICENSE. - * + * * timerisr.S,v 1.1 2001/10/26 19:32:40 joel Exp */ diff --git a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c index f37117fb7b..acf88ab4ee 100644 --- a/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c +++ b/c/src/lib/libcpu/m68k/mcf532x/cache/cachepd.c @@ -47,13 +47,13 @@ void _CPU_cache_flush_1_data_line(const void *d_addr) adr += 1; asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); adr += 1; - asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); + asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); } void _CPU_cache_flush_entire_data(void) { register unsigned long set, adr; - + for(set = 0; set < 256; ++set) { adr = (set << 4); asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); @@ -62,7 +62,7 @@ void _CPU_cache_flush_entire_data(void) adr += 1; asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); adr += 1; - asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); + asm volatile ("cpushl %%bc,(%0)" :: "a" (adr)); } } @@ -136,4 +136,4 @@ void _CPU_cache_invalidate_entire_data(void) void _CPU_cache_invalidate_1_data_line(const void *addr) { _CPU_cache_invalidate_1_instruction_line(addr); -} +} diff --git a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dma.h b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dma.h index 54529b696a..ea6f8863cb 100644 --- a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dma.h +++ b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dma.h @@ -294,53 +294,53 @@ int MCD_startDma ( u32 funcDesc /* a description of byte swapping, bit swapping, and CRC actions */ ); -/* - * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA - * registers, relocating and creating the appropriate task structures, and +/* + * MCD_initDma() initializes the DMA API by setting up a pointer to the DMA + * registers, relocating and creating the appropriate task structures, and * setting up some global settings */ int MCD_initDma (dmaRegs *sDmaBarAddr, void *taskTableDest, u32 flags); -/* +/* * MCD_dmaStatus() returns the status of the DMA on the requested channel. */ int MCD_dmaStatus (int channel); -/* +/* * MCD_XferProgrQuery() returns progress of DMA on requested channel */ int MCD_XferProgrQuery (int channel, MCD_XferProg *progRep); -/* +/* * MCD_killDma() halts the DMA on the requested channel, without any * intention of resuming the DMA. */ int MCD_killDma (int channel); -/* +/* * MCD_continDma() continues a DMA which as stopped due to encountering an * unready buffer descriptor. */ int MCD_continDma (int channel); -/* +/* * MCD_pauseDma() pauses the DMA on the given channel ( if any DMA is - * running on that channel). + * running on that channel). */ int MCD_pauseDma (int channel); -/* +/* * MCD_resumeDma() resumes the DMA on a given channel (if any DMA is * running on that channel). */ int MCD_resumeDma (int channel); -/* +/* * MCD_csumQuery provides the checksum/CRC after performing a non-chained DMA */ int MCD_csumQuery (int channel, u32 *csum); -/* +/* * MCD_getCodeSize provides the packed size required by the microcoded task * and structures. */ diff --git a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dmaApi.c b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dmaApi.c index 839fce1526..c3489c6b66 100644 --- a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dmaApi.c +++ b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_dmaApi.c @@ -246,9 +246,9 @@ int MCD_initDma (dmaRegs *dmaBarAddr, void *taskTableDest, u32 flags) entryPtr[i].TDTend = (u32)taskDescTabsOffset - 4; } #ifdef MCD_INCLUDE_EU /* Tack single DMA BDs onto end of code so API controls - where they are since DMA might write to them */ + where they are since DMA might write to them */ MCD_relocBuffDesc = (MCD_bufDesc*)(entryPtr[NUMOFVARIANTS - 1].TDTend + 4); -#else /* DMA does not touch them so they can be wherever and we don't need to +#else /* DMA does not touch them so they can be wherever and we don't need to waste SRAM on them */ MCD_relocBuffDesc = MCD_singleBufDescs; #endif @@ -379,14 +379,14 @@ int MCD_startDma ( if((channel < 0) || (channel >= NCHANNELS)) return(MCD_CHANNEL_INVALID); - - /* tbd - need to determine the proper response to a bad funcDesc when not + + /* tbd - need to determine the proper response to a bad funcDesc when not including EU functions, for now, assign a benign funcDesc, but maybe should return an error */ #ifndef MCD_INCLUDE_EU funcDesc = MCD_FUNC_NOEU1; #endif - + #ifdef MCD_DEBUG printf("startDma:Setting up params\n"); #endif @@ -562,7 +562,7 @@ printf("startDma:Setting up params\n"); * Notes: * MCD_XferProgrQuery() upon completing or after aborting a DMA, or * while the DMA is in progress, this function returns the first - * DMA-destination address not (or not yet) used in the DMA. When + * DMA-destination address not (or not yet) used in the DMA. When * encountering a non-ready buffer descriptor, the information for * the last completed descriptor is returned. * @@ -808,7 +808,7 @@ int MCD_continDma (int channel) * this means that bits 14 and 0 must enable debug functions before * bits 1 and 2, respectively, have any effect. * - * NOTE: It's extremely important to not pause more than one DMA channel + * NOTE: It's extremely important to not pause more than one DMA channel * at a time. ********************************************************************/ diff --git a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasks.c b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasks.c index 76e8e37805..b184d099a1 100644 --- a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasks.c +++ b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasks.c @@ -1982,7 +1982,7 @@ u32 MCD_modelTaskTableSrc[]= 0x00000000, 0x00000000, 0x00000000, -#endif +#endif (u32)MCD_ENetRcv_TDT, (u32)&((u8*)MCD_ENetRcv_TDT)[0x0000009c], 0x00000000, diff --git a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasksInit.c b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasksInit.c index fd651b27ac..7b1761b88c 100644 --- a/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasksInit.c +++ b/c/src/lib/libcpu/m68k/mcf548x/mcdma/MCD_tasksInit.c @@ -18,7 +18,7 @@ extern dmaRegs *MCD_dmaBar; /* * Task 0 */ - + void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) { @@ -55,7 +55,7 @@ void MCD_startDmaChainNoEu(int *currBD, short srcIncr, short destIncr, int xfer /* * Task 1 */ - + void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) { @@ -85,7 +85,7 @@ void MCD_startDmaSingleNoEu(char *srcAddr, short srcIncr, char *destAddr, short /* * Task 2 */ - + void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSize, short xferSizeIncr, int *cSave, volatile TaskTableEntry *taskTable, int channel) { @@ -125,7 +125,7 @@ void MCD_startDmaChainEu(int *currBD, short srcIncr, short destIncr, int xferSi /* * Task 3 */ - + void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short destIncr, int dmaSize, short xferSizeIncr, int flags, int *currBD, int *cSave, volatile TaskTableEntry *taskTable, int channel) { @@ -159,7 +159,7 @@ void MCD_startDmaSingleEu(char *srcAddr, short srcIncr, char *destAddr, short d /* * Task 4 */ - + void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile TaskTableEntry *taskTable, int channel) { @@ -189,7 +189,7 @@ void MCD_startDmaENetRcv(char *bDBase, char *currBD, char *rcvFifoPtr, volatile /* * Task 5 */ - + void MCD_startDmaENetXmit(char *bDBase, char *currBD, char *xmitFifoPtr, volatile TaskTableEntry *taskTable, int channel) { diff --git a/c/src/lib/libcpu/m68k/mcf548x/mcdma/mcdma_glue.c b/c/src/lib/libcpu/m68k/mcf548x/mcdma/mcdma_glue.c index a5c45c5445..193d7bb2bc 100644 --- a/c/src/lib/libcpu/m68k/mcf548x/mcdma/mcdma_glue.c +++ b/c/src/lib/libcpu/m68k/mcf548x/mcdma/mcdma_glue.c @@ -216,10 +216,10 @@ void mcdma_glue_init &old_handler)) { rtems_panic ("Can't attach MFC548x MCDma interrupt handler\n"); } - MCF548X_INTC_ICRn(MCDMA_IRQ_VECTOR - 64) = + MCF548X_INTC_ICRn(MCDMA_IRQ_VECTOR - 64) = MCF548X_INTC_ICRn_IL(MCDMA_IRQ_LEVEL) | MCF548X_INTC_ICRn_IP(MCDMA_IRQ_PRIORITY); - + MCF548X_INTC_IMRH &= ~(1 << (MCDMA_IRQ_VECTOR % 32)); } } -- cgit v1.2.3