From f4b7e2971038a736c72cdca78e32906dea516fca Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 2 Dec 1996 19:43:22 +0000 Subject: Update from Chris Johns to add better support for 68000 class CPUs. --- c/src/exec/score/cpu/m68k/cpu.c | 22 +++++++++++++++++++--- c/src/exec/score/cpu/m68k/cpu.h | 33 ++++++++++++++++++++++++++++++--- c/src/exec/score/cpu/m68k/cpu_asm.s | 23 +++++++---------------- 3 files changed, 56 insertions(+), 22 deletions(-) (limited to 'c/src') diff --git a/c/src/exec/score/cpu/m68k/cpu.c b/c/src/exec/score/cpu/m68k/cpu.c index f57fae6685..1c43c23379 100644 --- a/c/src/exec/score/cpu/m68k/cpu.c +++ b/c/src/exec/score/cpu/m68k/cpu.c @@ -31,6 +31,21 @@ void _CPU_Initialize( void (*thread_dispatch) /* ignored on this CPU */ ) { +#if ( M68K_HAS_VBR == 0 ) + /* fill the isr redirect table with the code to place the format/id + onto the stack */ + + unsigned32 slot; + + for (slot = 0; slot < CPU_INTERRUPT_NUMBER_OF_VECTORS; slot++) + { + _CPU_ISR_jump_table[slot].move_a7 = M68K_MOVE_A7; + _CPU_ISR_jump_table[slot].format_id = slot << 2; + _CPU_ISR_jump_table[slot].jmp = M68K_JMP; + _CPU_ISR_jump_table[slot].isr_handler = (unsigned32) 0xDEADDEAD; + } +#endif /* M68K_HAS_VBR */ + _CPU_Table = *cpu_table; } @@ -63,12 +78,13 @@ void _CPU_ISR_install_raw_handler( m68k_get_vbr( interrupt_table ); -#if ( M68K_HAS_VBR == 1) *old_handler = interrupt_table[ vector ]; + +#if ( M68K_HAS_VBR == 1 ) interrupt_table[ vector ] = new_handler; #else - *old_handler = *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10); - *(proc_ptr *)( (int)interrupt_table+ (int)vector*6-10) = new_handler; + _CPU_ISR_jump_table[vector].isr_handler = (unsigned32) new_handler; + interrupt_table[ vector ] = (proc_ptr) &_CPU_ISR_jump_table[vector]; #endif /* M68K_HAS_VBR */ } diff --git a/c/src/exec/score/cpu/m68k/cpu.h b/c/src/exec/score/cpu/m68k/cpu.h index 59f8d3d4b7..48caa7a0d7 100644 --- a/c/src/exec/score/cpu/m68k/cpu.h +++ b/c/src/exec/score/cpu/m68k/cpu.h @@ -139,10 +139,37 @@ typedef struct { /* variables */ -SCORE_EXTERN void *_CPU_Interrupt_stack_low; -SCORE_EXTERN void *_CPU_Interrupt_stack_high; +SCORE_EXTERN void *_CPU_Interrupt_stack_low; +SCORE_EXTERN void *_CPU_Interrupt_stack_high; + +extern char _VBR[]; + +#if ( M68K_HAS_VBR == 0 ) + +/* + * Table of ISR handler entries that resides in RAM. The FORMAT/ID is + * pushed onto the stack. This is not is the same order as VBR processors. + * The ISR handler takes the format and uses it for dispatching the user + * handler. + * + * FIXME : should be moved to below CPU_INTERRUPT_NUMBER_OF_VECTORS + * + */ + +typedef struct { + unsigned16 move_a7; /* move #FORMAT_ID,%a7@- */ + unsigned16 format_id; + unsigned16 jmp; /* jmp _ISR_Handlers */ + unsigned32 isr_handler; +} _CPU_ISR_handler_entry; + +#define M68K_MOVE_A7 0x3F3C +#define M68K_JMP 0x4EF9 + /* points to jsr-exception-table in targets wo/ VBR register */ -extern char _VBR[]; +SCORE_EXTERN _CPU_ISR_handler_entry _CPU_ISR_jump_table[256]; + +#endif /* M68K_HAS_VBR */ /* constants */ diff --git a/c/src/exec/score/cpu/m68k/cpu_asm.s b/c/src/exec/score/cpu/m68k/cpu_asm.s index 8cce6e5ca5..255aeb23f7 100644 --- a/c/src/exec/score/cpu/m68k/cpu_asm.s +++ b/c/src/exec/score/cpu/m68k/cpu_asm.s @@ -122,9 +122,9 @@ norst: frestore a0@+ | restore the fp state frame .set PC_OFFSET, 2 | Program Counter offset .set FVO_OFFSET, 6 | Format/vector offset #else -.set JSR_OFFSET, 0 | return address from jsr table -.set SR_OFFSET, 4 -.set PC_OFFSET, 6 +.set SR_OFFSET, 2 | Status register offset +.set PC_OFFSET, 4 | Program Counter offset +.set FVO_OFFSET, 0 | Format/vector offset placed in the stack #endif /* M68K_HAS_VBR */ .set SAVED, 16 | space for saved registers @@ -144,17 +144,8 @@ SYM (_ISR_Handler): * to switch to the software maintained interrupt stack. */ -#if ( M68K_HAS_VBR == 0) - movel a7@(SAVED+JSR_OFFSET),d0 | assume the exception table at 0x0000 - addql #6,d0 | points to a jump table (jsr) in RAM - subl #_VBR,d0 | VBR is the location of the jump table - divs #3,d0 - lsll #1,d0 - extl d0 -#else movew a7@(SAVED+FVO_OFFSET),d0 | d0 = F/VO andl #0x0fff,d0 | d0 = vector offset in vbr -#endif #if ( M68K_HAS_PREINDEXING == 1 ) movel @( SYM (_ISR_Vector_table),d0:w:1),a0| fetch the ISR @@ -212,8 +203,8 @@ bframe: clrl SYM (_ISR_Signals_to_thread_executing) #endif exit: moveml a7@+,d0-d1/a0-a1 | restore d0-d1,a0-a1 -#if ( M68K_HAS_VBR == 0) - addql #4,a7 | pop vector address +#if ( M68K_HAS_VBR == 0 ) + addql #2,a7 | pop format/id #endif /* M68K_HAS_VBR */ rte | return to thread | OR _Isr_dispatch @@ -237,7 +228,7 @@ SYM (_ISR_Dispatch): movml d0-d1/a0-a1,a7@- jsr SYM (_Thread_Dispatch) movml a7@+,d0-d1/a0-a1 -#if ( M68K_HAS_VBR == 0) - addql #4,a7 | pop vector address +#if ( M68K_HAS_VBR == 0 ) + addql #2,a7 | pop format/id #endif /* M68K_HAS_VBR */ rte -- cgit v1.2.3