From ae21568caad6d15e32611f5550d85e02d7053fcc Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Tue, 23 Jun 1998 17:40:00 +0000
Subject: New file describing mc68681 libchip driver.

---
 c/src/lib/libchip/serial/README.mc68681 | 39 +++++++++++++++++++++++++++++++++
 c/src/libchip/serial/README.mc68681     | 39 +++++++++++++++++++++++++++++++++
 2 files changed, 78 insertions(+)
 create mode 100644 c/src/lib/libchip/serial/README.mc68681
 create mode 100644 c/src/libchip/serial/README.mc68681

(limited to 'c/src')

diff --git a/c/src/lib/libchip/serial/README.mc68681 b/c/src/lib/libchip/serial/README.mc68681
new file mode 100644
index 0000000000..4364dac5d5
--- /dev/null
+++ b/c/src/lib/libchip/serial/README.mc68681
@@ -0,0 +1,39 @@
+#
+#  $Id$
+#
+
+Configuration Table Use
+=======================
+
+pDeviceFlow
+
+   This field is ignored as hardware flow control is not currently supported.
+
+ulCtrlPort1
+
+   This field is the base address of the entire DUART.
+
+ulCtrlPort2
+
+   This field is the base address of the port specific registers.
+
+ulDataPort
+
+   This field is bit mapped as follows:
+     bit 0:  0 or 1 to indicate the A or B port on the DUART.
+     bit 1:  baud rate set a or b
+ 
+
+   Note: If both ports on single DUART are not configured for the same
+         baud rate set, then unexpected results will occur.
+
+getRegister
+setRegister
+   These follow standard conventions.
+
+getData
+setData
+   These are unused since the TX and RX data registers can be accessed
+   as regular registers.
+
+
diff --git a/c/src/libchip/serial/README.mc68681 b/c/src/libchip/serial/README.mc68681
new file mode 100644
index 0000000000..4364dac5d5
--- /dev/null
+++ b/c/src/libchip/serial/README.mc68681
@@ -0,0 +1,39 @@
+#
+#  $Id$
+#
+
+Configuration Table Use
+=======================
+
+pDeviceFlow
+
+   This field is ignored as hardware flow control is not currently supported.
+
+ulCtrlPort1
+
+   This field is the base address of the entire DUART.
+
+ulCtrlPort2
+
+   This field is the base address of the port specific registers.
+
+ulDataPort
+
+   This field is bit mapped as follows:
+     bit 0:  0 or 1 to indicate the A or B port on the DUART.
+     bit 1:  baud rate set a or b
+ 
+
+   Note: If both ports on single DUART are not configured for the same
+         baud rate set, then unexpected results will occur.
+
+getRegister
+setRegister
+   These follow standard conventions.
+
+getData
+setData
+   These are unused since the TX and RX data registers can be accessed
+   as regular registers.
+
+
-- 
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