From 981b99faf208e2c7f6e2b83d73e1b89b669112ee Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 10 Aug 1999 16:41:44 +0000 Subject: Patch from Eric Valette and Emmanuel Raguet : - the dec21140 driver code has been hardened (various bug fixed) Emmanuel, - bug in the mcp750 init code have been fixed (interrupt stack/initial stack initialization), BSS correctly cleared (Eric V) - remote debugging over TCP/IP is nearly complete (berakpoints, backtrace, variables,...) (Eric V), - exception handling code has also been improved in order to fully support RDBG requirements (Eric V), --- c/src/librdbg/src/powerpc/Makefile.in | 25 +++ c/src/librdbg/src/powerpc/excep_f.c | 167 +++++++++++++++++++++ c/src/librdbg/src/powerpc/mcp750/Makefile.in | 114 ++++++++++++++ c/src/librdbg/src/powerpc/mcp750/remdeb_f.x | 76 ++++++++++ .../powerpc/new_exception_processing/remdeb_f.x | 76 ++++++++++ c/src/librdbg/src/powerpc/rdbg_cpu_asm.S | 82 ++++++++++ c/src/librdbg/src/powerpc/rdbg_f.c | 156 +++++++++++++++++++ 7 files changed, 696 insertions(+) create mode 100644 c/src/librdbg/src/powerpc/Makefile.in create mode 100644 c/src/librdbg/src/powerpc/excep_f.c create mode 100644 c/src/librdbg/src/powerpc/mcp750/Makefile.in create mode 100644 c/src/librdbg/src/powerpc/mcp750/remdeb_f.x create mode 100644 c/src/librdbg/src/powerpc/new_exception_processing/remdeb_f.x create mode 100644 c/src/librdbg/src/powerpc/rdbg_cpu_asm.S create mode 100644 c/src/librdbg/src/powerpc/rdbg_f.c (limited to 'c/src/librdbg/src/powerpc') diff --git a/c/src/librdbg/src/powerpc/Makefile.in b/c/src/librdbg/src/powerpc/Makefile.in new file mode 100644 index 0000000000..e65ded9381 --- /dev/null +++ b/c/src/librdbg/src/powerpc/Makefile.in @@ -0,0 +1,25 @@ +# +# $Id$ +# + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../.. +subdir = librdbg/powerpc + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@ + +include $(RTEMS_ROOT)/make/custom/${RTEMS_BSP}.cfg +include $(RTEMS_ROOT)/make/directory.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ + +SUB_DIRS = @RTEMS_BSP@ + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/librdbg/src/powerpc/excep_f.c b/c/src/librdbg/src/powerpc/excep_f.c new file mode 100644 index 0000000000..273a050d23 --- /dev/null +++ b/c/src/librdbg/src/powerpc/excep_f.c @@ -0,0 +1,167 @@ +/* + ************************************************************************** + * + * Component = + * + * Synopsis = rdbg/powerpc/excep_f.c + * + * $Id$ + * + ************************************************************************** + */ + +#include +#include +#include +#include +#include +#include + + int +ExcepToSig (Exception_context *ctx) +{ + int excep = getExcNum (ctx); + + switch (excep) { + case ASM_FLOAT_VECTOR : return SIGFPE; + + case ASM_TRACE_VECTOR : + case ASM_SYS_VECTOR : return SIGTRAP; + + case ASM_ISI_VECTOR : return SIGSEGV; + + case ASM_PROG_VECTOR : + case ASM_RESET_VECTOR : + case ASM_MACH_VECTOR : + case ASM_EXT_VECTOR : + case ASM_ALIGN_VECTOR : return SIGILL; + + default: + break; + } + return SIGKILL; +} + + +/*----- Breakpoint Exception management -----*/ + + /* + * Handler for Breakpoint Exceptions : + * software breakpoints. + */ + +void +BreakPointExcHdl(CPU_Exception_frame *ctx) +{ + rtems_status_code status; + rtems_id continueSemId; + + if ( (justSaveContext) && (ctx->_EXC_number == ASM_SYS_VECTOR) ) { + PushSavedExceptCtx (_Thread_Executing->Object.id, ctx); + justSaveContext = 0; + } + else { + if (ctx->_EXC_number != ASM_TRACE_VECTOR){ + NbSerializedCtx++; + rtems_semaphore_obtain(serializeSemId, RTEMS_WAIT, RTEMS_NO_TIMEOUT); + NbSerializedCtx--; + } + + currentTargetThread = _Thread_Executing->Object.id; + +#ifdef DDEBUG + printk("----------------------------------------------------------\n"); + printk("Exception %d caught at PC %x by thread %d\n", + ctx->_EXC_number, + ctx->EXC_SRR0, + _Thread_Executing->Object.id); + printk("----------------------------------------------------------\n"); + printk("Processor execution context at time of the fault was :\n"); + printk("----------------------------------------------------------\n"); + printk("\t R0 = %x\n", ctx->GPR0); + printk("\t R1 = %x\n", ctx->GPR1); + printk("\t R2 = %x\n", ctx->GPR2); + printk("\t R3 = %x\n", ctx->GPR3); + printk("\t R4 = %x\n", ctx->GPR4); + printk("\t R5 = %x\n", ctx->GPR5); + printk("\t R6 = %x\n", ctx->GPR6); + printk("\t R7 = %x\n", ctx->GPR7); + printk("\t R8 = %x\n", ctx->GPR8); + printk("\t R9 = %x\n", ctx->GPR9); + printk("\t R10 = %x\n", ctx->GPR10); + printk("\t R11 = %x\n", ctx->GPR11); + printk("\t R12 = %x\n", ctx->GPR12); + printk("\t R13 = %x\n", ctx->GPR13); + printk("\t R14 = %x\n", ctx->GPR14); + printk("\t R15 = %x\n", ctx->GPR15); + printk("\t R16 = %x\n", ctx->GPR16); + printk("\t R17 = %x\n", ctx->GPR17); + printk("\t R18 = %x\n", ctx->GPR18); + printk("\t R19 = %x\n", ctx->GPR19); + printk("\t R20 = %x\n", ctx->GPR20); + printk("\t R21 = %x\n", ctx->GPR21); + printk("\t R22 = %x\n", ctx->GPR22); + printk("\t R23 = %x\n", ctx->GPR23); + printk("\t R24 = %x\n", ctx->GPR24); + printk("\t R25 = %x\n", ctx->GPR25); + printk("\t R26 = %x\n", ctx->GPR26); + printk("\t R27 = %x\n", ctx->GPR27); + printk("\t R28 = %x\n", ctx->GPR28); + printk("\t R29 = %x\n", ctx->GPR29); + printk("\t R30 = %x\n", ctx->GPR30); + printk("\t R31 = %x\n", ctx->GPR31); + printk("\t CR = %x\n", ctx->EXC_CR); + printk("\t CTR = %x\n", ctx->EXC_CTR); + printk("\t XER = %x\n", ctx->EXC_XER); + printk("\t LR = %x\n", ctx->EXC_LR); + printk("\t MSR = %x\n", ctx->EXC_MSR); +#endif + + status = rtems_semaphore_create (rtems_build_name('D', 'B', 'G', 'c'), + 0, + RTEMS_FIFO | + RTEMS_COUNTING_SEMAPHORE | + RTEMS_NO_INHERIT_PRIORITY | + RTEMS_NO_PRIORITY_CEILING | + RTEMS_LOCAL, + 0, + &continueSemId); + if (status != RTEMS_SUCCESSFUL) + rtems_panic ("Can't create continue semaphore: `%s'\n",rtems_status_text(status)); + + PushExceptCtx (_Thread_Executing->Object.id, continueSemId, ctx); + + switch (ctx->_EXC_number){ + case ASM_TRACE_VECTOR : + DPRINTF((" TRACE EXCEPTION !!!\n")); + ctx->EXC_SRR1 &= ~MSR_SE; + ExitForSingleStep-- ; + rtems_semaphore_release( wakeupEventSemId ); + break; + + case ASM_PROG_VECTOR : + DPRINTF((" BREAKPOINT EXCEPTION !!!\n")); + rtems_semaphore_release( wakeupEventSemId ); + break; + + case ASM_SYS_VECTOR : + DPRINTF((" ENTER RDBG !!!\n")); + rtems_semaphore_release( wakeupEventSemId ); + break; + + default: + DPRINTF((" OTHER EXCEPTION !!!\n")); + rtems_semaphore_release( wakeupEventSemId ); + break; + } + + rtems_semaphore_obtain(continueSemId, RTEMS_WAIT, RTEMS_NO_TIMEOUT); + + PopExceptCtx (_Thread_Executing->Object.id); + rtems_semaphore_delete(continueSemId); + } + +} + + + diff --git a/c/src/librdbg/src/powerpc/mcp750/Makefile.in b/c/src/librdbg/src/powerpc/mcp750/Makefile.in new file mode 100644 index 0000000000..3ede15a1b7 --- /dev/null +++ b/c/src/librdbg/src/powerpc/mcp750/Makefile.in @@ -0,0 +1,114 @@ +# +# $Id$ +# + +@SET_MAKE@ +srcdir = @srcdir@ +top_srcdir = @top_srcdir@ +top_builddir = ../../.. +subdir = librdbg/powerpc/mcp750 + +RTEMS_ROOT = @RTEMS_ROOT@ +PROJECT_ROOT = @PROJECT_ROOT@ + +VPATH = @srcdir@:@srcdir@/..:@srcdir@/../.. + +LIBNAME = librdbg.a +LIB = ${ARCH}/${LIBNAME} + +# C and C++ source names, if any, go here -- minus the .c or .cc +C_PIECES = rdbg servcon servbkpt servrpc excep excep_f \ + servtgt servtsp servutil _servtgt rdbg_f \ + ptrace +C_FILES = $(C_PIECES:%=%.c) +C_O_FILES = $(C_PIECES:%=${ARCH}/%.o) + +# Asm source names, if any, go here -- minus the .s +S_PIECES = rdbg_cpu_asm +S_FILES = $(ASM_PIECES:%=%.S) +S_O_FILES = $(ASM_PIECES:%=${ARCH}/%.o) + +# Generated C source names, if any, go here -- minus the .c +GEN_C_PIECES= remdeb_xdr remdeb_svc +GEN_C_FILES = $(GEN_C_PIECES:%=%.c) +GEN_C_O_FILES = $(GEN_C_PIECES:%=${ARCH}/%.o) + +# H source names, if any, go here -- minus the .h +H_PIECES = remdeb +H_FILES = $(H_PIECES:%=%.h) + +# X source names +X_FILES = remdeb.x remdeb_f.x + +SRCS= $(C_FILES) $(S_FILES) $(GEN_C_FILES) $(H_FILES) +OBJS = $(GEN_C_O_FILES) $(C_O_FILES) $(S_O_FILES) + +RPCGEN = @RPCGEN@ +AWK = @AWK@ + +include $(RTEMS_ROOT)/make/custom/@RTEMS_BSP@.cfg +include $(RTEMS_ROOT)/make/lib.cfg + +INSTALL_CHANGE = @INSTALL_CHANGE@ +mkinstalldirs = $(SHELL) $(top_srcdir)/@RTEMS_TOPdir@/mkinstalldirs + +INSTALLDIRS = $(PROJECT_INCLUDE)/rdbg + +$(INSTALLDIRS): + @$(mkinstalldirs) $(INSTALLDIRS) + +# +# Add local stuff here using += +# + +DEFINES += +CPPFLAGS += +# +# Enable traces in RDBG +# +#CFLAGS += -DDDEBUG +# +CFLAGS += + +# +# Add your list of files to delete here. The config files +# already know how to delete some stuff, so you may want +# to just run 'make clean' first to see what gets missed. +# 'make clobber' already includes 'make clean' +# + +CLEAN_ADDITIONS += $(LIB) $(H_FILES) $(GEN_C_FILES) +CLOBBER_ADDITIONS += + +FRONTEND = \"$(RTEMS_CPU)/@RTEMS_BSP@/remdeb_f.x\" + +all: ${ARCH} $(LIB) + @$(INSTALL_VARIANT) -m 644 $(LIB) $(PROJECT_RELEASE)/lib + +$(LIB): $(SRCS) ${OBJS} + $(make-library) + +remdeb.h: $(X_FILES) + @rm -f $@ + ( pwd=`pwd`; cd $(srcdir)/../..; \ + $(RPCGEN) -h -DFRONTEND=$(FRONTEND) \ + -o $$pwd/$@ remdeb.x ) + @$(INSTALL_CHANGE) -m 755 $@ $(PROJECT_INCLUDE)/rdbg + +remdeb_xdr.c: $(X_FILES) + @rm -f $@ + ( pwd=`pwd`; cd $(srcdir)/../..; \ + $(RPCGEN) -c -DFRONTEND=$(FRONTEND) \ + -o $$pwd/$@ remdeb.x ) + +remdeb_svc.c: $(X_FILES) + @rm -f $@ tmpSvc.c + ( pwd=`pwd`; cd $(srcdir)/../..; \ + $(RPCGEN) -s udp -DFRONTEND=$(FRONTEND) \ + -o $$pwd/tmpSvc.c remdeb.x ) + $(AWK) -f $(srcdir)/../../awk.svc THEPROG="remdeb.h" tmpSvc.c >$@ + @rm -f tmpSvc.c + +Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status + cd $(top_builddir) \ + && CONFIG_FILES=$(subdir)/$@ CONFIG_HEADERS= $(SHELL) ./config.status diff --git a/c/src/librdbg/src/powerpc/mcp750/remdeb_f.x b/c/src/librdbg/src/powerpc/mcp750/remdeb_f.x new file mode 100644 index 0000000000..10cf8dd540 --- /dev/null +++ b/c/src/librdbg/src/powerpc/mcp750/remdeb_f.x @@ -0,0 +1,76 @@ +/* + ************************************************************************** + * + * Component = rdblib + * Synopsis = remdeb_f.x + * + ************************************************************************** + * $Id$ + ************************************************************************** + */ + +struct xdr_regs +{ + unsigned int tabreg[40]; +}; + +#ifdef RPC_HDR + +%/* now define register macros to apply to xdr_regs struct */ +% +%#define R_PC 0 +%#define R_MSR 1 +%#define R_EXCEPNB 2 +%#define R_R0 3 +%#define R_R1 (R_R0 + 1) +%#define R_R2 (R_R0 + 2) +%#define R_R3 (R_R0 + 3) +%#define R_R4 (R_R0 + 4) +%#define R_R5 (R_R0 + 5) +%#define R_R6 (R_R0 + 6) +%#define R_R7 (R_R0 + 7) +%#define R_R8 (R_R0 + 8) +%#define R_R9 (R_R0 + 9) +%#define R_R10 (R_R0 + 10) +%#define R_R11 (R_R0 + 11) +%#define R_R12 (R_R0 + 12) +%#define R_R13 (R_R0 + 13) +%#define R_R14 (R_R0 + 14) +%#define R_R15 (R_R0 + 15) +%#define R_R16 (R_R0 + 16) +%#define R_R17 (R_R0 + 17) +%#define R_R18 (R_R0 + 18) +%#define R_R19 (R_R0 + 19) +%#define R_R20 (R_R0 + 20) +%#define R_R21 (R_R0 + 21) +%#define R_R22 (R_R0 + 22) +%#define R_R23 (R_R0 + 23) +%#define R_R24 (R_R0 + 24) +%#define R_R25 (R_R0 + 25) +%#define R_R26 (R_R0 + 26) +%#define R_R27 (R_R0 + 27) +%#define R_R28 (R_R0 + 28) +%#define R_R29 (R_R0 + 29) +%#define R_R30 (R_R0 + 30) +%#define R_R31 (R_R0 + 31) +%#define R_CR 35 +%#define R_CTR 36 +%#define R_XER 37 +%#define R_LR 38 +%#define R_MQ 39 +% +%#include +% +%#define REG_PC tabreg[R_PC] /* PC register offset */ +%#define REG_SP tabreg[R_R1] /* SP register offset */ +%#define REG_FP tabreg[R_R1] /* SP register offset (no FP on PPC) */ +%#define BREAK_SIZE 4 /* Breakpoint occupies 4 bytes */ +%#define BREAK_ADJ 0 /* Nothing to subtract from address after bp */ +%#define IS_BREAK(l) ((l) == 0x7d8d6808) +%#define SET_BREAK(l) (0x7d8d6808) +%#define ORG_BREAK(c,p) (p) +%#define IS_STEP(regs) (regs.tabreg[R_EXCEPNB] == ASM_TRACE_VECTOR) /* Was step and not break */ +%#define TARGET_PROC_TYPE 3 + +#endif + diff --git a/c/src/librdbg/src/powerpc/new_exception_processing/remdeb_f.x b/c/src/librdbg/src/powerpc/new_exception_processing/remdeb_f.x new file mode 100644 index 0000000000..10cf8dd540 --- /dev/null +++ b/c/src/librdbg/src/powerpc/new_exception_processing/remdeb_f.x @@ -0,0 +1,76 @@ +/* + ************************************************************************** + * + * Component = rdblib + * Synopsis = remdeb_f.x + * + ************************************************************************** + * $Id$ + ************************************************************************** + */ + +struct xdr_regs +{ + unsigned int tabreg[40]; +}; + +#ifdef RPC_HDR + +%/* now define register macros to apply to xdr_regs struct */ +% +%#define R_PC 0 +%#define R_MSR 1 +%#define R_EXCEPNB 2 +%#define R_R0 3 +%#define R_R1 (R_R0 + 1) +%#define R_R2 (R_R0 + 2) +%#define R_R3 (R_R0 + 3) +%#define R_R4 (R_R0 + 4) +%#define R_R5 (R_R0 + 5) +%#define R_R6 (R_R0 + 6) +%#define R_R7 (R_R0 + 7) +%#define R_R8 (R_R0 + 8) +%#define R_R9 (R_R0 + 9) +%#define R_R10 (R_R0 + 10) +%#define R_R11 (R_R0 + 11) +%#define R_R12 (R_R0 + 12) +%#define R_R13 (R_R0 + 13) +%#define R_R14 (R_R0 + 14) +%#define R_R15 (R_R0 + 15) +%#define R_R16 (R_R0 + 16) +%#define R_R17 (R_R0 + 17) +%#define R_R18 (R_R0 + 18) +%#define R_R19 (R_R0 + 19) +%#define R_R20 (R_R0 + 20) +%#define R_R21 (R_R0 + 21) +%#define R_R22 (R_R0 + 22) +%#define R_R23 (R_R0 + 23) +%#define R_R24 (R_R0 + 24) +%#define R_R25 (R_R0 + 25) +%#define R_R26 (R_R0 + 26) +%#define R_R27 (R_R0 + 27) +%#define R_R28 (R_R0 + 28) +%#define R_R29 (R_R0 + 29) +%#define R_R30 (R_R0 + 30) +%#define R_R31 (R_R0 + 31) +%#define R_CR 35 +%#define R_CTR 36 +%#define R_XER 37 +%#define R_LR 38 +%#define R_MQ 39 +% +%#include +% +%#define REG_PC tabreg[R_PC] /* PC register offset */ +%#define REG_SP tabreg[R_R1] /* SP register offset */ +%#define REG_FP tabreg[R_R1] /* SP register offset (no FP on PPC) */ +%#define BREAK_SIZE 4 /* Breakpoint occupies 4 bytes */ +%#define BREAK_ADJ 0 /* Nothing to subtract from address after bp */ +%#define IS_BREAK(l) ((l) == 0x7d8d6808) +%#define SET_BREAK(l) (0x7d8d6808) +%#define ORG_BREAK(c,p) (p) +%#define IS_STEP(regs) (regs.tabreg[R_EXCEPNB] == ASM_TRACE_VECTOR) /* Was step and not break */ +%#define TARGET_PROC_TYPE 3 + +#endif + diff --git a/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S b/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S new file mode 100644 index 0000000000..ef1a43385d --- /dev/null +++ b/c/src/librdbg/src/powerpc/rdbg_cpu_asm.S @@ -0,0 +1,82 @@ +/* cpu_asm.s + * + * This file contains all assembly code for the Intel i386 implementation + * of RDBG. + * + * $Id$ + * + */ + +#include +#include +#include +#include + + BEGIN_CODE + +/* + * void copyback_data_cache_and_invalidate_instr_cache(addr, size) + * + * This routine performs a copy of the data cache + * and invalidate the instruction cache + */ + + .p2align 5 + PUBLIC_VAR (copyback_data_cache_and_invalidate_instr_cache) + +SYM (copyback_data_cache_and_invalidate_instr_cache): + /* r3 address to handle, r4 length in bytes */ + addi r6, r0, PPC_CACHE_ALIGNMENT + /* r5 = last address to handle */ + add r5,r3,r4 + /* r3 = cache_align(r3, PPC_CACHE_ALIGNMENT) + subi r0,r6,1 + andc r3,r3,r0 + /* R4 = R3 = copy of first address */ + mr r4,r3 + /* + * Copyback data cache + */ +1: cmplw r4,r5 /* r4 >= r5 then done */ + dcbst 0,r4 /* flush (data cache bloc store) */ + add r4,r4,r6 /* r4 = next cache line addr */ + blt 1b /* end r4 >= r5 then done */ + sync /* Wait for all dcbst to complete on bus */ + /* + * invalidate instruction cache + */ + /* R4 = fisrt address */ + mr r4,r3 +2: cmplw r4,r5 /* r4 >= r5 then done */ + icbi 0,r4 /* invalidate (instruction cache bloc invalidate) */ + add r4,r4,r6 /* r4 = next cache line addr */ + blt 2b /* end r4 >= r5 then done */ + sync /* Wait for all icbi to complete on bus */ + isync + blr + + +/* + * void enterRdbg(void) + * + * This function perform a call to the exception SYSTEM call + * It is used : + * 1 - in the user code, to simulate a Breakpoint. + * (with justSaveContext = 0) + * 2 - in the RDBG code, to push a ctx in the list. + * (with justSaveContext = 1) + * + * In most of case, it will be use as described in 1. + * The 2nd possibility will be used by RDBG to obtain + * its own ctx + */ + + PUBLIC_VAR (enterRdbg) + +SYM (enterRdbg): + sc + blr + +END_CODE + +END diff --git a/c/src/librdbg/src/powerpc/rdbg_f.c b/c/src/librdbg/src/powerpc/rdbg_f.c new file mode 100644 index 0000000000..6149b5d426 --- /dev/null +++ b/c/src/librdbg/src/powerpc/rdbg_f.c @@ -0,0 +1,156 @@ +/* + ************************************************************************** + * + * Component = + * + * Synopsis = rdbg/powerpc/rdbg_f.c + * + * $Id$ + * + ************************************************************************** + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +void +CtxToRegs (const CPU_Exception_frame* ctx, xdr_regs* regs) +{ + * ((CPU_Exception_frame*) regs) = *ctx; +} + + + void +RegsToCtx (const xdr_regs* regs, CPU_Exception_frame* ctx) +{ + *ctx = * ((CPU_Exception_frame*) regs); +} + +void +get_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx) +{ + unsigned int *ptr; + unsigned int i; + + ctx->EXC_SRR0 = thread->Registers.pc; + ctx->EXC_SRR1 = thread->Registers.msr; + ctx->_EXC_number = 0xdeadbeef; + + ctx->GPR1 = thread->Registers.gpr1; + ctx->GPR2 = thread->Registers.gpr2; + /* + * Fill with dummy values... + */ + ptr = &ctx->GPR3; + for (i = 0; i < 10; i++) + ptr [i] = 0xdeadbeef; + + ctx->GPR13 = thread->Registers.gpr13; + ctx->GPR14 = thread->Registers.gpr14; + ctx->GPR15 = thread->Registers.gpr15; + ctx->GPR16 = thread->Registers.gpr16; + ctx->GPR17 = thread->Registers.gpr17; + ctx->GPR18 = thread->Registers.gpr18; + ctx->GPR19 = thread->Registers.gpr19; + ctx->GPR20 = thread->Registers.gpr20; + ctx->GPR21 = thread->Registers.gpr21; + ctx->GPR22 = thread->Registers.gpr22; + ctx->GPR23 = thread->Registers.gpr23; + ctx->GPR24 = thread->Registers.gpr24; + ctx->GPR25 = thread->Registers.gpr25; + ctx->GPR26 = thread->Registers.gpr26; + ctx->GPR27 = thread->Registers.gpr27; + ctx->GPR28 = thread->Registers.gpr28; + ctx->GPR29 = thread->Registers.gpr29; + ctx->GPR30 = thread->Registers.gpr30; + ctx->GPR31 = thread->Registers.gpr31; + ctx->EXC_CR = thread->Registers.cr; + ctx->EXC_CTR = 0xdeadbeef; + ctx->EXC_XER = 0xdeadbeef; + ctx->EXC_LR = 0xdeadbeef; + ctx->EXC_MSR = 0xdeadbeef; + ctx->EXC_DAR = 0xdeadbeef; +} + +void +set_ctx_thread( Thread_Control *thread, CPU_Exception_frame* ctx) +{ + thread->Registers.gpr1 = ctx->GPR1; + thread->Registers.gpr2 = ctx->GPR2; + + thread->Registers.gpr13 = ctx->GPR13; + thread->Registers.gpr14 = ctx->GPR14; + thread->Registers.gpr15 = ctx->GPR15; + thread->Registers.gpr16 = ctx->GPR16; + thread->Registers.gpr17 = ctx->GPR17; + thread->Registers.gpr18 = ctx->GPR18; + thread->Registers.gpr19 = ctx->GPR19; + thread->Registers.gpr20 = ctx->GPR20; + thread->Registers.gpr21 = ctx->GPR21; + thread->Registers.gpr22 = ctx->GPR22; + thread->Registers.gpr23 = ctx->GPR23; + thread->Registers.gpr24 = ctx->GPR24; + thread->Registers.gpr25 = ctx->GPR25; + thread->Registers.gpr26 = ctx->GPR26; + thread->Registers.gpr27 = ctx->GPR27; + thread->Registers.gpr28 = ctx->GPR28; + thread->Registers.gpr29 = ctx->GPR29; + thread->Registers.gpr30 = ctx->GPR30; + thread->Registers.gpr31 = ctx->GPR31; + thread->Registers.cr = ctx->EXC_CR; + thread->Registers.pc = ctx->EXC_SRR0; + thread->Registers.msr = ctx->EXC_SRR1; +} + + + +int +Single_Step(CPU_Exception_frame* ctx) +{ + if ((ctx->EXC_SRR1 & MSR_SE) != 0 || ExitForSingleStep != 0) { + /* Check coherency */ + assert ((ctx->EXC_SRR1 & MSR_SE) != 0); + assert (ExitForSingleStep != 0); + return 0; + } + ctx->EXC_SRR1 |= MSR_SE; + ++ExitForSingleStep; + return 0; +} + + int +CheckForSingleStep (CPU_Exception_frame* ctx) +{ + if (ExitForSingleStep) { + /* + * This functions can be called both from + * INT1 and INT3 handlers. In case it is + * called from INT3, need to clear TF. + */ + ctx->EXC_SRR1 &= ~MSR_SE; + ExitForSingleStep = 0; + return 1; + } + return 0; +} + +void +CancelSingleStep (CPU_Exception_frame* ctx) +{ + /* Cancel scheduled SS */ + ctx->EXC_SRR1 &= ~MSR_SE; + ExitForSingleStep-- ; +} +cpuExcHandlerType oldExcHandler; + +void connect_rdbg_exception() +{ + oldExcHandler = globalExceptHdl; + globalExceptHdl = BreakPointExcHdl ; +} -- cgit v1.2.3