From 01629105c2817a59a4f1f05039593f211cf5ddaa Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 14 Dec 1998 23:15:38 +0000 Subject: Patch from Ralf Corsepius to rename all .s files to .S in conformance with GNU conventions. This is a minor step along the way to supporting automake. --- c/src/lib/start/a29k/Makefile.in | 6 +- c/src/lib/start/a29k/crt0.S | 288 ++++++++++++++++++++++++++++ c/src/lib/start/a29k/crt0.s | 288 ---------------------------- c/src/lib/start/a29k/register.S | 393 +++++++++++++++++++++++++++++++++++++++ c/src/lib/start/a29k/register.s | 393 --------------------------------------- 5 files changed, 684 insertions(+), 684 deletions(-) create mode 100644 c/src/lib/start/a29k/crt0.S delete mode 100644 c/src/lib/start/a29k/crt0.s create mode 100644 c/src/lib/start/a29k/register.S delete mode 100644 c/src/lib/start/a29k/register.s (limited to 'c/src/lib/start/a29k') diff --git a/c/src/lib/start/a29k/Makefile.in b/c/src/lib/start/a29k/Makefile.in index f89c5a7e6f..823953baa0 100644 --- a/c/src/lib/start/a29k/Makefile.in +++ b/c/src/lib/start/a29k/Makefile.in @@ -15,10 +15,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=crt0 register -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/start/a29k/crt0.S b/c/src/lib/start/a29k/crt0.S new file mode 100644 index 0000000000..017f2d4cca --- /dev/null +++ b/c/src/lib/start/a29k/crt0.S @@ -0,0 +1,288 @@ +; @(#)crt0.s 1.3 96/05/31 14:40:27, AMD +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Copyright 1988, 1989, 1990 Advanced Micro Devices, Inc. +; +; This software is the property of Advanced Micro Devices, Inc (AMD) which +; specifically grants the user the right to modify, use and distribute this +; software provided this notice is not removed or altered. All other rights +; are reserved by AMD. +; +; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS +; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL +; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR +; USE OF THIS SOFTWARE. +; +; So that all may benefit from your experience, please report any problems +; or suggestions about this software to the 29K Technical Support Center at +; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or +; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. +; +; Advanced Micro Devices, Inc. +; 29K Support Products +; Mail Stop 573 +; 5900 E. Ben White Blvd. +; Austin, TX 78741 +; 800-292-9263 +; +; /* $Id$ */ +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; + + .file "crt0.s" + +; crt0.s version 3.3-0 +; +; This module gets control from the OS. +; It saves away the Am29027 Mode register settings and +; then sets up the pointers to the resident spill and fill +; trap handlers. It then establishes argv and argc for passing +; to main. It then calls _main. If main returns, it calls _exit. +; +; void = start( ); +; NOTE - not C callable (no lead underscore) +; + .include "sysmac.h" +; +; + .extern V_SPILL, V_FILL +; .comm __29027Mode, 8 ; A shadow of the mode register + .comm __LibInit, 4 + + .text + .extern _main, _exit, _atexit + + .word 0 ; Terminating tag word + .global start +start: + sub gr1, gr1, 6 * 4 + asgeu V_SPILL, gr1, rab ; better not ever happen + add lr1, gr1, 6 * 4 + +; +; Save the initial value of the Am29027's Mode register +; +; If your system does not enter crt0 with value for Am29027's Mode +; register in gr96 and gr97, and also the coprocessor is active +; uncomment the next 4 instructions. +; +; const gr96, 0xfc00820 +; consth gr96, 0xfc00820 +; const gr97, 0x1375 +; store 1, 3, gr96, gr97 +; +; const gr98, __29027Mode +; consth gr98, __29027Mode +; store 0, 0, gr96, gr98 +; add gr98, gr98, 4 +; store 0, 0, gr97, gr98 +; +; Now call the system to setup the spill and fill trap handlers +; + const lr3, spill + consth lr3, spill + const lr2, V_SPILL + syscall setvec + const lr3, fill + consth lr3, fill + const lr2, V_FILL + syscall setvec + +; +; atexit(_fini) +; +; const lr0, _atexit +; consth lr0, _atexit +; const lr2,__fini +; calli lr0,lr0 +; consth lr2,__fini +; +; Now call _init +; +; const lr0, __init +; consth lr0, __init +; calli lr0,lr0 +; nop + +; +; Get the argv base address and calculate argc. +; + syscall getargs + add lr3, v0, 0 ; argv + add lr4, v0, 0 + constn lr2, -1 +argcloop: ; scan for NULL terminator + load 0, 0, gr97, lr4 + add lr4, lr4, 4 + cpeq gr97, gr97, 0 + jmpf gr97, argcloop + add lr2, lr2, 1 +; +; Now call LibInit, if there is one. To aid runtime libraries +; that need to do some startup initialization, we have created +; a bss variable called LibInit. If the library doesn't need +; any run-time initialization, the variable is still 0. If the +; library does need run-time initialization, the library will +; contain a definition like +; void (*_LibInit)(void) = LibInitFunction; +; The linker will match up our bss LibInit with this data LibInit +; and the variable will not be 0. This results in the LibInit routine +; being called via the calli instruction below. +; + const lr0, __LibInit + consth lr0, __LibInit + load 0, 0, lr0, lr0 + cpeq gr96, lr0, 0 + jmpt gr96, NoLibInit + nop + calli lr0, lr0 + nop +NoLibInit: + +; +; Call RAMInit to initialize the data memory. +; +; The following code segment was used to create the two flavors of the +; run-time initialization routines (crt0_1.o, and crt0_2.o) as described +; in the User's Manual. If osboot is used to create a stand-alone +; application, or the call to RAMInit is made in the start-up routine, +; then the following is not needed. +; +; .ifdef ROM_LOAD +; .extern RAMInit +; +; const lr0, RAMInit +; consth lr0, RAMInit +; calli gr96, lr0 +; nop +; .else +; nop +; nop +; nop +; nop +; .endif + +; +; Uncomment the following .comm, if you ARE NOT using osboot as released +; with the High C 29K product, AND plan to use the romcoff utility to +; move code and/or data sections to ROM. +; +; .comm RAMInit, 4 +; +; Furthermore, if the above is uncommented, then use the following logic +; to call the RAMInit function, if needed. +; +; const lr0, RAMInit +; consth lr0, RAMInit +; load 0, 0, gr96, lr0 +; cpeq gr96, gr96, 0 ; nothing there? +; jmpt gr96, endRAMInit ; yes, nothing to init +; nop +; calli gr96, lr0 ; no, then instruction found +; nop ; execute function. +; + + +; +; call main, passing it 2 arguments. main( argc, argv ) +; + const lr0, _main + consth lr0, _main + calli lr0, lr0 + nop +; +; call exit +; + const lr0, _exit + consth lr0, _exit + calli lr0, lr0 + add lr2, gr96, 0 +; +; Should never get here, but just in case +; +loop: + syscall exit + jmp loop + nop + .sbttl "Spill and Fill trap handlers" + .eject +; +; SPILL, FILL trap handlers +; +; Note that these Spill and Fill trap handlers allow the OS to +; assume that the only registers of use are between gr1 and rfb. +; Therefore, if the OS desires to, it may simply preserve from +; lr0 for (rfb-gr1)/4 registers when doing a context save. +; +; +; Here is the spill handler +; +; spill registers from [*gr1..*rab) +; and move rab downto where gr1 points +; +; rab must change before rfb for signals to work +; +; On entry: rfb - rab = windowsize, gr1 < rab +; Near the end: rfb - rab > windowsize, gr1 == rab +; On exit: rfb - rab = windowsize, gr1 == rab +; + .global spill +spill: + sub tav, rab, gr1 ; tav = number of bytes to spill + srl tav, tav, 2 ; change byte count to word count + sub tav, tav, 1 ; make count zero based + mtsr CR, tav ; set Count Remaining register + sub tav, rab, gr1 + sub tav, rfb, tav ; pull down free bound and save it in rab + add rab, gr1, 0 ; first pull down allocate bound + storem 0, 0, lr0, tav ; store lr0..lr(tav) into rfb + jmpi tpc ; return... + add rfb, tav, 0 +; +; Here is the fill handler +; +; fill registers from [*rfb..*lr1) +; and move rfb upto where lr1 points. +; +; rab must change before rfb for signals to work +; +; On entry: rfb - rab = windowsize, lr1 > rfb +; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize +; On exit: rfb - rab = windowsize, lr1 == rfb +; + .global fill +fill: + const tav, 0x80 << 2 + or tav, tav, rfb ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2 + mtsr IPA, tav ; ipa = [rfb]<<2 == 1st reg to fill + ; gr0 is now the first reg to fill + sub tav, lr1, rfb ; tav = number of bytes to fill + add rab, rab, tav ; push up allocate bound + srl tav, tav, 2 ; change byte count to word count + sub tav, tav, 1 ; make count zero based + mtsr CR, tav ; set Count Remaining register + loadm 0, 0, gr0, rfb ; load registers + jmpi tpc ; return... + add rfb, lr1, 0 ; ... first pushing up free bound + +; +; The __init function +; +; .sect .init,text +; .use .init +; .global __init +;__init: +; sub gr1,gr1,16 +; asgeu V_SPILL,gr1,gr126 +; add lr1,gr1,24 +; +; +; The __fini function +; +; .sect .fini,text +; .use .fini +; .global __fini +;__fini: +; sub gr1,gr1,16 +; asgeu V_SPILL,gr1,gr126 +; add lr1,gr1,24 +; + .end diff --git a/c/src/lib/start/a29k/crt0.s b/c/src/lib/start/a29k/crt0.s deleted file mode 100644 index 017f2d4cca..0000000000 --- a/c/src/lib/start/a29k/crt0.s +++ /dev/null @@ -1,288 +0,0 @@ -; @(#)crt0.s 1.3 96/05/31 14:40:27, AMD -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Copyright 1988, 1989, 1990 Advanced Micro Devices, Inc. -; -; This software is the property of Advanced Micro Devices, Inc (AMD) which -; specifically grants the user the right to modify, use and distribute this -; software provided this notice is not removed or altered. All other rights -; are reserved by AMD. -; -; AMD MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS -; SOFTWARE. IN NO EVENT SHALL AMD BE LIABLE FOR INCIDENTAL OR CONSEQUENTIAL -; DAMAGES IN CONNECTION WITH OR ARISING FROM THE FURNISHING, PERFORMANCE, OR -; USE OF THIS SOFTWARE. -; -; So that all may benefit from your experience, please report any problems -; or suggestions about this software to the 29K Technical Support Center at -; 800-29-29-AMD (800-292-9263) in the USA, or 0800-89-1131 in the UK, or -; 0031-11-1129 in Japan, toll free. The direct dial number is 512-462-4118. -; -; Advanced Micro Devices, Inc. -; 29K Support Products -; Mail Stop 573 -; 5900 E. Ben White Blvd. -; Austin, TX 78741 -; 800-292-9263 -; -; /* $Id$ */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; - - .file "crt0.s" - -; crt0.s version 3.3-0 -; -; This module gets control from the OS. -; It saves away the Am29027 Mode register settings and -; then sets up the pointers to the resident spill and fill -; trap handlers. It then establishes argv and argc for passing -; to main. It then calls _main. If main returns, it calls _exit. -; -; void = start( ); -; NOTE - not C callable (no lead underscore) -; - .include "sysmac.h" -; -; - .extern V_SPILL, V_FILL -; .comm __29027Mode, 8 ; A shadow of the mode register - .comm __LibInit, 4 - - .text - .extern _main, _exit, _atexit - - .word 0 ; Terminating tag word - .global start -start: - sub gr1, gr1, 6 * 4 - asgeu V_SPILL, gr1, rab ; better not ever happen - add lr1, gr1, 6 * 4 - -; -; Save the initial value of the Am29027's Mode register -; -; If your system does not enter crt0 with value for Am29027's Mode -; register in gr96 and gr97, and also the coprocessor is active -; uncomment the next 4 instructions. -; -; const gr96, 0xfc00820 -; consth gr96, 0xfc00820 -; const gr97, 0x1375 -; store 1, 3, gr96, gr97 -; -; const gr98, __29027Mode -; consth gr98, __29027Mode -; store 0, 0, gr96, gr98 -; add gr98, gr98, 4 -; store 0, 0, gr97, gr98 -; -; Now call the system to setup the spill and fill trap handlers -; - const lr3, spill - consth lr3, spill - const lr2, V_SPILL - syscall setvec - const lr3, fill - consth lr3, fill - const lr2, V_FILL - syscall setvec - -; -; atexit(_fini) -; -; const lr0, _atexit -; consth lr0, _atexit -; const lr2,__fini -; calli lr0,lr0 -; consth lr2,__fini -; -; Now call _init -; -; const lr0, __init -; consth lr0, __init -; calli lr0,lr0 -; nop - -; -; Get the argv base address and calculate argc. -; - syscall getargs - add lr3, v0, 0 ; argv - add lr4, v0, 0 - constn lr2, -1 -argcloop: ; scan for NULL terminator - load 0, 0, gr97, lr4 - add lr4, lr4, 4 - cpeq gr97, gr97, 0 - jmpf gr97, argcloop - add lr2, lr2, 1 -; -; Now call LibInit, if there is one. To aid runtime libraries -; that need to do some startup initialization, we have created -; a bss variable called LibInit. If the library doesn't need -; any run-time initialization, the variable is still 0. If the -; library does need run-time initialization, the library will -; contain a definition like -; void (*_LibInit)(void) = LibInitFunction; -; The linker will match up our bss LibInit with this data LibInit -; and the variable will not be 0. This results in the LibInit routine -; being called via the calli instruction below. -; - const lr0, __LibInit - consth lr0, __LibInit - load 0, 0, lr0, lr0 - cpeq gr96, lr0, 0 - jmpt gr96, NoLibInit - nop - calli lr0, lr0 - nop -NoLibInit: - -; -; Call RAMInit to initialize the data memory. -; -; The following code segment was used to create the two flavors of the -; run-time initialization routines (crt0_1.o, and crt0_2.o) as described -; in the User's Manual. If osboot is used to create a stand-alone -; application, or the call to RAMInit is made in the start-up routine, -; then the following is not needed. -; -; .ifdef ROM_LOAD -; .extern RAMInit -; -; const lr0, RAMInit -; consth lr0, RAMInit -; calli gr96, lr0 -; nop -; .else -; nop -; nop -; nop -; nop -; .endif - -; -; Uncomment the following .comm, if you ARE NOT using osboot as released -; with the High C 29K product, AND plan to use the romcoff utility to -; move code and/or data sections to ROM. -; -; .comm RAMInit, 4 -; -; Furthermore, if the above is uncommented, then use the following logic -; to call the RAMInit function, if needed. -; -; const lr0, RAMInit -; consth lr0, RAMInit -; load 0, 0, gr96, lr0 -; cpeq gr96, gr96, 0 ; nothing there? -; jmpt gr96, endRAMInit ; yes, nothing to init -; nop -; calli gr96, lr0 ; no, then instruction found -; nop ; execute function. -; - - -; -; call main, passing it 2 arguments. main( argc, argv ) -; - const lr0, _main - consth lr0, _main - calli lr0, lr0 - nop -; -; call exit -; - const lr0, _exit - consth lr0, _exit - calli lr0, lr0 - add lr2, gr96, 0 -; -; Should never get here, but just in case -; -loop: - syscall exit - jmp loop - nop - .sbttl "Spill and Fill trap handlers" - .eject -; -; SPILL, FILL trap handlers -; -; Note that these Spill and Fill trap handlers allow the OS to -; assume that the only registers of use are between gr1 and rfb. -; Therefore, if the OS desires to, it may simply preserve from -; lr0 for (rfb-gr1)/4 registers when doing a context save. -; -; -; Here is the spill handler -; -; spill registers from [*gr1..*rab) -; and move rab downto where gr1 points -; -; rab must change before rfb for signals to work -; -; On entry: rfb - rab = windowsize, gr1 < rab -; Near the end: rfb - rab > windowsize, gr1 == rab -; On exit: rfb - rab = windowsize, gr1 == rab -; - .global spill -spill: - sub tav, rab, gr1 ; tav = number of bytes to spill - srl tav, tav, 2 ; change byte count to word count - sub tav, tav, 1 ; make count zero based - mtsr CR, tav ; set Count Remaining register - sub tav, rab, gr1 - sub tav, rfb, tav ; pull down free bound and save it in rab - add rab, gr1, 0 ; first pull down allocate bound - storem 0, 0, lr0, tav ; store lr0..lr(tav) into rfb - jmpi tpc ; return... - add rfb, tav, 0 -; -; Here is the fill handler -; -; fill registers from [*rfb..*lr1) -; and move rfb upto where lr1 points. -; -; rab must change before rfb for signals to work -; -; On entry: rfb - rab = windowsize, lr1 > rfb -; Near the end: rfb - rab < windowsize, lr1 == rab + windowsize -; On exit: rfb - rab = windowsize, lr1 == rfb -; - .global fill -fill: - const tav, 0x80 << 2 - or tav, tav, rfb ; tav = ((rfb>>2) | 0x80)<<2 == [rfb]<<2 - mtsr IPA, tav ; ipa = [rfb]<<2 == 1st reg to fill - ; gr0 is now the first reg to fill - sub tav, lr1, rfb ; tav = number of bytes to fill - add rab, rab, tav ; push up allocate bound - srl tav, tav, 2 ; change byte count to word count - sub tav, tav, 1 ; make count zero based - mtsr CR, tav ; set Count Remaining register - loadm 0, 0, gr0, rfb ; load registers - jmpi tpc ; return... - add rfb, lr1, 0 ; ... first pushing up free bound - -; -; The __init function -; -; .sect .init,text -; .use .init -; .global __init -;__init: -; sub gr1,gr1,16 -; asgeu V_SPILL,gr1,gr126 -; add lr1,gr1,24 -; -; -; The __fini function -; -; .sect .fini,text -; .use .fini -; .global __fini -;__fini: -; sub gr1,gr1,16 -; asgeu V_SPILL,gr1,gr126 -; add lr1,gr1,24 -; - .end diff --git a/c/src/lib/start/a29k/register.S b/c/src/lib/start/a29k/register.S new file mode 100644 index 0000000000..4d17071ed1 --- /dev/null +++ b/c/src/lib/start/a29k/register.S @@ -0,0 +1,393 @@ +; /* @(#)register.s 1.1 96/05/23 08:57:34, TEI */ +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; Register Definitions and Usage Conventions +;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; +; /* $Id$ */ +; + +;* File information and includes. + + .file "c_register.s" + .ident "@(#)register.s 1.1 96/05/23 08:57:34, TEI\n" + +; Basic guidelines for register distribution and usage are derived from +; the AMD application notes. It would be best to stick with the conventions +; laid out by AMD. +; Application Note: Context Switching with 29000 Processor By Daniel Mann. + +; +;************************************************************************* +; + +; +; Rule 1: +; Gr1 is used as a pointer to the register stack +; Lr1 is used as frame pointer +; + + .reg regsp, gr1 ; Register Stack Pointer + .reg fp, lr1 ; frame pointer + + .equ Rrsp, ®sp + .equ Rfp, &fp + + .global Rrsp, Rfp + +; +;************************************************************************* +; + +; +; Gr2-Gr63 are not implemented in silicon +; + +; +;************************************************************************* +; + +; +; Rule 2: +; The registers GR64-GR95 are dedicated for operating system use. +; + +; The register range GR64-GR95 i.e 32 Registers is furthur sub-divided as +; follows... +; gr64-gr67 interrupt handlers. +; gr68-gr71 OS temporaries I +; gr72-gr79 OS temporaries II +; gr80-gr95 OS statics. Dedicated throughout the operation of a program. + + +; +; 32 Registers for Operating System Use. +; + +; +; Assigning Names to Interrupt Handlers Registers. +; + + .reg OSint0, gr64 + .reg OSint1, gr65 + .reg OSint2, gr66 + .reg OSint3, gr67 + + .equ ROSint0, &OSint0 + .equ ROSint1, &OSint1 + .equ ROSint2, &OSint2 + .equ ROSint3, &OSint3 + + .global ROSint0, ROSint1, ROSint2, ROSint3 + + .reg TrapReg, gr64 ; trap register + .reg trapreg, gr64 ; trapreg + + .equ RTrapReg, &TrapReg + .equ Rtrapreg, &trapreg + + .global RTrapReg, Rtrapreg + + +; +; Assigning Names to Scratch/Temporary Registers. +; + + .reg OStmp0, gr68 + .reg OStmp1, gr69 + .reg OStmp2, gr70 + .reg OStmp3, gr71 + + .reg OStmp4, gr72 + .reg OStmp5, gr73 + .reg OStmp6, gr74 + .reg OStmp7, gr75 + + .reg OStmp8, gr76 + .reg OStmp9, gr77 + .reg OStmp10, gr78 + .reg OStmp11, gr79 + + .equ ROStmp0, &OStmp0 + .equ ROStmp1, &OStmp1 + .equ ROStmp2, &OStmp2 + .equ ROStmp3, &OStmp3 + + .equ ROStmp4, &OStmp4 + .equ ROStmp5, &OStmp5 + .equ ROStmp6, &OStmp6 + .equ ROStmp7, &OStmp7 + + .equ ROStmp8, &OStmp8 + .equ ROStmp9, &OStmp9 + .equ ROStmp10, &OStmp10 + .equ ROStmp11, &OStmp11 + + .global ROStmp0, ROStmp1, ROStmp2, ROStmp3 + .global ROStmp4, ROStmp5, ROStmp6, ROStmp7 + .global ROStmp8, ROStmp9, ROStmp10, ROStmp11 + +; +; Assigning Names to Statics/Permanent Registers. +; + + .reg OSsta0, gr80 ; Spill Address Register + .reg OSsta1, gr81 ; Fill Address Register + .reg OSsta2, gr82 ; Signal Address Register + .reg OSsta3, gr83 ; pcb Register + + .reg OSsta4, gr84 ; + .reg OSsta5, gr85 ; + .reg OSsta6, gr86 ; + .reg OSsta7, gr87 ; + + .reg OSsta8, gr88 ; + .reg OSsta9, gr89 ; + .reg OSsta10, gr90 ; + .reg OSsta11, gr91 ; + + .reg OSsta12, gr92 ; + .reg OSsta13, gr93 ; + .reg OSsta14, gr94 ; + .reg OSsta15, gr95 ; + +; +; Round 2 of Name Assignments +; + +; +; Assignment of Specific Use oriented names to statics. +; + .reg SpillAddrReg, gr80 + .reg FillAddrReg, gr81 + .reg SignalAddrReg, gr82 + .reg pcb, gr83 + + .reg etx, gr80 + .reg ety, gr81 + .reg etz, gr82 + .reg etc, gr83 + +;* + + .reg TimerExt, gr84 + .reg TimerUtil, gr85 + +;* + + .reg LEDReg, gr86 + .reg ERRReg, gr87 + + .reg eta, gr86 + .reg etb, gr87 + +;* + + +;* The following registers are used by switching code + + .reg et0, gr88 + .reg et1, gr89 + .reg et2, gr90 + .reg et3, gr91 + + .reg et4, gr92 + .reg et5, gr93 + .reg et6, gr94 + .reg et7, gr95 + + +; The floating point trap handlers need a few static registers + + .reg FPStat0, gr88 + .reg FPStat1, gr89 + .reg FPStat2, gr90 + .reg FPStat3, gr91 + +; The following registers are used temporarily during diagnostics. + + .reg XLINXReg, gr92 + .reg VMBCReg, gr93 + .reg UARTReg, gr94 + .reg ETHERReg, gr95 + +;* + +;;* + .reg heapptr, gr90 + .reg ArgvPtr, gr91 +;;* + + + +; +;* Preparing to export Register Names for the Linkers benefit. +; + + .equ RSpillAddrReg, &SpillAddrReg + .equ RFillAddrReg, &FillAddrReg + .equ RSignalAddrReg, &SignalAddrReg + .equ Rpcb, &pcb + + .equ Retx, &etx + .equ Rety, &ety + .equ Retz, &etz + .equ Reta, &eta + + .equ Retb, &etb + .equ Retc, &etc + .equ RTimerExt, &TimerExt + .equ RTimerUtil, &TimerUtil + + .equ RLEDReg, &LEDReg + .equ RERRReg, &ERRReg + + .equ Ret0, &et0 + .equ Ret1, &et1 + .equ Ret2, &et2 + .equ Ret3, &et3 + + .equ RFPStat0, &FPStat0 + .equ RFPStat1, &FPStat1 + .equ RFPStat2, &FPStat2 + .equ RFPStat3, &FPStat3 + + .equ Rheapptr, &heapptr + .equ RHeapPtr, &heapptr + .equ RArgvPtr, &ArgvPtr + + .equ Ret4, &et4 + .equ Ret5, &et5 + .equ Ret6, &et6 + .equ Ret7, &et7 + + .equ RXLINXReg, &XLINXReg + .equ RVMBCReg, &VMBCReg + .equ RUARTReg, &UARTReg + .equ RETHERReg, ÐERReg + + .global RSpillAddrReg, RFillAddrReg, RSignalAddrReg + .global Rpcb, Retc + .global RTimerExt, RTimerUtil, RLEDReg, RERRReg + .global Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb + .global Retx, Rety, Retz + .global RFPStat0, RFPStat1, RFPStat2, RFPStat3 + .global Rheapptr, RHeapPtr, RArgvPtr + .global RXLINXReg, RVMBCReg, RUARTReg, RETHERReg + +; +;************************************************************************* +; + + +; +; Rule 3: +; Gr96-Gr127 Compiler & Programmer use registers. +; 32 Registers for Compiler & Programmer use + +; +; 16 Registers for Compiler Use. +; + +; +; Compiler Temporaries and Function Return Values +; + + .reg v0, gr96 ; First word of Return Value + .reg v1, gr97 + .reg v2, gr98 + .reg v3, gr99 + + .reg v4, gr100 + .reg v5, gr101 + .reg v6, gr102 + .reg v7, gr103 + + .reg v8, gr104 + .reg v9, gr105 + .reg v10, gr106 + .reg v11, gr107 + + .reg v12, gr108 + .reg v13, gr109 + .reg v14, gr110 + .reg v15, gr111 + + .equ Rv0, &v0 + .equ Rv1, &v1 + .equ Rv2, &v2 + .equ Rv3, &v3 + + .equ Rv4, &v4 + .equ Rv5, &v5 + .equ Rv6, &v6 + .equ Rv7, &v7 + + .equ Rv8, &v8 + .equ Rv9, &v9 + .equ Rv10, &v10 + .equ Rv11, &v11 + + .equ Rv12, &v12 + .equ Rv13, &v13 + .equ Rv14, &v14 + .equ Rv15, &v15 + + .global Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9 + .global Rv10, Rv11, Rv12, Rv13, Rv14, Rv15 + + +; +; User Process Statics Registers +; + + .reg rp0, gr112 ; Reserved for Programmer, #0 + .reg rp1, gr113 ; Reserved for Programmer, #1 + .reg rp2, gr114 ; Reserved for Programmer, #2 + .reg rp3, gr115 ; Reserved for Programmer, #3 + + .equ Rrp0, &rp0 + .equ Rrp1, &rp1 + .equ Rrp2, &rp2 + .equ Rrp3, &rp3 + + .global Rrp0, Rrp1, Rrp2, Rrp3 + +; +; Compiler Temporaries II +; + + .reg tv0, gr116 ; + .reg tv1, gr117 ; + .reg tv2, gr118 ; + .reg tv3, gr119 ; + .reg tv4, gr120 ; + + .equ Rtv0, &tv0 ; + .equ Rtv1, &tv1 ; + .equ Rtv2, &tv2 ; + .equ Rtv3, &tv3 ; + .equ Rtv4, &tv4 ; + + .global Rtv0, Rtv1, Rtv2, Rtv3, Rtv4 + +; +; Special pointers and registers for handlers and stack operations. +; + + .reg tav, gr121 ; Temp, Arg for Trap Handlers + .reg tpc, gr122 ; Temp, Ret PC for Trap Handlers + .reg lrp, gr123 ; Large Return Pointer + .reg slp, gr124 ; Static Link Pointer + + .reg msp, gr125 ; Memory Stack Pointer + .reg rab, gr126 ; Register Allocate Bound + .reg rfb, gr127 ; Register Free Bound + + .equ Rtav, &tav + .equ Rtpc, &tpc + .equ Rlrp, &lrp + .equ Rslp, &slp + .equ Rmsp, &msp + .equ Rrab, &rab + .equ Rrfb, &rfb + + .global Rtav, Rtpc, Rlrp, Rslp, Rmsp, Rrab, Rrfb diff --git a/c/src/lib/start/a29k/register.s b/c/src/lib/start/a29k/register.s deleted file mode 100644 index 4d17071ed1..0000000000 --- a/c/src/lib/start/a29k/register.s +++ /dev/null @@ -1,393 +0,0 @@ -; /* @(#)register.s 1.1 96/05/23 08:57:34, TEI */ -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; Register Definitions and Usage Conventions -;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; -; /* $Id$ */ -; - -;* File information and includes. - - .file "c_register.s" - .ident "@(#)register.s 1.1 96/05/23 08:57:34, TEI\n" - -; Basic guidelines for register distribution and usage are derived from -; the AMD application notes. It would be best to stick with the conventions -; laid out by AMD. -; Application Note: Context Switching with 29000 Processor By Daniel Mann. - -; -;************************************************************************* -; - -; -; Rule 1: -; Gr1 is used as a pointer to the register stack -; Lr1 is used as frame pointer -; - - .reg regsp, gr1 ; Register Stack Pointer - .reg fp, lr1 ; frame pointer - - .equ Rrsp, ®sp - .equ Rfp, &fp - - .global Rrsp, Rfp - -; -;************************************************************************* -; - -; -; Gr2-Gr63 are not implemented in silicon -; - -; -;************************************************************************* -; - -; -; Rule 2: -; The registers GR64-GR95 are dedicated for operating system use. -; - -; The register range GR64-GR95 i.e 32 Registers is furthur sub-divided as -; follows... -; gr64-gr67 interrupt handlers. -; gr68-gr71 OS temporaries I -; gr72-gr79 OS temporaries II -; gr80-gr95 OS statics. Dedicated throughout the operation of a program. - - -; -; 32 Registers for Operating System Use. -; - -; -; Assigning Names to Interrupt Handlers Registers. -; - - .reg OSint0, gr64 - .reg OSint1, gr65 - .reg OSint2, gr66 - .reg OSint3, gr67 - - .equ ROSint0, &OSint0 - .equ ROSint1, &OSint1 - .equ ROSint2, &OSint2 - .equ ROSint3, &OSint3 - - .global ROSint0, ROSint1, ROSint2, ROSint3 - - .reg TrapReg, gr64 ; trap register - .reg trapreg, gr64 ; trapreg - - .equ RTrapReg, &TrapReg - .equ Rtrapreg, &trapreg - - .global RTrapReg, Rtrapreg - - -; -; Assigning Names to Scratch/Temporary Registers. -; - - .reg OStmp0, gr68 - .reg OStmp1, gr69 - .reg OStmp2, gr70 - .reg OStmp3, gr71 - - .reg OStmp4, gr72 - .reg OStmp5, gr73 - .reg OStmp6, gr74 - .reg OStmp7, gr75 - - .reg OStmp8, gr76 - .reg OStmp9, gr77 - .reg OStmp10, gr78 - .reg OStmp11, gr79 - - .equ ROStmp0, &OStmp0 - .equ ROStmp1, &OStmp1 - .equ ROStmp2, &OStmp2 - .equ ROStmp3, &OStmp3 - - .equ ROStmp4, &OStmp4 - .equ ROStmp5, &OStmp5 - .equ ROStmp6, &OStmp6 - .equ ROStmp7, &OStmp7 - - .equ ROStmp8, &OStmp8 - .equ ROStmp9, &OStmp9 - .equ ROStmp10, &OStmp10 - .equ ROStmp11, &OStmp11 - - .global ROStmp0, ROStmp1, ROStmp2, ROStmp3 - .global ROStmp4, ROStmp5, ROStmp6, ROStmp7 - .global ROStmp8, ROStmp9, ROStmp10, ROStmp11 - -; -; Assigning Names to Statics/Permanent Registers. -; - - .reg OSsta0, gr80 ; Spill Address Register - .reg OSsta1, gr81 ; Fill Address Register - .reg OSsta2, gr82 ; Signal Address Register - .reg OSsta3, gr83 ; pcb Register - - .reg OSsta4, gr84 ; - .reg OSsta5, gr85 ; - .reg OSsta6, gr86 ; - .reg OSsta7, gr87 ; - - .reg OSsta8, gr88 ; - .reg OSsta9, gr89 ; - .reg OSsta10, gr90 ; - .reg OSsta11, gr91 ; - - .reg OSsta12, gr92 ; - .reg OSsta13, gr93 ; - .reg OSsta14, gr94 ; - .reg OSsta15, gr95 ; - -; -; Round 2 of Name Assignments -; - -; -; Assignment of Specific Use oriented names to statics. -; - .reg SpillAddrReg, gr80 - .reg FillAddrReg, gr81 - .reg SignalAddrReg, gr82 - .reg pcb, gr83 - - .reg etx, gr80 - .reg ety, gr81 - .reg etz, gr82 - .reg etc, gr83 - -;* - - .reg TimerExt, gr84 - .reg TimerUtil, gr85 - -;* - - .reg LEDReg, gr86 - .reg ERRReg, gr87 - - .reg eta, gr86 - .reg etb, gr87 - -;* - - -;* The following registers are used by switching code - - .reg et0, gr88 - .reg et1, gr89 - .reg et2, gr90 - .reg et3, gr91 - - .reg et4, gr92 - .reg et5, gr93 - .reg et6, gr94 - .reg et7, gr95 - - -; The floating point trap handlers need a few static registers - - .reg FPStat0, gr88 - .reg FPStat1, gr89 - .reg FPStat2, gr90 - .reg FPStat3, gr91 - -; The following registers are used temporarily during diagnostics. - - .reg XLINXReg, gr92 - .reg VMBCReg, gr93 - .reg UARTReg, gr94 - .reg ETHERReg, gr95 - -;* - -;;* - .reg heapptr, gr90 - .reg ArgvPtr, gr91 -;;* - - - -; -;* Preparing to export Register Names for the Linkers benefit. -; - - .equ RSpillAddrReg, &SpillAddrReg - .equ RFillAddrReg, &FillAddrReg - .equ RSignalAddrReg, &SignalAddrReg - .equ Rpcb, &pcb - - .equ Retx, &etx - .equ Rety, &ety - .equ Retz, &etz - .equ Reta, &eta - - .equ Retb, &etb - .equ Retc, &etc - .equ RTimerExt, &TimerExt - .equ RTimerUtil, &TimerUtil - - .equ RLEDReg, &LEDReg - .equ RERRReg, &ERRReg - - .equ Ret0, &et0 - .equ Ret1, &et1 - .equ Ret2, &et2 - .equ Ret3, &et3 - - .equ RFPStat0, &FPStat0 - .equ RFPStat1, &FPStat1 - .equ RFPStat2, &FPStat2 - .equ RFPStat3, &FPStat3 - - .equ Rheapptr, &heapptr - .equ RHeapPtr, &heapptr - .equ RArgvPtr, &ArgvPtr - - .equ Ret4, &et4 - .equ Ret5, &et5 - .equ Ret6, &et6 - .equ Ret7, &et7 - - .equ RXLINXReg, &XLINXReg - .equ RVMBCReg, &VMBCReg - .equ RUARTReg, &UARTReg - .equ RETHERReg, ÐERReg - - .global RSpillAddrReg, RFillAddrReg, RSignalAddrReg - .global Rpcb, Retc - .global RTimerExt, RTimerUtil, RLEDReg, RERRReg - .global Ret0, Ret1, Ret2, Ret3, Ret4, Ret5, Ret6, Ret7, Reta, Retb - .global Retx, Rety, Retz - .global RFPStat0, RFPStat1, RFPStat2, RFPStat3 - .global Rheapptr, RHeapPtr, RArgvPtr - .global RXLINXReg, RVMBCReg, RUARTReg, RETHERReg - -; -;************************************************************************* -; - - -; -; Rule 3: -; Gr96-Gr127 Compiler & Programmer use registers. -; 32 Registers for Compiler & Programmer use - -; -; 16 Registers for Compiler Use. -; - -; -; Compiler Temporaries and Function Return Values -; - - .reg v0, gr96 ; First word of Return Value - .reg v1, gr97 - .reg v2, gr98 - .reg v3, gr99 - - .reg v4, gr100 - .reg v5, gr101 - .reg v6, gr102 - .reg v7, gr103 - - .reg v8, gr104 - .reg v9, gr105 - .reg v10, gr106 - .reg v11, gr107 - - .reg v12, gr108 - .reg v13, gr109 - .reg v14, gr110 - .reg v15, gr111 - - .equ Rv0, &v0 - .equ Rv1, &v1 - .equ Rv2, &v2 - .equ Rv3, &v3 - - .equ Rv4, &v4 - .equ Rv5, &v5 - .equ Rv6, &v6 - .equ Rv7, &v7 - - .equ Rv8, &v8 - .equ Rv9, &v9 - .equ Rv10, &v10 - .equ Rv11, &v11 - - .equ Rv12, &v12 - .equ Rv13, &v13 - .equ Rv14, &v14 - .equ Rv15, &v15 - - .global Rv0, Rv1, Rv2, Rv3, Rv4, Rv5, Rv6, Rv7, Rv8, Rv9 - .global Rv10, Rv11, Rv12, Rv13, Rv14, Rv15 - - -; -; User Process Statics Registers -; - - .reg rp0, gr112 ; Reserved for Programmer, #0 - .reg rp1, gr113 ; Reserved for Programmer, #1 - .reg rp2, gr114 ; Reserved for Programmer, #2 - .reg rp3, gr115 ; Reserved for Programmer, #3 - - .equ Rrp0, &rp0 - .equ Rrp1, &rp1 - .equ Rrp2, &rp2 - .equ Rrp3, &rp3 - - .global Rrp0, Rrp1, Rrp2, Rrp3 - -; -; Compiler Temporaries II -; - - .reg tv0, gr116 ; - .reg tv1, gr117 ; - .reg tv2, gr118 ; - .reg tv3, gr119 ; - .reg tv4, gr120 ; - - .equ Rtv0, &tv0 ; - .equ Rtv1, &tv1 ; - .equ Rtv2, &tv2 ; - .equ Rtv3, &tv3 ; - .equ Rtv4, &tv4 ; - - .global Rtv0, Rtv1, Rtv2, Rtv3, Rtv4 - -; -; Special pointers and registers for handlers and stack operations. -; - - .reg tav, gr121 ; Temp, Arg for Trap Handlers - .reg tpc, gr122 ; Temp, Ret PC for Trap Handlers - .reg lrp, gr123 ; Large Return Pointer - .reg slp, gr124 ; Static Link Pointer - - .reg msp, gr125 ; Memory Stack Pointer - .reg rab, gr126 ; Register Allocate Bound - .reg rfb, gr127 ; Register Free Bound - - .equ Rtav, &tav - .equ Rtpc, &tpc - .equ Rlrp, &lrp - .equ Rslp, &slp - .equ Rmsp, &msp - .equ Rrab, &rab - .equ Rrfb, &rfb - - .global Rtav, Rtpc, Rlrp, Rslp, Rmsp, Rrab, Rrfb -- cgit v1.2.3