From b73e57bffe6cf60b1817bb2fc244a2f0c602bd5c Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Fri, 9 Jul 1999 17:08:48 +0000
Subject: Patch from Jiri Gaisler <jgais@ws.estec.esa.nl>:

  + interrupt masking correction
  + FPU rev.B workaround
  + minor erc32 related fixes
---
 c/src/lib/libcpu/sparc/include/erc32.h | 14 +++++++-------
 1 file changed, 7 insertions(+), 7 deletions(-)

(limited to 'c/src/lib/libcpu/sparc/include/erc32.h')

diff --git a/c/src/lib/libcpu/sparc/include/erc32.h b/c/src/lib/libcpu/sparc/include/erc32.h
index aa0eef05d9..bfcec909b7 100644
--- a/c/src/lib/libcpu/sparc/include/erc32.h
+++ b/c/src/lib/libcpu/sparc/include/erc32.h
@@ -345,7 +345,7 @@ extern ERC32_Register_Map ERC32_MEC;
   do { \
     unsigned32 _level; \
     \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
     ERC32_MEC.Test_Control = ERC32_MEC.Test_Control | 0x80000; \
     ERC32_MEC.Interrupt_Force = (1 << (_source)); \
     sparc_enable_interrupts( _level ); \
@@ -361,7 +361,7 @@ extern ERC32_Register_Map ERC32_MEC;
   do { \
     unsigned32 _level; \
     \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       ERC32_MEC.Interrupt_Mask |= (1 << (_source)); \
     sparc_enable_interrupts( _level ); \
   } while (0)
@@ -370,7 +370,7 @@ extern ERC32_Register_Map ERC32_MEC;
   do { \
     unsigned32 _level; \
     \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       ERC32_MEC.Interrupt_Mask &= ~(1 << (_source)); \
     sparc_enable_interrupts( _level ); \
   } while (0)
@@ -380,7 +380,7 @@ extern ERC32_Register_Map ERC32_MEC;
     unsigned32 _level; \
     unsigned32 _mask = 1 << (_source); \
     \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       (_previous) = ERC32_MEC.Interrupt_Mask; \
       ERC32_MEC.Interrupt_Mask = _previous | _mask; \
     sparc_enable_interrupts( _level ); \
@@ -392,7 +392,7 @@ extern ERC32_Register_Map ERC32_MEC;
     unsigned32 _level; \
     unsigned32 _mask = 1 << (_source); \
     \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       ERC32_MEC.Interrupt_Mask = \
         (ERC32_MEC.Interrupt_Mask & ~_mask) | (_previous); \
     sparc_enable_interrupts( _level ); \
@@ -464,7 +464,7 @@ extern unsigned32 _ERC32_MEC_Timer_Control_Mirror;
     unsigned32 __value; \
     \
     __value = ((_value) & 0x0f); \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       _control = _ERC32_MEC_Timer_Control_Mirror; \
       _control &= ERC32_MEC_TIMER_COUNTER_DEFINED_MASK << 8; \
       _ERC32_MEC_Timer_Control_Mirror = _control | _value; \
@@ -493,7 +493,7 @@ extern unsigned32 _ERC32_MEC_Timer_Control_Mirror;
     unsigned32 __value; \
     \
     __value = ((_value) & 0x0f) << 8; \
-    sparc_disable_interrupts( _level ); \
+    _level = sparc_disable_interrupts(); \
       _control = _ERC32_MEC_Timer_Control_Mirror; \
       _control &= ERC32_MEC_TIMER_COUNTER_DEFINED_MASK; \
       _ERC32_MEC_Timer_Control_Mirror = _control | __value; \
-- 
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