From f55215a8373204fa5a8dd48ab3704cf32655917b Mon Sep 17 00:00:00 2001
From: Sebastian Huber <sebastian.huber@embedded-brains.de>
Date: Tue, 10 Sep 2013 08:50:24 +0200
Subject: bsps: Fix cache manager support

---
 c/src/lib/libcpu/sparc/cache/cache.c  | 8 ++++++++
 c/src/lib/libcpu/sparc/cache/cache_.h | 1 +
 2 files changed, 9 insertions(+)

(limited to 'c/src/lib/libcpu/sparc/cache')

diff --git a/c/src/lib/libcpu/sparc/cache/cache.c b/c/src/lib/libcpu/sparc/cache/cache.c
index aae7284bb3..e87f7c0fc6 100644
--- a/c/src/lib/libcpu/sparc/cache/cache.c
+++ b/c/src/lib/libcpu/sparc/cache/cache.c
@@ -14,6 +14,14 @@ void _CPU_cache_invalidate_entire_instruction ( void )
 }
 
 /* XXX these need to be addressed */
+
+void _CPU_cache_invalidate_instruction_range(
+  const void *i_addr,
+  size_t n_bytes
+)
+{
+}
+
 void _CPU_cache_freeze_instruction ( void )
 {
 }
diff --git a/c/src/lib/libcpu/sparc/cache/cache_.h b/c/src/lib/libcpu/sparc/cache/cache_.h
index 8d54d37e2d..81852a20c5 100644
--- a/c/src/lib/libcpu/sparc/cache/cache_.h
+++ b/c/src/lib/libcpu/sparc/cache/cache_.h
@@ -15,6 +15,7 @@
  */
 
 #if defined(HAS_INSTRUCTION_CACHE)
+#define CPU_CACHE_SUPPORT_PROVIDES_RANGE_FUNCTIONS
 #define CPU_INSTRUCTION_CACHE_ALIGNMENT 0
 #endif
 
-- 
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