From 3906b3eaa1589e60ffd902091e60eaaaacdde1b3 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Fri, 16 Apr 2004 21:29:43 +0000 Subject: Remove stray white spaces. --- c/src/lib/libcpu/sh/sh7045/clock/ckinit.c | 30 ++--- c/src/lib/libcpu/sh/sh7045/include/io_types.h | 6 +- c/src/lib/libcpu/sh/sh7045/include/iosh7045.h | 10 +- c/src/lib/libcpu/sh/sh7045/include/ispsh7045.h | 4 +- c/src/lib/libcpu/sh/sh7045/include/sci.h | 16 +-- c/src/lib/libcpu/sh/sh7045/include/sci_termios.h | 16 +-- c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h | 2 +- c/src/lib/libcpu/sh/sh7045/sci/sci.c | 62 ++++----- c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c | 154 +++++++++++------------ c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c | 24 ++-- c/src/lib/libcpu/sh/sh7045/score/ispsh7045.c | 84 ++++++------- c/src/lib/libcpu/sh/sh7045/timer/timer.c | 10 +- 12 files changed, 209 insertions(+), 209 deletions(-) (limited to 'c/src/lib/libcpu/sh/sh7045') diff --git a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c index c8fdb4b5a6..76c08a690e 100644 --- a/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c +++ b/c/src/lib/libcpu/sh/sh7045/clock/ckinit.c @@ -9,7 +9,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -91,7 +91,7 @@ static uint32_t Clock_isrs_const; /* only calculated once */ /* * These are set by clock driver during its init */ - + rtems_device_major_number rtems_clock_major = ~0; rtems_device_minor_number rtems_clock_minor; @@ -150,8 +150,8 @@ void Install_clock( { uint8_t temp8 = 0; uint32_t factor = 1000000; - - + + /* * Initialize the clock tick device driver variables */ @@ -159,7 +159,7 @@ void Install_clock( Clock_driver_ticks = 0; Clock_isrs_const = rtems_configuration_get_microseconds_per_tick() / 10000; Clock_isrs = Clock_isrs_const; - + factor /= rtems_configuration_get_microseconds_per_tick(); /* minimalization of integer division error */ Clock_MHZ = rtems_cpu_configuration_get_clicks_per_second() / factor ; @@ -168,7 +168,7 @@ void Install_clock( /* * Hardware specific initialize goes here */ - + /* stop Timer 0 */ temp8 = read8( MTU_TSTR) & MTU0_STARTMASK; write8( temp8, MTU_TSTR); @@ -188,8 +188,8 @@ void Install_clock( write8( MTU0_TCRMASK , MTU_TCR0); /* use GRA without I/O - pins */ - write8( MTU0_TIORVAL, MTU_TIORL0); - + write8( MTU0_TIORVAL, MTU_TIORL0); + /* reset flags of the status register */ temp8 = read8( MTU_TSR0) & MTU0_STAT_MASK; write8( temp8, MTU_TSR0); @@ -204,7 +204,7 @@ void Install_clock( /* set counter limits */ write16( _MTU_COUNTER0_MICROSECOND, MTU_GR0A); - + /* start counter */ temp8 = read8( MTU_TSTR) |~MTU0_STARTMASK; write8( temp8, MTU_TSTR); @@ -254,14 +254,14 @@ rtems_device_driver Clock_initialize( ) { Install_clock( Clock_isr ); - + /* * make major/minor avail to others such as shared memory driver */ - + rtems_clock_major = major; rtems_clock_minor = minor; - + return RTEMS_SUCCESSFUL; } @@ -273,14 +273,14 @@ rtems_device_driver Clock_control( { uint32_t isrlevel; rtems_libio_ioctl_args_t *args = pargp; - + if (args != 0) { /* * This is hokey, but until we get a defined interface * to do this, it will just be this simple... */ - + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) { Clock_isr(CLOCK_VECTOR); @@ -290,7 +290,7 @@ rtems_device_driver Clock_control( rtems_isr_entry ignored ; rtems_interrupt_disable( isrlevel ); rtems_interrupt_catch( args->buffer, CLOCK_VECTOR, &ignored ); - + rtems_interrupt_enable( isrlevel ); } } diff --git a/c/src/lib/libcpu/sh/sh7045/include/io_types.h b/c/src/lib/libcpu/sh/sh7045/include/io_types.h index 25cfcd7473..3a873e0d6b 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/io_types.h +++ b/c/src/lib/libcpu/sh/sh7045/include/io_types.h @@ -30,10 +30,10 @@ * * ************************************************************************/ - + #ifndef _sh_io_types_h #define _sh_io_types_h - + #include #include @@ -46,7 +46,7 @@ typedef struct { portNo line; int speed_ix; dataBits dBits; - int parEn; + int parEn; parity par; int mulPro; stopBits sBits; diff --git a/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h b/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h index 9025b35d4f..76e5c25fe5 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h +++ b/c/src/lib/libcpu/sh/sh7045/include/iosh7045.h @@ -7,7 +7,7 @@ * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and * Bernd Becker (becker@faw.uni-ulm.de) * - * Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which + * Based on "iosh7030.h" distributed with Hitachi's EVB's tutorials, which * contained no copyright notice. * * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany @@ -15,7 +15,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -24,8 +24,8 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * Modified to reflect on-chip registers for sh7045 processor, based on - * "Register.h" distributed with Hitachi's EVB7045F tutorials, and which + * Modified to reflect on-chip registers for sh7045 processor, based on + * "Register.h" distributed with Hitachi's EVB7045F tutorials, and which * contained no copyright notice: * John M. Mills (jmills@tga.com) * TGA Technologies, Inc. @@ -46,7 +46,7 @@ /* * After each line is explained whether the access is char short or long. - * The functions read/writeb, w, l, 8, 16, 32 can be found + * The functions read/writeb, w, l, 8, 16, 32 can be found * in exec/score/cpu/sh/sh_io.h * * 8 bit == char ( readb, writeb, read8, write8) diff --git a/c/src/lib/libcpu/sh/sh7045/include/ispsh7045.h b/c/src/lib/libcpu/sh/sh7045/include/ispsh7045.h index db351ae978..c9bf946419 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/ispsh7045.h +++ b/c/src/lib/libcpu/sh/sh7045/include/ispsh7045.h @@ -10,7 +10,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -24,7 +24,7 @@ * TGA Technologies, Inc. * 100 Pinnacle Way, Suite 140 * Norcross, GA 30071 U.S.A. - * + * * * This modified file may be copied and distributed in accordance * the above-referenced license. It is provided for critique and diff --git a/c/src/lib/libcpu/sh/sh7045/include/sci.h b/c/src/lib/libcpu/sh/sh7045/include/sci.h index 966a4bb85b..989ec696f0 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/sci.h +++ b/c/src/lib/libcpu/sh/sh7045/include/sci.h @@ -9,7 +9,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -32,12 +32,12 @@ extern "C" { /* * Devices are set to 9600 bps, 8 databits, 1 stopbit, no - * parity and asynchronous mode by default. + * parity and asynchronous mode by default. * * NOTE: - * The onboard serial devices of the SH do not support hardware + * The onboard serial devices of the SH do not support hardware * handshake. - */ + */ #define DEVSCI_DRIVER_TABLE_ENTRY \ { sh_sci_initialize, sh_sci_open, sh_sci_close, sh_sci_read, \ @@ -78,11 +78,11 @@ extern rtems_device_driver sh_sci_control( rtems_device_minor_number, void * ); - -extern const rtems_termios_callbacks * sh_sci_get_termios_handlers( - rtems_boolean poll + +extern const rtems_termios_callbacks * sh_sci_get_termios_handlers( + rtems_boolean poll ); - + #ifdef __cplusplus } diff --git a/c/src/lib/libcpu/sh/sh7045/include/sci_termios.h b/c/src/lib/libcpu/sh/sh7045/include/sci_termios.h index a0eaa28cae..6dade64fc5 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/sci_termios.h +++ b/c/src/lib/libcpu/sh/sh7045/include/sci_termios.h @@ -18,7 +18,7 @@ extern "C"{ #endif -int sh_sci_set_attributes( +int sh_sci_set_attributes( int minor, const struct termios *t ); @@ -26,31 +26,31 @@ int sh_sci_set_attributes( void sh_sci_initialize_interrupts(int minor); void sh_sci_init(int minor); - + int sh_sci_write_support_int( - int minor, - const char *buf, + int minor, + const char *buf, int len ); - + int sh_sci_write_support_polled( int minor, const char *buf, int len ); - + void sh_sci_write_polled( int minor, char c ); int sh_sci_inbyte_nonblocking_polled(int minor); - + int sh_sci_first_open( int major, int minor, - void *arg + void *arg ); int sh_sci_last_close( diff --git a/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h b/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h index de367d52fb..51a5f4de34 100644 --- a/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h +++ b/c/src/lib/libcpu/sh/sh7045/include/sh7_pfc.h @@ -191,7 +191,7 @@ #define PB1MD0 0x0004 #define PB0MD1 0x0002 #define PB0MD0 0x0001 - + #define PB7MD PB7MD1|PB7MD0 #define PB6MD PB6MD1|PB6MD0 #define PB5MD PB5MD1|PB5MD0 diff --git a/c/src/lib/libcpu/sh/sh7045/sci/sci.c b/c/src/lib/libcpu/sh/sh7045/sci/sci.c index a3cbcc613d..f78f36179d 100644 --- a/c/src/lib/libcpu/sh/sh7045/sci/sci.c +++ b/c/src/lib/libcpu/sh/sh7045/sci/sci.c @@ -1,12 +1,12 @@ /* * /dev/sci[0|1] for Hitachi SH 704X * - * The SH doesn't have a designated console device. Therefore we "alias" - * another device as /dev/console and revector all calls to /dev/console + * The SH doesn't have a designated console device. Therefore we "alias" + * another device as /dev/console and revector all calls to /dev/console * to this device. * - * This approach is similar to installing a sym-link from one device to - * another device. If rtems once will support sym-links for devices files, + * This approach is similar to installing a sym-link from one device to + * another device. If rtems once will support sym-links for devices files, * this implementation could be dropped. * * Author: Ralf Corsepius (corsepiu@faw.uni-ulm.de) @@ -16,7 +16,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -61,9 +61,9 @@ /* * NOTE: Some SH variants have 3 sci devices */ - + #define SCI_MINOR_DEVICES 2 - + /* * FIXME: sh7045 register names match Hitachi data book, * but conflict with RTEMS sh7032 usage. @@ -106,13 +106,13 @@ static int _sci_set_cflags( { uint8_t smr ; uint8_t brr ; - + if ( c_cflag & CBAUD ) { if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 ) return -1 ; } - + if ( c_cflag & CSIZE ) { if ( c_cflag & CS8 ) @@ -137,10 +137,10 @@ static int _sci_set_cflags( smr |= SCI_ODD_PARITY ; else smr &= ~SCI_ODD_PARITY; - + write8( smr, sci_dev->addr + SCI_SMR ); write8( brr, sci_dev->addr + SCI_BRR ); - + return 0 ; } @@ -255,7 +255,7 @@ char sh_sci_inbyte_polled( rtems_device_minor_number minor ) { char ch; - + if (minor == 0) /* blocks until char.ready */ while (rdSCI0(&ch) != TRUE); /* SCI0 */ else @@ -296,8 +296,8 @@ rtems_device_driver sh_sci_initialize( rtems_device_driver status; rtems_device_minor_number i; rtems_driver_name_t driver; - - + + /* * register all possible devices. * the initialization of the hardware is done by sci_open @@ -341,22 +341,22 @@ rtems_device_driver sh_sci_open( { uint8_t temp8; uint16_t temp16; - + unsigned a ; - + /* check for valid minor number */ if(( minor > ( SCI_MINOR_DEVICES -1 )) || ( minor < 0 )) { return RTEMS_INVALID_NUMBER; } - + /* device already opened */ if ( sci_device[minor].opened > 0 ) { sci_device[minor].opened++ ; return RTEMS_SUCCESSFUL ; } - + /* set PFC registers to enable I/O pins */ if ((minor == 0)) { @@ -364,8 +364,8 @@ rtems_device_driver sh_sci_open( temp16 &= ~(PA2MD1 | PA2MD0); temp16 |= (PA_TXD0 | PA_RXD0); /* enable pins for Tx0, Rx0 */ write16(temp16, PFC_PACRL2); - - } else if (minor == 1) { + + } else if (minor == 1) { temp16 = read16(PFC_PACRL2); /* disable SCK1, DMA, IRQ */ temp16 &= ~(PA5MD1 | PA5MD0); temp16 |= (PA_TXD1 | PA_RXD1); /* enable pins for Tx1, Rx1 */ @@ -390,24 +390,24 @@ rtems_device_driver sh_sci_open( while(temp8 & (SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER)){ temp8 = read8(sci_device[minor].addr + SCI_RDR); /* flush input */ temp8 = read8(sci_device[minor].addr + SCI_SSR); /* clear some flags */ - write8(temp8 & ~(SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER), + write8(temp8 & ~(SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER), sci_device[minor].addr + SCI_SSR); temp8 = read8(sci_device[minor].addr + SCI_SSR); /* check if everything is OK */ - } + } /* Clear RDRF flag */ write8(0x00, sci_device[minor].addr + SCI_TDR); /* force output */ /* Clear the TDRE bit */ temp8 = read8(sci_device[minor].addr + SCI_SSR) & ~SCI_TDRE; write8(temp8, sci_device[minor].addr + SCI_SSR); - + /* add interrupt setup if required */ - + sci_device[minor].opened++ ; return RTEMS_SUCCESSFUL ; } - + /* * Close entry point */ @@ -423,7 +423,7 @@ rtems_device_driver sh_sci_close( sci_device[minor].opened-- ; else return RTEMS_INVALID_NUMBER ; - + return RTEMS_SUCCESSFUL ; } @@ -441,7 +441,7 @@ rtems_device_driver sh_sci_read( char *buffer; int maximum; int count = 0; - + rw_args = (rtems_libio_rw_args_t *) arg; buffer = rw_args->buffer; @@ -460,7 +460,7 @@ rtems_device_driver sh_sci_read( } /* - * write bytes to the serial port. Stdout and stderr are the same. + * write bytes to the serial port. Stdout and stderr are the same. */ rtems_device_driver sh_sci_write( @@ -527,7 +527,7 @@ static int _sh_sci_poll_read(int minor) { int value = -1; char ch; - + if( minor == 0 ){ if( rdSCI0( &ch ) ) value = (int) ch; @@ -539,12 +539,12 @@ static int _sh_sci_poll_read(int minor) } /* - * Termios polled write + * Termios polled write */ static int _sh_sci_poll_write(int minor, const char *buf, int len) { int count; - + for(count = 0; count < len; count++) outbyte( minor, buf[count] ); return count; diff --git a/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c b/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c index 8f00ad9c38..ef9e510f66 100644 --- a/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c +++ b/c/src/lib/libcpu/sh/sh7045/sci/sci_termios.c @@ -34,7 +34,7 @@ #include -/* +/* * Some handy macros */ #define SH_SCI_REG_DATA(_data, _minor, _register) \ @@ -51,22 +51,22 @@ /* * NOTE: Some SH variants have 3 sci devices */ - + #define SCI_MINOR_DEVICES 2 -/* - * Automatically generated function imported from scitab.rel +/* + * Automatically generated function imported from scitab.rel */ extern int _sci_get_brparms( tcflag_t cflag, unsigned char *smr, unsigned char *brr ); -/* +/* * Translate termios flags into SCI settings */ -int sh_sci_set_attributes( +int sh_sci_set_attributes( int minor, const struct termios *t ) @@ -74,7 +74,7 @@ int sh_sci_set_attributes( uint8_t smr ; uint8_t brr ; int a; - + tcflag_t c_cflag = t->c_cflag; if ( c_cflag & CBAUD ) @@ -82,7 +82,7 @@ int sh_sci_set_attributes( if ( _sci_get_brparms( c_cflag, &smr, &brr ) != 0 ) return -1 ; } - + if ( c_cflag & CSIZE ) { if ( c_cflag & CS8 ) @@ -109,34 +109,34 @@ int sh_sci_set_attributes( smr &= ~SCI_ODD_PARITY; SH_SCI_REG_MASK((SCI_RE | SCI_TE), minor, SCI_SCR); - + SH_SCI_REG_DATA(smr, minor, SCI_SMR); SH_SCI_REG_DATA(brr, minor, SCI_BRR); - + for(a=0; a < 10000L; a++) { /* Delay one bit */ asm volatile ("nop"); } SH_SCI_REG_FLAG((SCI_RE | SCI_TE), minor, SCI_SCR); - + return 0; } -/* +/* * Receive-data-full ISR * - * The same routine for all interrupt sources of the same type. + * The same routine for all interrupt sources of the same type. */ rtems_isr sh_sci_rx_isr(rtems_vector_number vector) { int minor; - + for(minor = 0; minor < Console_Port_Count; minor++) { if(Console_Port_Tbl[minor].ulIntVector == vector) - { + { uint8_t temp8; - + /* * FIXME: error handling should be added */ @@ -152,7 +152,7 @@ rtems_isr sh_sci_rx_isr(rtems_vector_number vector) } } -/* +/* * Transmit-data-empty ISR * * The same routine for all interrupt sources of the same type. @@ -165,11 +165,11 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) { if(Console_Port_Tbl[minor].ulDataPort == vector) { - /* + /* * FIXME: Error handling should be added */ - - /* + + /* * Mask end-of-transmission interrupt */ SH_SCI_REG_MASK(SCI_TIE, minor, SCI_SCR); @@ -177,7 +177,7 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) if(rtems_termios_dequeue_characters( Console_Port_Data[minor].termios_data, 1)) { - /* + /* * More characters to be received - interrupt must be enabled */ SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); @@ -188,38 +188,38 @@ rtems_isr sh_sci_tx_isr(rtems_vector_number vector) } -/* +/* * Initialization of serial port */ void sh_sci_init(int minor) { uint16_t temp16; - - /* - * set PFC registers to enable I/O pins + + /* + * set PFC registers to enable I/O pins */ - if ((minor == 0)) + if ((minor == 0)) { temp16 = read16(PFC_PACRL2); /* disable SCK0, DMA, IRQ */ temp16 &= ~(PA2MD1 | PA2MD0); temp16 |= (PA_TXD0 | PA_RXD0); /* enable pins for Tx0, Rx0 */ write16(temp16, PFC_PACRL2); - - } - else if (minor == 1) - { + + } + else if (minor == 1) + { temp16 = read16(PFC_PACRL2); /* disable SCK1, DMA, IRQ */ temp16 &= ~(PA5MD1 | PA5MD0); temp16 |= (PA_TXD1 | PA_RXD1); /* enable pins for Tx1, Rx1 */ write16(temp16, PFC_PACRL2); - } + } - /* + /* * Non-default hardware setup occurs in sh_sci_first_open */ } -/* +/* * Initialization of interrupts * * Interrupts can be started only after opening a device, so interrupt @@ -231,22 +231,22 @@ void sh_sci_initialize_interrupts(int minor) rtems_status_code status; sh_sci_init(minor); - /* + /* * Disable IRQ of SCIx */ status = sh_set_irq_priority( - Console_Port_Tbl[minor].ulIntVector, 0); + Console_Port_Tbl[minor].ulIntVector, 0); if(status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); SH_SCI_REG_MASK(SCI_RIE, minor, SCI_SCR); - /* + /* * Catch apropriate vectors */ status = rtems_interrupt_catch( - sh_sci_rx_isr, + sh_sci_rx_isr, Console_Port_Tbl[minor].ulIntVector, &old_isr); @@ -260,14 +260,14 @@ void sh_sci_initialize_interrupts(int minor) if(status != RTEMS_SUCCESSFUL) rtems_fatal_error_occurred(status); - - /* - * Enable IRQ of SCIx + + /* + * Enable IRQ of SCIx */ SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); status = sh_set_irq_priority( - Console_Port_Tbl[minor].ulIntVector, + Console_Port_Tbl[minor].ulIntVector, Console_Port_Tbl[minor].ulCtrlPort2); if(status != RTEMS_SUCCESSFUL) @@ -287,21 +287,21 @@ int sh_sci_first_open( { uint8_t temp8; unsigned int a ; - - /* - * check for valid minor number + + /* + * check for valid minor number */ if(( minor > ( SCI_MINOR_DEVICES -1 )) || ( minor < 0 )) { return RTEMS_INVALID_NUMBER; } - /* - * set up SCI registers + /* + * set up SCI registers */ /* Clear SCR - disable Tx and Rx */ SH_SCI_REG_DATA(0x00, minor, SCI_SCR); - + /* set SMR and BRR - baudrate and format */ sh_sci_set_attributes(minor, Console_Port_Tbl[minor].pDeviceParams); @@ -312,8 +312,8 @@ int sh_sci_first_open( write8((SCI_RE | SCI_TE), /* enable async. Tx and Rx */ Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SCR); - /* - * clear error flags + /* + * clear error flags */ temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); while(temp8 & (SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER)) @@ -323,25 +323,25 @@ int sh_sci_first_open( /* clear some flags */ SH_SCI_REG_FLAG((SCI_RDRF | SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); - + /* check if everything is OK */ temp8 = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR); - } - + } + /* Clear RDRF flag */ SH_SCI_REG_DATA(0x00, minor, SCI_TDR); /* force output */ - + /* Clear the TDRE bit */ SH_SCI_REG_FLAG(SCI_TDRE, minor, SCI_SSR); - - /* - * Interrupt setup + + /* + * Interrupt setup */ if(Console_Port_Tbl[minor].pDeviceFns->deviceOutputUsesInterrupts) { SH_SCI_REG_FLAG(SCI_RIE, minor, SCI_SCR); } - + return RTEMS_SUCCESSFUL ; } @@ -365,12 +365,12 @@ int sh_sci_last_close( return RTEMS_SUCCESSFUL ; } -/* +/* * Interrupt aware write routine */ int sh_sci_write_support_int( - int minor, - const char *buf, + int minor, + const char *buf, int len ) { @@ -381,15 +381,15 @@ int sh_sci_write_support_int( */ SH_SCI_REG_DATA(*buf, minor, SCI_TDR); SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); - /* + /* * Enable interrupt */ SH_SCI_REG_FLAG(SCI_TIE, minor, SCI_SCR); - + return 1; } -/* +/* * Polled write method */ int sh_sci_write_support_polled( @@ -399,19 +399,19 @@ int sh_sci_write_support_polled( ) { int count = 0; - + while(count < len) { sh_sci_write_polled(minor, buf[count]); count++; } - /* + /* * Return number of bytes written */ return count; } -/* +/* * Polled write of one character at a time */ void sh_sci_write_polled( @@ -419,45 +419,45 @@ void sh_sci_write_polled( char c ) { - /* + /* * Wait for end of previous character */ while(!(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_TDRE)); - /* + /* * Send the character */ SH_SCI_REG_DATA(c, minor, SCI_TDR); - - /* + + /* * Clear TDRE flag */ SH_SCI_REG_MASK(SCI_TDRE, minor, SCI_SSR); } -/* - * Non-blocking read +/* + * Non-blocking read */ int sh_sci_inbyte_nonblocking_polled(int minor) { uint8_t inbyte; - /* + /* * Check if input buffer is full */ if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & SCI_RDRF) { inbyte = read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_RDR); SH_SCI_REG_MASK(SCI_RDRF, minor, SCI_SSR); - - /* + + /* * Check for errors */ - if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & + if(read8(Console_Port_Tbl[minor].ulCtrlPort1 + SCI_SSR) & (SCI_ORER | SCI_FER | SCI_PER)) { SH_SCI_REG_MASK((SCI_ORER | SCI_FER | SCI_PER), minor, SCI_SSR); return -1; - } + } return (int)inbyte; } return -1; diff --git a/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c b/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c index 821f00e6da..5b370582d7 100644 --- a/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c +++ b/c/src/lib/libcpu/sh/sh7045/score/cpu_asm.c @@ -13,7 +13,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -48,23 +48,23 @@ extern proc_ptr _Hardware_isr_Table[]; unsigned long *_old_stack_ptr; #endif -register unsigned long *stack_ptr asm("r15"); +register unsigned long *stack_ptr asm("r15"); -/* +/* * sh_set_irq_priority - * + * * this function sets the interrupt level of the specified interrupt * * parameters: - * - irq : interrupt number + * - irq : interrupt number * - prio: priority to set for this interrupt number * * returns: 0 if ok * -1 on error */ -unsigned int sh_set_irq_priority( - unsigned int irq, +unsigned int sh_set_irq_priority( + unsigned int irq, unsigned int prio ) { uint32_t shiftcount; @@ -90,7 +90,7 @@ unsigned int sh_set_irq_priority( { irq = irq - 72; shiftcount = 12 - ((irq & ~0x03) % 16); - + switch( irq / 16) { case 0: { prioreg = INTC_IPRC; break;} @@ -185,7 +185,7 @@ void _CPU_Context_restore_fp( */ /* - * FIXME: This is an ugly hack, but we wanted to avoid recalculating + * FIXME: This is an ugly hack, but we wanted to avoid recalculating * the offset each time Context_Control is changed */ void __CPU_Context_switch( @@ -253,10 +253,10 @@ __CPU_Context_restore:\n\ nop" ); } -/* +/* * This routine provides the RTEMS interrupt management. */ - + void __ISR_Handler( uint32_t vector) { register uint32_t level; @@ -293,7 +293,7 @@ void __ISR_Handler( uint32_t vector) if( _ISR_Nest_level == 0 ) /* restore old stack pointer */ - stack_ptr = _old_stack_ptr; + stack_ptr = _old_stack_ptr; #endif _CPU_ISR_Enable( level ); diff --git a/c/src/lib/libcpu/sh/sh7045/score/ispsh7045.c b/c/src/lib/libcpu/sh/sh7045/score/ispsh7045.c index d58600173a..7ba9745830 100644 --- a/c/src/lib/libcpu/sh/sh7045/score/ispsh7045.c +++ b/c/src/lib/libcpu/sh/sh7045/score/ispsh7045.c @@ -3,8 +3,8 @@ * From these procedures __ISR_Handler is called with the vector number * as argument. * - * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in - * some releases of gcc doesn't properly handle #pragma interrupt, if a + * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in + * some releases of gcc doesn't properly handle #pragma interrupt, if a * file contains both isrs and normal functions. * * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and @@ -15,7 +15,7 @@ * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE - * + * * * COPYRIGHT (c) 1998. * On-Line Applications Research Corporation (OAR). @@ -54,23 +54,23 @@ proc_ptr _Hardware_isr_Table[256]={ _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* PWRon Reset, Maual Reset,...*/ -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _nmi_isp, _usb_isp, /* irq 11, 12*/ -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, /* trapa 0 -31 */ -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, -_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, _irq0_isp, _irq1_isp, _irq2_isp, _irq3_isp, /* external H/W: irq 64-71 */ _irq4_isp, _irq5_isp, _irq6_isp, _irq7_isp, _dma0_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* DMAC: irq 72-87*/ @@ -78,15 +78,15 @@ _dma1_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dma2_isp, _dummy_isp, _dummy_isp, _dummy_isp, _dma3_isp, _dummy_isp, _dummy_isp, _dummy_isp, _mtua0_isp, _mtub0_isp, _mtuc0_isp, _mtud0_isp, /* MTUs: irq 88-127 */ -_mtuv0_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_mtuv0_isp, _dummy_isp, _dummy_isp, _dummy_isp, _mtua1_isp, _mtub1_isp, _dummy_isp, _dummy_isp, -_mtuv1_isp, _mtuu1_isp, _dummy_isp, _dummy_isp, +_mtuv1_isp, _mtuu1_isp, _dummy_isp, _dummy_isp, _mtua2_isp, _mtub2_isp, _dummy_isp, _dummy_isp, -_mtuv2_isp, _mtuu2_isp, _dummy_isp, _dummy_isp, +_mtuv2_isp, _mtuu2_isp, _dummy_isp, _dummy_isp, _mtua3_isp, _mtub3_isp, _mtuc3_isp, _mtud3_isp, -_mtuv3_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_mtuv3_isp, _dummy_isp, _dummy_isp, _dummy_isp, _mtua4_isp, _mtub4_isp, _mtuc4_isp, _mtud4_isp, -_mtuv4_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_mtuv4_isp, _dummy_isp, _dummy_isp, _dummy_isp, _eri0_isp, _rxi0_isp, _txi0_isp, _tei0_isp, /* SCI0-1: irq 128-135*/ _eri1_isp, _rxi1_isp, _txi1_isp, _tei1_isp, _adi0_isp, _adi1_isp, _dummy_isp, _dummy_isp, /* ADC0-1: irq 136-139*/ @@ -102,7 +102,7 @@ _oei_isp, /* I/O Port: irq 156*/ /* * Some versions of gcc and all version of egcs at least until egcs-1.1b - * are not able to handle #pragma interrupt correctly if more than 1 isr is + * are not able to handle #pragma interrupt correctly if more than 1 isr is * contained in a file and when optimizing. * We try to work around this problem by using the macro below. */ @@ -148,8 +148,8 @@ asm (".global _"Str(name)"\n\t"\ ".long "Str(number)); /************************************************ - * Dummy interrupt service procedure for - * interrupts being not allowed --> Trap 34 + * Dummy interrupt service procedure for + * interrupts being not allowed --> Trap 34 ************************************************/ asm(" .section .text\n\ .global __dummy_isp\n\ @@ -167,17 +167,17 @@ __dummy_isp:\n\ /***************************** - * Non maskable interrupt + * Non maskable interrupt *****************************/ isp( _nmi_isp, NMI_ISP_V, ___ISR_Handler); -/***************************** - * User break controller +/***************************** + * User break controller *****************************/ isp( _usb_isp, USB_ISP_V, ___ISR_Handler); /***************************** - * External interrupts 0-7 + * External interrupts 0-7 *****************************/ isp( _irq0_isp, IRQ0_ISP_V, ___ISR_Handler); isp( _irq1_isp, IRQ1_ISP_V, ___ISR_Handler); @@ -189,7 +189,7 @@ isp( _irq6_isp, IRQ6_ISP_V, ___ISR_Handler); isp( _irq7_isp, IRQ7_ISP_V, ___ISR_Handler); /***************************** - * DMA - controller + * DMA - controller *****************************/ isp( _dma0_isp, DMA0_ISP_V, ___ISR_Handler); isp( _dma1_isp, DMA1_ISP_V, ___ISR_Handler); @@ -197,12 +197,12 @@ isp( _dma2_isp, DMA2_ISP_V, ___ISR_Handler); isp( _dma3_isp, DMA3_ISP_V, ___ISR_Handler); -/***************************** - * Match timer unit +/***************************** + * Match timer unit *****************************/ /***************************** - * Timer 0 + * Timer 0 *****************************/ isp( _mtua0_isp, MTUA0_ISP_V, ___ISR_Handler); isp( _mtub0_isp, MTUB0_ISP_V, ___ISR_Handler); @@ -246,7 +246,7 @@ isp( _mtuv4_isp, MTUV4_ISP_V, ___ISR_Handler); /***************************** - * Serial interfaces + * Serial interfaces *****************************/ /***************************** @@ -266,36 +266,36 @@ isp( _txi1_isp, TXI1_ISP_V, ___ISR_Handler); isp( _tei1_isp, TEI1_ISP_V, ___ISR_Handler); -/****************************** +/****************************** * A/D converters - * ADC0-1 + * ADC0-1 ******************************/ isp( _adi0_isp, ADI0_ISP_V, ___ISR_Handler); isp( _adi1_isp, ADI1_ISP_V, ___ISR_Handler); /****************************** - * Data transfer controller + * Data transfer controller ******************************/ isp( _dtci_isp, DTC_ISP_V, ___ISR_Handler); /****************************** - * Counter match timer + * Counter match timer ******************************/ isp( _cmt0_isp, CMT0_ISP_V, ___ISR_Handler); isp( _cmt1_isp, CMT1_ISP_V, ___ISR_Handler); /****************************** - * Watchdog timer + * Watchdog timer ******************************/ isp( _wdt_isp, WDT_ISP_V, ___ISR_Handler); /****************************** - * DRAM refresh control unit - * of bus state controller + * DRAM refresh control unit + * of bus state controller ******************************/ isp( _bsc_isp, CMI_ISP_V, ___ISR_Handler); @@ -306,8 +306,8 @@ isp( _oei_isp, OEI_ISP_V, ___ISR_Handler); /***************************** - * Parity control unit of - * the bus state controller + * Parity control unit of + * the bus state controller * NOT PROVIDED IN SH-2 *****************************/ /* isp( _prt_isp, PRT_ISP_V, ___ISR_Handler); */ diff --git a/c/src/lib/libcpu/sh/sh7045/timer/timer.c b/c/src/lib/libcpu/sh/sh7045/timer/timer.c index 3a551faf7c..24ff587064 100644 --- a/c/src/lib/libcpu/sh/sh7045/timer/timer.c +++ b/c/src/lib/libcpu/sh/sh7045/timer/timer.c @@ -1,5 +1,5 @@ /* - * timer for the Hitachi SH 704X + * timer for the Hitachi SH 704X * * This file manages the benchmark timer used by the RTEMS Timing Test * Suite. Each measured time period is demarcated by calls to @@ -69,7 +69,7 @@ void Timer_initialize( void ) rtems_isr *ignored; Timer_MHZ = rtems_cpu_configuration_get_clicks_per_second() / 1000000 ; - + /* * Timer has never overflowed. This may not be necessary on some * implemenations of timer but .... @@ -150,10 +150,10 @@ int Read_timer( void ) /* * Read the timer and see how many clicks it has been since we started. */ - + clicks = read16( MTU_TCNT1); /* XXX: read some HW here */ - + /* * Total is calculated by taking into account the number of timer overflow * interrupts since the timer was initialized and clicks since the last @@ -164,7 +164,7 @@ int Read_timer( void ) if ( Timer_driver_Find_average_overhead ) return total / SCALE; /* in XXX microsecond units */ - else + else { if ( total < LEAST_VALID ) return 0; /* below timer resolution */ -- cgit v1.2.3