From 359e5374164ccb2a66833354b412a859c144ea2f Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Mon, 30 Nov 2009 05:09:41 +0000 Subject: Whitespace removal. --- c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S') diff --git a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S index 30bda4face..34fc13092e 100644 --- a/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S +++ b/c/src/lib/libcpu/powerpc/mpc6xx/exceptions/asm_utils.S @@ -25,11 +25,11 @@ codemove: beq 7f /* Protect against 0 count */ mtctr r0 bge cr1,2f - + la r8,-4(r4) la r7,-4(r3) 1: lwzu r0,4(r8) - stwu r0,4(r7) + stwu r0,4(r7) bdnz 1b b 4f @@ -39,23 +39,23 @@ codemove: 3: lwzu r0,-4(r8) stwu r0,-4(r7) bdnz 3b - + /* Now flush the cache: note that we must start from a cache aligned - * address. Otherwise we might miss one cache line. + * address. Otherwise we might miss one cache line. */ 4: cmpwi r6,0 add r5,r3,r5 - beq 7f /* Always flush prefetch queue in any case */ + beq 7f /* Always flush prefetch queue in any case */ subi r0,r6,1 andc r3,r3,r0 mr r4,r3 -5: cmplw r4,r5 +5: cmplw r4,r5 dcbst 0,r4 add r4,r4,r6 blt 5b sync /* Wait for all dcbst to complete on bus */ mr r4,r3 -6: cmplw r4,r5 +6: cmplw r4,r5 icbi 0,r4 add r4,r4,r6 blt 6b -- cgit v1.2.3