From f62c7daa6482d74bb9b5275d8d4cc5c487ff9081 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 14 Oct 2014 14:10:22 -0500 Subject: mpc5xx libcpu and ss555 BSP: Fix warnings --- c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) (limited to 'c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c') diff --git a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c index 7b9cfd079d..3ba7e8f505 100644 --- a/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c +++ b/c/src/lib/libcpu/powerpc/mpc5xx/irq/irq_init.c @@ -3,8 +3,9 @@ * * This file contains the implementation of rtems initialization * related to interrupt handling. - * - * + */ + +/* * MPC5xx port sponsored by Defence Research and Development Canada - Suffield * Copyright (C) 2004, Real-Time Systems Inc. (querbach@realtime.bc.ca) * @@ -89,7 +90,7 @@ static rtems_irq_prio irqPrioTable[CPU_IRQ_COUNT]={ 0 }; -void CPU_USIU_irq_init(void) +static void CPU_USIU_irq_init(void) { /* * In theory we should initialize two registers at least : SIMASK and @@ -106,8 +107,7 @@ void CPU_USIU_irq_init(void) /* * Initialize UIMB interrupt management */ -void -CPU_UIMB_irq_init(void) +static void CPU_UIMB_irq_init(void) { } -- cgit v1.2.3