From c743b4809126d8fdea70a7c4ee78c4f1d6bb5482 Mon Sep 17 00:00:00 2001 From: Jay Monkman Date: Fri, 25 Feb 2005 05:19:43 +0000 Subject: 2005-02-24 Jay Monkman * at91rm9200/include/at91rm9200_emac.h: Cleanup. --- c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) (limited to 'c/src/lib/libcpu/arm/at91rm9200') diff --git a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h index abc490b9a9..41a8fe2614 100644 --- a/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h +++ b/c/src/lib/libcpu/arm/at91rm9200/include/at91rm9200_emac.h @@ -83,6 +83,7 @@ #define EMAC_CFG_CLK_16 (1 << 10) // MII Clock = HCLK divided by 16 #define EMAC_CFG_CLK_32 (2 << 10) // MII Clock = HCLK divided by 32 #define EMAC_CFG_CLK_64 (3 << 10) // MII Clock = HCLK divided by 64 +#define EMAC_CFG_CLK_MASK (3 << 10) // MII Clock mask #define EMAC_CFG_RTY BIT12 // Retry Test Mode - Must be 0 #define EMAC_CFG_RMII BIT13 // Reduced MII Mode Enable @@ -128,12 +129,13 @@ // PHY Maintenance Register, EMAC_MAN, Offset 0x34 #define EMAC_MAN_DATA(_x_) ((_x_ & 0xFFFF) << 0) // PHY data register -#define EMAC_MAN_CODE (0x3 << 6) // IEEE Code +#define EMAC_MAN_CODE (0x2 << 16) // IEEE Code #define EMAC_MAN_REGA(_x_) ((_x_ & 0x1F) << 18) // PHY register address #define EMAC_MAN_PHYA(_x_) ((_x_ & 0x1F) << 23) // PHY address #define EMAC_MAN_WRITE (0x1 << 28) // Transfer is a write #define EMAC_MAN_READ (0x2 << 28) // Transfer is a read #define EMAC_MAN_HIGH BIT30 // Must be set +#define EMAC_MAN_LOW BIT31 // Bit assignments for Receive Buffer Descriptor // Address - Word 0 -- cgit v1.2.3