From a982e0c6397b93625eb8246547bed6a08ee24542 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 18 Oct 2000 18:24:43 +0000 Subject: 2000-10-18 Sergei Organov * Added full support for MPC505. * mpc505/ictrl: New directory. * configure.in, mpc505/Makefile.am: Modified to reflect ictrl addition. * mpc505/ictrl/.cvsignore, mpc505/ictrl/Makefile.am, mpc505/ictrl/ictrl.c, mpc505/ictrl/ictrl.h: New files. * mpc505/timer/timer.c: Use , not "rtems.h". * mpc505/vectors/Makefile.am: alignment exception handler now included. * mpc505/vectors/vectors.S: Now use constants for exception numbers. * old_exception_processing/ppc_offs.h: New file. * old_exception_processing/Makefile.am: Account for ppc_offs.h. * old_exception_processing/cpu.h: Make Nest and Disable levels volatile. * old_exception_processing/cpu_asm.S: Offsets moved to ppc_offs.h. --- .../support/old_exception_processing/Makefile.am | 4 +- .../powerpc/support/old_exception_processing/cpu.h | 4 +- .../support/old_exception_processing/cpu_asm.S | 162 +------------------- .../support/old_exception_processing/ppc_offs.h | 166 +++++++++++++++++++++ 4 files changed, 171 insertions(+), 165 deletions(-) create mode 100644 c/src/lib/libbsp/powerpc/support/old_exception_processing/ppc_offs.h (limited to 'c/src/lib/libbsp') diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/Makefile.am b/c/src/lib/libbsp/powerpc/support/old_exception_processing/Makefile.am index 2ab7117b4d..62caa2c4bd 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/Makefile.am +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/Makefile.am @@ -9,7 +9,7 @@ C_FILES = cpu.c C_O_FILES = $(C_FILES:%.c=${ARCH}/%.o) ROOT_H_FILES = -RTEMS_SCORE_H_FILES = cpu.h c_isr.inl +RTEMS_SCORE_H_FILES = cpu.h c_isr.inl ppc_offs.h noinst_HEADERS = $(ROOT_H_FILES) $(RTEMS_SCORE_H_FILES) # Assembly source names @@ -54,6 +54,6 @@ CLEANDIRS = ../o-optimize ../o-debug ../o-profile UNUSED_FILES = irq_stub.S -EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) +EXTRA_DIST = TODO rtems.S $(C_FILES) $(S_FILES) $(UNUSED_FILES) ppc_offs.h include $(top_srcdir)/../../../../../automake/local.am diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h index f4bb158a00..1c468624fe 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu.h @@ -602,8 +602,8 @@ SCORE_EXTERN void *_CPU_Interrupt_stack_high; SCORE_EXTERN struct { - unsigned32 *Nest_level; - unsigned32 *Disable_level; + unsigned32 volatile* Nest_level; + unsigned32 volatile* Disable_level; void *Vector_table; void *Stack; #if (PPC_ABI == PPC_ABI_POWEROPEN) diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S index a377fa5d2a..6ce006521e 100644 --- a/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/cpu_asm.S @@ -33,167 +33,7 @@ */ #include - -/* - * Offsets for various Contexts - */ - .set GP_1, 0 - .set GP_2, (GP_1 + 4) - .set GP_13, (GP_2 + 4) - .set GP_14, (GP_13 + 4) - - .set GP_15, (GP_14 + 4) - .set GP_16, (GP_15 + 4) - .set GP_17, (GP_16 + 4) - .set GP_18, (GP_17 + 4) - - .set GP_19, (GP_18 + 4) - .set GP_20, (GP_19 + 4) - .set GP_21, (GP_20 + 4) - .set GP_22, (GP_21 + 4) - - .set GP_23, (GP_22 + 4) - .set GP_24, (GP_23 + 4) - .set GP_25, (GP_24 + 4) - .set GP_26, (GP_25 + 4) - - .set GP_27, (GP_26 + 4) - .set GP_28, (GP_27 + 4) - .set GP_29, (GP_28 + 4) - .set GP_30, (GP_29 + 4) - - .set GP_31, (GP_30 + 4) - .set GP_CR, (GP_31 + 4) - .set GP_PC, (GP_CR + 4) - .set GP_MSR, (GP_PC + 4) - -#if (PPC_HAS_DOUBLE == 1) - .set FP_0, 0 - .set FP_1, (FP_0 + 8) - .set FP_2, (FP_1 + 8) - .set FP_3, (FP_2 + 8) - .set FP_4, (FP_3 + 8) - .set FP_5, (FP_4 + 8) - .set FP_6, (FP_5 + 8) - .set FP_7, (FP_6 + 8) - .set FP_8, (FP_7 + 8) - .set FP_9, (FP_8 + 8) - .set FP_10, (FP_9 + 8) - .set FP_11, (FP_10 + 8) - .set FP_12, (FP_11 + 8) - .set FP_13, (FP_12 + 8) - .set FP_14, (FP_13 + 8) - .set FP_15, (FP_14 + 8) - .set FP_16, (FP_15 + 8) - .set FP_17, (FP_16 + 8) - .set FP_18, (FP_17 + 8) - .set FP_19, (FP_18 + 8) - .set FP_20, (FP_19 + 8) - .set FP_21, (FP_20 + 8) - .set FP_22, (FP_21 + 8) - .set FP_23, (FP_22 + 8) - .set FP_24, (FP_23 + 8) - .set FP_25, (FP_24 + 8) - .set FP_26, (FP_25 + 8) - .set FP_27, (FP_26 + 8) - .set FP_28, (FP_27 + 8) - .set FP_29, (FP_28 + 8) - .set FP_30, (FP_29 + 8) - .set FP_31, (FP_30 + 8) - .set FP_FPSCR, (FP_31 + 8) -#else - .set FP_0, 0 - .set FP_1, (FP_0 + 4) - .set FP_2, (FP_1 + 4) - .set FP_3, (FP_2 + 4) - .set FP_4, (FP_3 + 4) - .set FP_5, (FP_4 + 4) - .set FP_6, (FP_5 + 4) - .set FP_7, (FP_6 + 4) - .set FP_8, (FP_7 + 4) - .set FP_9, (FP_8 + 4) - .set FP_10, (FP_9 + 4) - .set FP_11, (FP_10 + 4) - .set FP_12, (FP_11 + 4) - .set FP_13, (FP_12 + 4) - .set FP_14, (FP_13 + 4) - .set FP_15, (FP_14 + 4) - .set FP_16, (FP_15 + 4) - .set FP_17, (FP_16 + 4) - .set FP_18, (FP_17 + 4) - .set FP_19, (FP_18 + 4) - .set FP_20, (FP_19 + 4) - .set FP_21, (FP_20 + 4) - .set FP_22, (FP_21 + 4) - .set FP_23, (FP_22 + 4) - .set FP_24, (FP_23 + 4) - .set FP_25, (FP_24 + 4) - .set FP_26, (FP_25 + 4) - .set FP_27, (FP_26 + 4) - .set FP_28, (FP_27 + 4) - .set FP_29, (FP_28 + 4) - .set FP_30, (FP_29 + 4) - .set FP_31, (FP_30 + 4) - .set FP_FPSCR, (FP_31 + 4) -#endif - - .set IP_LINK, 0 -#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) - .set IP_0, (IP_LINK + 56) -#else - .set IP_0, (IP_LINK + 8) -#endif - .set IP_2, (IP_0 + 4) - - .set IP_3, (IP_2 + 4) - .set IP_4, (IP_3 + 4) - .set IP_5, (IP_4 + 4) - .set IP_6, (IP_5 + 4) - - .set IP_7, (IP_6 + 4) - .set IP_8, (IP_7 + 4) - .set IP_9, (IP_8 + 4) - .set IP_10, (IP_9 + 4) - - .set IP_11, (IP_10 + 4) - .set IP_12, (IP_11 + 4) - .set IP_13, (IP_12 + 4) - .set IP_28, (IP_13 + 4) - - .set IP_29, (IP_28 + 4) - .set IP_30, (IP_29 + 4) - .set IP_31, (IP_30 + 4) - .set IP_CR, (IP_31 + 4) - - .set IP_CTR, (IP_CR + 4) - .set IP_XER, (IP_CTR + 4) - .set IP_LR, (IP_XER + 4) - .set IP_PC, (IP_LR + 4) - - .set IP_MSR, (IP_PC + 4) - .set IP_END, (IP_MSR + 16) - - /* _CPU_IRQ_info offsets */ - - /* These must be in this order */ - .set Nest_level, 0 - .set Disable_level, 4 - .set Vector_table, 8 - .set Stack, 12 -#if (PPC_ABI == PPC_ABI_POWEROPEN) - .set Dispatch_r2, 16 - .set Switch_necessary, 20 -#else - .set Default_r2, 16 -#if (PPC_ABI != PPC_ABI_GCC27) - .set Default_r13, 20 - .set Switch_necessary, 24 -#else - .set Switch_necessary, 20 -#endif -#endif - .set Signal, Switch_necessary + 4 - .set msr_initial, Signal + 4 +#include "ppc_offs.h" BEGIN_CODE /* diff --git a/c/src/lib/libbsp/powerpc/support/old_exception_processing/ppc_offs.h b/c/src/lib/libbsp/powerpc/support/old_exception_processing/ppc_offs.h new file mode 100644 index 0000000000..d319107aaa --- /dev/null +++ b/c/src/lib/libbsp/powerpc/support/old_exception_processing/ppc_offs.h @@ -0,0 +1,166 @@ +/* -*- asm -*- */ +#ifndef __PPC_OFFS_H +#define __PPC_OFFS_H + +/* + * Offsets for various Contexts + */ + .set GP_1, 0 + .set GP_2, (GP_1 + 4) + .set GP_13, (GP_2 + 4) + .set GP_14, (GP_13 + 4) + + .set GP_15, (GP_14 + 4) + .set GP_16, (GP_15 + 4) + .set GP_17, (GP_16 + 4) + .set GP_18, (GP_17 + 4) + + .set GP_19, (GP_18 + 4) + .set GP_20, (GP_19 + 4) + .set GP_21, (GP_20 + 4) + .set GP_22, (GP_21 + 4) + + .set GP_23, (GP_22 + 4) + .set GP_24, (GP_23 + 4) + .set GP_25, (GP_24 + 4) + .set GP_26, (GP_25 + 4) + + .set GP_27, (GP_26 + 4) + .set GP_28, (GP_27 + 4) + .set GP_29, (GP_28 + 4) + .set GP_30, (GP_29 + 4) + + .set GP_31, (GP_30 + 4) + .set GP_CR, (GP_31 + 4) + .set GP_PC, (GP_CR + 4) + .set GP_MSR, (GP_PC + 4) + +#if (PPC_HAS_DOUBLE == 1) + .set FP_0, 0 + .set FP_1, (FP_0 + 8) + .set FP_2, (FP_1 + 8) + .set FP_3, (FP_2 + 8) + .set FP_4, (FP_3 + 8) + .set FP_5, (FP_4 + 8) + .set FP_6, (FP_5 + 8) + .set FP_7, (FP_6 + 8) + .set FP_8, (FP_7 + 8) + .set FP_9, (FP_8 + 8) + .set FP_10, (FP_9 + 8) + .set FP_11, (FP_10 + 8) + .set FP_12, (FP_11 + 8) + .set FP_13, (FP_12 + 8) + .set FP_14, (FP_13 + 8) + .set FP_15, (FP_14 + 8) + .set FP_16, (FP_15 + 8) + .set FP_17, (FP_16 + 8) + .set FP_18, (FP_17 + 8) + .set FP_19, (FP_18 + 8) + .set FP_20, (FP_19 + 8) + .set FP_21, (FP_20 + 8) + .set FP_22, (FP_21 + 8) + .set FP_23, (FP_22 + 8) + .set FP_24, (FP_23 + 8) + .set FP_25, (FP_24 + 8) + .set FP_26, (FP_25 + 8) + .set FP_27, (FP_26 + 8) + .set FP_28, (FP_27 + 8) + .set FP_29, (FP_28 + 8) + .set FP_30, (FP_29 + 8) + .set FP_31, (FP_30 + 8) + .set FP_FPSCR, (FP_31 + 8) +#else + .set FP_0, 0 + .set FP_1, (FP_0 + 4) + .set FP_2, (FP_1 + 4) + .set FP_3, (FP_2 + 4) + .set FP_4, (FP_3 + 4) + .set FP_5, (FP_4 + 4) + .set FP_6, (FP_5 + 4) + .set FP_7, (FP_6 + 4) + .set FP_8, (FP_7 + 4) + .set FP_9, (FP_8 + 4) + .set FP_10, (FP_9 + 4) + .set FP_11, (FP_10 + 4) + .set FP_12, (FP_11 + 4) + .set FP_13, (FP_12 + 4) + .set FP_14, (FP_13 + 4) + .set FP_15, (FP_14 + 4) + .set FP_16, (FP_15 + 4) + .set FP_17, (FP_16 + 4) + .set FP_18, (FP_17 + 4) + .set FP_19, (FP_18 + 4) + .set FP_20, (FP_19 + 4) + .set FP_21, (FP_20 + 4) + .set FP_22, (FP_21 + 4) + .set FP_23, (FP_22 + 4) + .set FP_24, (FP_23 + 4) + .set FP_25, (FP_24 + 4) + .set FP_26, (FP_25 + 4) + .set FP_27, (FP_26 + 4) + .set FP_28, (FP_27 + 4) + .set FP_29, (FP_28 + 4) + .set FP_30, (FP_29 + 4) + .set FP_31, (FP_30 + 4) + .set FP_FPSCR, (FP_31 + 4) +#endif + + .set IP_LINK, 0 +#if (PPC_ABI == PPC_ABI_POWEROPEN || PPC_ABI == PPC_ABI_GCC27) + .set IP_0, (IP_LINK + 56) +#else + .set IP_0, (IP_LINK + 8) +#endif + .set IP_2, (IP_0 + 4) + + .set IP_3, (IP_2 + 4) + .set IP_4, (IP_3 + 4) + .set IP_5, (IP_4 + 4) + .set IP_6, (IP_5 + 4) + + .set IP_7, (IP_6 + 4) + .set IP_8, (IP_7 + 4) + .set IP_9, (IP_8 + 4) + .set IP_10, (IP_9 + 4) + + .set IP_11, (IP_10 + 4) + .set IP_12, (IP_11 + 4) + .set IP_13, (IP_12 + 4) + .set IP_28, (IP_13 + 4) + + .set IP_29, (IP_28 + 4) + .set IP_30, (IP_29 + 4) + .set IP_31, (IP_30 + 4) + .set IP_CR, (IP_31 + 4) + + .set IP_CTR, (IP_CR + 4) + .set IP_XER, (IP_CTR + 4) + .set IP_LR, (IP_XER + 4) + .set IP_PC, (IP_LR + 4) + + .set IP_MSR, (IP_PC + 4) + .set IP_END, (IP_MSR + 16) + + /* _CPU_IRQ_info offsets */ + + /* These must be in this order */ + .set Nest_level, 0 + .set Disable_level, 4 + .set Vector_table, 8 + .set Stack, 12 +#if (PPC_ABI == PPC_ABI_POWEROPEN) + .set Dispatch_r2, 16 + .set Switch_necessary, 20 +#else + .set Default_r2, 16 +#if (PPC_ABI != PPC_ABI_GCC27) + .set Default_r13, 20 + .set Switch_necessary, 24 +#else + .set Switch_necessary, 20 +#endif +#endif + .set Signal, Switch_necessary + 4 + .set msr_initial, Signal + 4 + +#endif /* __PPC_OFFS_H */ -- cgit v1.2.3