From a86f3aac965e39414f19d7e67ed50400583cd598 Mon Sep 17 00:00:00 2001 From: Thomas Doerfler Date: Fri, 11 Jul 2008 10:01:37 +0000 Subject: adapted powerpc BSPs to new exception code --- c/src/lib/libbsp/ChangeLog | 6 --- c/src/lib/libbsp/powerpc/ChangeLog | 17 +++++++ c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c | 38 +++++---------- .../lib/libbsp/powerpc/gen5200/startup/bspstart.c | 6 +-- c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c | 5 +- .../libbsp/powerpc/mpc8260ads/startup/bspstart.c | 5 +- .../lib/libbsp/powerpc/mvme3100/startup/bspstart.c | 54 +++++++++------------ .../lib/libbsp/powerpc/mvme5500/startup/bspstart.c | 39 ++++++--------- c/src/lib/libbsp/powerpc/psim/startup/bspstart.c | 40 +++++----------- c/src/lib/libbsp/powerpc/shared/startup/bspstart.c | 55 +++++++++------------- c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c | 5 +- c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c | 7 ++- c/src/lib/libbsp/shared/ChangeLog | 12 +++++ c/src/lib/libbsp/shared/bootcard.c | 13 ++++- 14 files changed, 136 insertions(+), 166 deletions(-) (limited to 'c/src/lib/libbsp') diff --git a/c/src/lib/libbsp/ChangeLog b/c/src/lib/libbsp/ChangeLog index 61d088bdc4..7ddebbb32f 100644 --- a/c/src/lib/libbsp/ChangeLog +++ b/c/src/lib/libbsp/ChangeLog @@ -1,9 +1,3 @@ -2008-07-09 Sebastian Huber - - * shared/include/irq-config.h, shared/include/irq-generic.h, - shared/src/irq-generic.c, shared/src/irq-legacy.c: Generic BSP - interrupt handler support. - 2008-01-16 Ralf Corsepius * Makefile.am: Fix indentation. diff --git a/c/src/lib/libbsp/powerpc/ChangeLog b/c/src/lib/libbsp/powerpc/ChangeLog index a9787deccb..edd3ee28d2 100644 --- a/c/src/lib/libbsp/powerpc/ChangeLog +++ b/c/src/lib/libbsp/powerpc/ChangeLog @@ -1,3 +1,20 @@ +2008-07-11 Sebastian Huber + + * ep1a/startup/bspstart.c, mvme3100/startup/bspstart.c, + mvme5500/startup/bspstart.c, psim/startup/bspstart.c, + shared/startup/bspstart.c: The usage of SPRG0 as changed. It is now + used to store the interrupt disable mask. See bootcard.c and + ppc_exc_initialize() for default initialization. + + Update to new exception initialization routine ppc_exc_initialize(). + The exception low level code has changed, see libcpu/powerpc/ChangeLog. + + * gen5200/startup/bspstart.c, mbx8xx/startup/bspstart.c, + mpc8260ads/startup/bspstart.c, ss555/startup/bspstart.c, + virtex/startup/bspstart.c: The usage of SPRG0 as changed. It is now + used to store the interrupt disable mask. See bootcard.c for default + initialization. + 2008-07-10 Till Straumann * shared/flash/spansionFlash.c: removed "m" memory diff --git a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c index 798bceae68..b39b1ff391 100644 --- a/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ep1a/startup/bspstart.c @@ -14,6 +14,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -45,7 +47,6 @@ unsigned int rsPMCQ1Init(); uint32_t bsp_clicks_per_usec; -SPR_RW(SPRG0) SPR_RW(SPRG1) uint8_t LightIdx = 0; @@ -327,8 +328,8 @@ void Read_ep1a_config_registers( ppc_cpu_id_t myCpu ) { void bsp_start( void ) { unsigned char *stack; - register uint32_t intrStack; - register uint32_t *intrStackPtr; + uint32_t intrStackStart; + uint32_t intrStackSize; unsigned char *work_space_start; ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; @@ -373,32 +374,19 @@ ShowBATS(); *((uint32_t *)stack) = 0; /* - * Initialize the interrupt related settings - * SPRG1 = software managed IRQ stack - * - * This could be done latter (e.g in IRQ_INIT) but it helps to understand - * some settings below... + * Initialize the interrupt related settings. */ - intrStack = ((uint32_t) __rtems_end) + - INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size() - - PPC_MINIMUM_STACK_FRAME_SIZE; - - /* make sure it's properly aligned */ - intrStack &= ~(CPU_STACK_ALIGNMENT-1); - - /* tag the bottom (T. Straumann 6/36/2001 ) */ - intrStackPtr = (uint32_t*) intrStack; - *intrStackPtr = 0; - - _write_SPRG1((unsigned int)intrStack); - - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; + intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* - * Initialize default raw exception hanlders. See vectors/vectors_init.c + * Initialize default raw exception hanlders. */ - initialize_exceptions(); + ppc_exc_initialize( + PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize + ); /* * Init MMU block address translation to enable hardware diff --git a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c index 0c84535be6..7794185a6a 100644 --- a/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/gen5200/startup/bspstart.c @@ -94,6 +94,8 @@ /* */ /***********************************************************************/ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -113,7 +115,6 @@ bd_t *uboot_bdinfo_ptr = (bd_t *)1; /* will be overwritten from startup code */ bd_t uboot_bdinfo_copy; /* will be overwritten with copy of bdinfo */ #endif -SPR_RW(SPRG0) SPR_RW(SPRG1) extern unsigned long intrStackPtr; @@ -253,9 +254,6 @@ void bsp_start(void) _write_SPRG1((unsigned int)intrStack); - /* Signal them that this BSP has fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); - bsp_clicks_per_usec = (IPB_CLOCK/1000000); /* diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c index a0b9aaa84c..092ce203bd 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/bspstart.c @@ -18,6 +18,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -29,7 +31,6 @@ #include #include -SPR_RW(SPRG0) SPR_RW(SPRG1) extern unsigned long intrStackPtr; @@ -163,8 +164,6 @@ void bsp_start(void) intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); /* * Install our own set of exception vectors diff --git a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c index 58c2ad6cf9..a4426ace31 100644 --- a/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mpc8260ads/startup/bspstart.c @@ -35,6 +35,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include /* @@ -53,7 +55,6 @@ #include -SPR_RW(SPRG0) SPR_RW(SPRG1) extern unsigned long intrStackPtr; @@ -220,8 +221,6 @@ void bsp_start(void) intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); - /* signal that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); /* printk( "About to call initialize_exceptions\n" ); diff --git a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c index 561ecb61c5..b3d309c828 100644 --- a/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mvme3100/startup/bspstart.c @@ -19,6 +19,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -51,7 +53,6 @@ extern unsigned long __rtems_end[]; extern void bsp_cleanup(void); extern void BSP_vme_config(); -SPR_RW(SPRG0) SPR_RW(SPRG1) /* @@ -238,8 +239,8 @@ SPR_RW(HID1) void bsp_start( void ) { unsigned char *stack; -register uint32_t intrStack; -register uint32_t *intrStackPtr; +uint32_t intrStackStart; +uint32_t intrStackSize; unsigned char *work_space_start; char *chpt; ppc_cpu_id_t myCpu; @@ -286,40 +287,27 @@ VpdBufRec vpdData [] = { *((uint32_t*)stack) = 0; /* - * Initialize the interrupt related settings - * SPRG1 = software managed IRQ stack - * - * This could be done later (e.g in IRQ_INIT) but it helps to understand - * some settings below... + * Initialize the interrupt related settings. */ - BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + INTR_STACK_SIZE; - - /* reserve space for the marker/tag frame */ - intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE; - - /* make sure it's properly aligned */ - intrStack &= ~(CPU_STACK_ALIGNMENT-1); - - /* tag the bottom (T. Straumann 6/36/2001 ) */ - intrStackPtr = (uint32_t*) intrStack; - *intrStackPtr = 0; - - _write_SPRG1(intrStack); - - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; + intrStackSize = INTR_STACK_SIZE; + BSP_heap_start = intrStackStart + intrStackSize; /* - * Initialize default raw exception handlers. See vectors/vectors_init.c + * Initialize default raw exception handlers. */ - initialize_exceptions(); + ppc_exc_initialize( + PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize + ); printk("CPU 0x%x - rev 0x%x\n", myCpu, myCpuRevision); #ifdef SHOW_MORE_INIT_SETTINGS printk("Additionnal boot options are %s\n", BSP_commandline_string); printk("Initial system stack at %x\n", stack); - printk("Software IRQ stack at %x\n", intrStack); + printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize); #endif #ifdef SHOW_MORE_INIT_SETTINGS @@ -418,14 +406,16 @@ VpdBufRec vpdData [] = { __asm__ __volatile ("sc"); /* - * Somehow doing the above seems to clobber SPRG0 on the mvme2100. It - * is probably a not so subtle hint that you do not want to use PPCBug - * once RTEMS is up and running. Anyway, we still needs to indicate - * that we have fixed PR288. Eventually, this should go away. + * Somehow doing the above seems to clobber SPRG0 on the mvme2100. The + * interrupt disable mask is stored in SPRG0. Is this a problem? */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT); + #endif +/* See above */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + if ( (chpt = strstr(BSP_commandline_string,"MEMSZ=")) ) { char *endp; uint32_t sz; diff --git a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c index b35e014aaf..9ff8355be5 100644 --- a/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/mvme5500/startup/bspstart.c @@ -24,6 +24,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include #include @@ -74,7 +76,6 @@ extern void BSP_vme_config(void); uint32_t bsp_clicks_per_usec; -SPR_RW(SPRG0) SPR_RW(SPRG1) typedef struct CmdLineRec_ { @@ -249,8 +250,8 @@ void bsp_start( void ) #ifdef SHOW_LCR3_REGISTER unsigned l3cr; #endif - register uint32_t intrStack; - register uint32_t *intrStackPtr; + uint32_t intrStackStart; + uint32_t intrStackSize; unsigned char *work_space_start; ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; @@ -302,32 +303,20 @@ void bsp_start( void ) *r1sp=0xeeeeeeee; /* - * Initialize the interrupt related settings - * SPRG0 = interrupt nesting level count - * SPRG1 = software managed IRQ stack - * - * This could be done latter (e.g in IRQ_INIT) but it helps to understand - * some settings below... + * Initialize the interrupt related settings. */ - BSP_heap_start = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + - rtems_configuration_get_interrupt_stack_size(); - intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE; - - /* make sure it's properly aligned */ - intrStack &= ~(CPU_STACK_ALIGNMENT-1); - - /* tag the bottom (T. Straumann 6/36/2001 ) */ - intrStackPtr = (uint32_t*) intrStack; - *intrStackPtr = 0; - - _write_SPRG1(intrStack); - - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; + intrStackSize = rtems_configuration_get_interrupt_stack_size(); + BSP_heap_start = intrStackStart + intrStackSize; /* - * Initialize default raw exception hanlders. See vectors/vectors_init.c + * Initialize default raw exception handlers. */ - initialize_exceptions(); + ppc_exc_initialize( + PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize + ); /* * Init MMU block address translation to enable hardware diff --git a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c index 77e5cd4c9f..974a220ca6 100644 --- a/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/psim/startup/bspstart.c @@ -14,6 +14,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include #include @@ -27,11 +29,8 @@ #include #include -SPR_RW(SPRG0) SPR_RW(SPRG1) -void initialize_exceptions(void); - /* On psim, each click of the decrementer register corresponds * to 1 instruction. By setting this to 100, we are indicating * that we are assuming it can execute 100 instructions per @@ -93,8 +92,8 @@ void bsp_get_workarea( void bsp_start( void ) { extern unsigned long __rtems_end[]; - register uint32_t intrStack; - register uint32_t *intrStackPtr; + uint32_t intrStackStart; + uint32_t intrStackSize; /* * Note we can not get CPU identification dynamically, so @@ -115,32 +114,19 @@ void bsp_start( void ) bsp_exceptions_in_RAM = FALSE; /* - * Initialize the interrupt related settings - * SPRG1 = software managed IRQ stack - * - * This could be done latter (e.g in IRQ_INIT) but it helps to understand - * some settings below... + * Initialize the interrupt related settings. */ - intrStack = ((uint32_t) __rtems_end) + INIT_STACK_SIZE + - rtems_configuration_get_interrupt_stack_size() - - PPC_MINIMUM_STACK_FRAME_SIZE; - - /* make sure it's properly aligned */ - intrStack &= ~(CPU_STACK_ALIGNMENT-1); - - /* tag the bottom (T. Straumann 6/36/2001 ) */ - intrStackPtr = (uint32_t*) intrStack; - *intrStackPtr = 0; - - _write_SPRG1(intrStack); - - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; + intrStackSize = rtems_configuration_get_interrupt_stack_size(); /* - * Initialize default raw exception handlers. See vectors/vectors_init.c + * Initialize default raw exception handlers. */ - initialize_exceptions(); + ppc_exc_initialize( + PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize + ); /* * Initalize RTEMS IRQ system diff --git a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c index b8534047b1..b5c0b7333e 100644 --- a/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/shared/startup/bspstart.c @@ -17,6 +17,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -46,7 +48,6 @@ extern Triv121PgTbl BSP_pgtbl_setup(); extern void BSP_pgtbl_activate(); extern void BSP_vme_config(); -SPR_RW(SPRG0) SPR_RW(SPRG1) #if defined(DEBUG_BATS) @@ -149,8 +150,8 @@ void bsp_start( void ) #if !defined(mvme2100) unsigned l2cr; #endif - register uint32_t intrStack; - register uint32_t *intrStackPtr; + uint32_t intrStackStart; + uint32_t intrStackSize; unsigned char *work_space_start; ppc_cpu_id_t myCpu; ppc_cpu_revision_t myCpuRevision; @@ -226,34 +227,20 @@ void bsp_start( void ) *((uint32_t*)stack) = 0; /* - * Initialize the interrupt related settings - * SPRG1 = software managed IRQ stack - * - * This could be done later (e.g in IRQ_INIT) but it helps to understand - * some settings below... + * Initialize the interrupt related settings. */ - BSP_heap_start = ((uint32_t) __rtems_end) + - INIT_STACK_SIZE + rtems_configuration_get_interrupt_stack_size(); - - /* reserve space for the marker/tag frame */ - intrStack = BSP_heap_start - PPC_MINIMUM_STACK_FRAME_SIZE; - - /* make sure it's properly aligned */ - intrStack &= ~(CPU_STACK_ALIGNMENT-1); - - /* tag the bottom (T. Straumann 6/36/2001 ) */ - intrStackPtr = (uint32_t*) intrStack; - *intrStackPtr = 0; - - _write_SPRG1(intrStack); - - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + intrStackStart = (uint32_t) __rtems_end + INIT_STACK_SIZE; + intrStackSize = rtems_configuration_get_interrupt_stack_size(); + BSP_heap_start = intrStackStart + intrStackSize; /* - * Initialize default raw exception handlers. See vectors/vectors_init.c + * Initialize default raw exception handlers. */ - initialize_exceptions(); + ppc_exc_initialize( + PPC_INTERRUPT_DISABLE_MASK_DEFAULT, + intrStackStart, + intrStackSize + ); select_console(CONSOLE_LOG); @@ -285,7 +272,7 @@ void bsp_start( void ) printk("Residuals are located at %x\n", (unsigned) &residualCopy); printk("Additionnal boot options are %s\n", loaderParam); printk("Initial system stack at %x\n",stack); - printk("Software IRQ stack at %x\n",intrStack); + printk("Software IRQ stack starts at %x with size %u\n", intrStackStart, intrStackSize); printk("-----------------------------------------\n"); #endif @@ -330,14 +317,16 @@ void bsp_start( void ) __asm__ __volatile ("sc"); /* - * Somehow doing the above seems to clobber SPRG0 on the mvme2100. It - * is probably a not so subtle hint that you do not want to use PPCBug - * once RTEMS is up and running. Anyway, we still needs to indicate - * that we have fixed PR288. Eventually, this should go away. + * Somehow doing the above seems to clobber SPRG0 on the mvme2100. The + * interrupt disable mask is stored in SPRG0. Is this a problem? */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); + ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT); + #endif +/* See above */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + BSP_mem_size = residualCopy.TotalMemory; BSP_bus_frequency = residualCopy.VitalProductData.ProcessorBusHz; BSP_processor_frequency = residualCopy.VitalProductData.ProcessorHz; diff --git a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c index 86cf311cb6..0949bccca2 100644 --- a/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/ss555/startup/bspstart.c @@ -23,6 +23,8 @@ * $Id$ */ +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -36,7 +38,6 @@ #include #include -SPR_RW(SPRG0) SPR_RW(SPRG1) extern unsigned long intrStackPtr; @@ -143,8 +144,6 @@ void bsp_start(void) */ intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); /* * Install our own set of exception vectors diff --git a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c index 7a4afbc1cc..72832ebc2e 100644 --- a/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/virtex/startup/bspstart.c @@ -55,6 +55,9 @@ * * $Id$ */ + +#warning The interrupt disable mask is now stored in SPRG0, please verify that this is compatible to this BSP (see also bootcard.c). + #include #include @@ -67,7 +70,6 @@ #include #include -SPR_RW(SPRG0) SPR_RW(SPRG1) #include RTEMS_XPARAMETERS_H @@ -186,9 +188,6 @@ void bsp_start( void ) intrStack = (((unsigned char*)&intrStackPtr) - PPC_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); - /* signal them that we have fixed PR288 - eventually, this should go away */ - _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); - /* * Initialize default raw exception handlers. diff --git a/c/src/lib/libbsp/shared/ChangeLog b/c/src/lib/libbsp/shared/ChangeLog index 667032255e..c0a530bcb3 100644 --- a/c/src/lib/libbsp/shared/ChangeLog +++ b/c/src/lib/libbsp/shared/ChangeLog @@ -1,3 +1,15 @@ +2008-07-10 Sebastian Huber + + * bootcard.c: Special case for PowerPC: The interrupt disable + mask is stored in SPRG0. It must be valid before we can use + rtems_interrupt_disable(). + +2008-07-09 Sebastian Huber + + * include/irq-config.h, include/irq-generic.h, + src/irq-generic.c, src/irq-legacy.c: Generic BSP interrupt handler + support. + 2008-06-04 Joel Sherrill * include/tm27.h: New file. Stub version of tm27 support. diff --git a/c/src/lib/libbsp/shared/bootcard.c b/c/src/lib/libbsp/shared/bootcard.c index 9174e8fe6c..2800232998 100644 --- a/c/src/lib/libbsp/shared/bootcard.c +++ b/c/src/lib/libbsp/shared/bootcard.c @@ -43,7 +43,10 @@ * $Id$ */ -#include +#include +#include + +#include /* * Since there is a forward reference @@ -116,6 +119,14 @@ int boot_card( size_t heap_size; #endif + /* + * Special case for PowerPC: The interrupt disable mask is stored in SPRG0. + * It must be valid before we can use rtems_interrupt_disable(). + */ + #ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT + ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT); + #endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */ + /* * Make sure interrupts are disabled. */ -- cgit v1.2.3