From 3495c57d11b6e39e2c8f8c9deb53a0b7b3a7b596 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Mon, 30 Nov 2009 03:49:08 +0000 Subject: Whitespace removal. --- c/src/lib/libbsp/bfin/bf537Stamp/console/console.c | 4 +-- c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h | 6 ++-- c/src/lib/libbsp/bfin/bf537Stamp/start/start.S | 12 ++++---- .../lib/libbsp/bfin/bf537Stamp/startup/bspstart.c | 22 +++++++------- .../lib/libbsp/bfin/eZKit533/console/console-io.c | 4 +-- c/src/lib/libbsp/bfin/eZKit533/include/bsp.h | 8 ++--- c/src/lib/libbsp/bfin/eZKit533/include/cplb.h | 4 +-- c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c | 34 +++++++++++----------- c/src/lib/libbsp/bfin/shared/start/start.S | 28 +++++++++--------- c/src/lib/libbsp/i386/shared/irq/irq_asm.S | 4 +-- c/src/lib/libbsp/i386/shared/pci/pcibios.c | 12 ++++---- c/src/lib/libbsp/powerpc/mbx8xx/console/console.c | 2 +- c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c | 8 ++--- c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S | 16 +++++----- 14 files changed, 82 insertions(+), 82 deletions(-) (limited to 'c/src/lib/libbsp') diff --git a/c/src/lib/libbsp/bfin/bf537Stamp/console/console.c b/c/src/lib/libbsp/bfin/bf537Stamp/console/console.c index 1dd5787a31..d3d73da67f 100644 --- a/c/src/lib/libbsp/bfin/bf537Stamp/console/console.c +++ b/c/src/lib/libbsp/bfin/bf537Stamp/console/console.c @@ -1,5 +1,5 @@ /* Console driver for bf537Stamp - * + * * Copyright (c) 2008 Kallisti Labs, Los Gatos, CA, USA * written by Allan Hessenflow * @@ -9,7 +9,7 @@ * * $Id$ */ - + #include #include diff --git a/c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h b/c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h index 99f6785422..2fe7c6f96f 100644 --- a/c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h +++ b/c/src/lib/libbsp/bfin/bf537Stamp/include/bsp.h @@ -1,5 +1,5 @@ /* bsp.h - * + * * This include file contains all board IO definitions for bf537Stamp. * * Copyright (c) 2006 by Atos Automacao Industrial Ltda. @@ -12,7 +12,7 @@ * * $Id$ */ - + #ifndef _BSP_H #define _BSP_H @@ -34,7 +34,7 @@ extern "C" { #define BSP_DATA_CACHE_CONFIG (3 << DMEM_CONTROL_DMC_SHIFT) -/* +/* * PLL and clock setup values: */ diff --git a/c/src/lib/libbsp/bfin/bf537Stamp/start/start.S b/c/src/lib/libbsp/bfin/bf537Stamp/start/start.S index 43c3398dbb..2a05e02f34 100644 --- a/c/src/lib/libbsp/bfin/bf537Stamp/start/start.S +++ b/c/src/lib/libbsp/bfin/bf537Stamp/start/start.S @@ -59,30 +59,30 @@ __start: p0.l = start; p1.h = HI(CEC_EVT15); p1.l = LO(CEC_EVT15); - + [p1] = p0; r0 = 0x8000 (z); sti r0; raise 15; - + p0.h = wait; p0.l = wait; reti = p0; rti; - + /* wait for event 15 */ wait: jump wait; - + start: [--sp] = reti; /* allow us to process interrupts later */ /* mask interrupts for now */ cli r0; - + p0.h = _bss_start; p0.l = _bss_start; p1.h = _end; @@ -90,7 +90,7 @@ start: r0 = p0; r1 = p1; r1 = r1 - r0; - p1 = r1; + p1 = r1; r0 = 0; /* Set _bss_start until _end to zero */ diff --git a/c/src/lib/libbsp/bfin/bf537Stamp/startup/bspstart.c b/c/src/lib/libbsp/bfin/bf537Stamp/startup/bspstart.c index 7a54306d75..dc25bbf3bb 100644 --- a/c/src/lib/libbsp/bfin/bf537Stamp/startup/bspstart.c +++ b/c/src/lib/libbsp/bfin/bf537Stamp/startup/bspstart.c @@ -4,7 +4,7 @@ * board, and monitor specific initialization and configuration. * The generic CPU dependent initialization has been performed * before this routine is invoked. - * + * * Copyright (c) 2006 by Atos Automacao Industrial Ltda. * written by Alain Schaefer * and Antonio Giovanini @@ -105,16 +105,16 @@ void bsp_start(void) /* * initPLL - * + * * Routine to initialize the PLL. The BF537 Stamp uses a 27 Mhz XTAL. BISON * See "../bf537Stamp/include/bsp.h" for more information. */ static void initPLL(void) { - + #ifdef BISON unsigned int n; - + /* Configure PLL registers */ *((uint16_t*)PLL_LOCKCNT) = 0x1000; *((uint16_t*)PLL_DIV) = PLL_CSEL|PLL_SSEL; @@ -124,16 +124,16 @@ static void initPLL(void) { asm("cli r0;"); asm("idle;"); asm("sti r0;"); - + /* Delay for PLL stabilization */ - for (n=0; n<200; n++) {} + for (n=0; n<200; n++) {} #endif - + } /* * initEBIU - * + * * Configure extern memory */ @@ -153,8 +153,8 @@ static void initEBIU(void) { *((uint32_t*)EBIU_AMBCTL0) = 0x7bb07bb0L; *((uint32_t*)EBIU_AMBCTL1) = 0x7bb07bb0L; *((uint16_t*)EBIU_AMGCTL) = 0x000f; - - /* Configure SDRAM + + /* Configure SDRAM *((uint32_t*)EBIU_SDGCTL) = 0x0091998d; *((uint16_t*)EBIU_SDBCTL) = 0x0013; *((uint16_t*)EBIU_SDRRC) = 0x0817; @@ -164,7 +164,7 @@ static void initEBIU(void) { /* * initGPIO - * + * * Enable LEDs port */ static void initGPIO(void) { diff --git a/c/src/lib/libbsp/bfin/eZKit533/console/console-io.c b/c/src/lib/libbsp/bfin/eZKit533/console/console-io.c index dd68468bac..2541ac53b4 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/console/console-io.c +++ b/c/src/lib/libbsp/bfin/eZKit533/console/console-io.c @@ -1,5 +1,5 @@ /* console-io.c - * + * * This file contains the hardware specific portions of the TTY driver * for the serial ports for ezkit533. * @@ -13,7 +13,7 @@ * * $Id$ */ - + #include #include diff --git a/c/src/lib/libbsp/bfin/eZKit533/include/bsp.h b/c/src/lib/libbsp/bfin/eZKit533/include/bsp.h index 00b13c84ae..29427afb00 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/include/bsp.h +++ b/c/src/lib/libbsp/bfin/eZKit533/include/bsp.h @@ -1,5 +1,5 @@ /* bsp.h - * + * * This include file contains all board IO definitions for eZKit533. * * Copyright (c) 2006 by Atos Automacao Industrial Ltda. @@ -12,7 +12,7 @@ * * $Id$ */ - + #ifndef _BSP_H #define _BSP_H @@ -29,9 +29,9 @@ extern "C" { #include #include #include -#include +#include -/* +/* * PLL and clock setup values: */ diff --git a/c/src/lib/libbsp/bfin/eZKit533/include/cplb.h b/c/src/lib/libbsp/bfin/eZKit533/include/cplb.h index 2cac1a48e6..485c535bc7 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/include/cplb.h +++ b/c/src/lib/libbsp/bfin/eZKit533/include/cplb.h @@ -1,5 +1,5 @@ /* cplb.h - * + * * Copyright (c) 2006 by Atos Automacao Industrial Ltda. * written by Alain Schaefer * @@ -14,7 +14,7 @@ /* CPLB configurations */ #define CPLB_DEF_CACHE_WT CPLB_L1_CHBL | CPLB_WT -#define CPLB_DEF_CACHE_WB CPLB_L1_CHBL +#define CPLB_DEF_CACHE_WB CPLB_L1_CHBL #define CPLB_CACHE_ENABLED CPLB_L1_CHBL | CPLB_DIRTY #define CPLB_DEF_CACHE CPLB_L1_CHBL | CPLB_WT diff --git a/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c b/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c index 5572c3bad8..a4f76b9ed2 100644 --- a/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c +++ b/c/src/lib/libbsp/bfin/eZKit533/startup/bspstart.c @@ -4,7 +4,7 @@ * board, and monitor specific initialization and configuration. * The generic CPU dependent initialization has been performed * before this routine is invoked. - * + * * Copyright (c) 2006 by Atos Automacao Industrial Ltda. * written by Alain Schaefer * and Antonio Giovanini @@ -21,7 +21,7 @@ #include #include -const unsigned int dcplbs_table[16][2] = { +const unsigned int dcplbs_table[16][2] = { { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, { 0xFF900000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data B */ { 0xFF800000, (PAGE_SIZE_1MB | CPLB_D_PAGE_MGMT | CPLB_WT) }, /* L1 Data A */ @@ -42,10 +42,10 @@ const unsigned int dcplbs_table[16][2] = { }; -const unsigned int _icplbs_table[16][2] = { +const unsigned int _icplbs_table[16][2] = { { 0xFFA00000, (PAGE_SIZE_1MB | CPLB_I_PAGE_MGMT | CPLB_I_PAGE_MGMT | 0x4) }, /* L1 Code */ { 0xEF000000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* AREA DE BOOT */ - { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, + { 0xFFB00000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, { 0x20300000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* Async Memory Bank 3 */ { 0x20200000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* Async Memory Bank 2 (Secnd) */ { 0x20100000, (PAGE_SIZE_1MB | CPLB_INOCACHE) }, /* Async Memory Bank 1 (Prim B) */ @@ -91,7 +91,7 @@ void bsp_pretasking_hook(void) void bsp_start( void ) { /* BSP Hardware Initialization*/ - Init_RTC(); /* Blackfin Real Time Clock initialization */ + Init_RTC(); /* Blackfin Real Time Clock initialization */ Init_PLL(); /* PLL initialization */ Init_EBIU(); /* EBIU initialization */ Init_Flags(); /* GPIO initialization */ @@ -104,14 +104,14 @@ void bsp_start( void ) /* * Init_PLL - * + * * Routine to initialize the PLL. The Ezkit uses a 27 Mhz XTAL. * See "../eZKit533/include/bsp.h" for more information. */ void Init_PLL (void) { unsigned int n; - + /* Configure PLL registers */ *((uint16_t*)PLL_LOCKCNT) = 0x1000; *((uint16_t*)PLL_DIV) = PLL_CSEL|PLL_SSEL; @@ -121,14 +121,14 @@ void Init_PLL (void) asm("cli r0;"); asm("idle;"); asm("sti r0;"); - + /* Delay for PLL stabilization */ - for (n=0; n<200; n++) {} + for (n=0; n<200; n++) {} } /* * Init_EBIU - * + * * Configure extern memory */ @@ -138,8 +138,8 @@ void Init_EBIU (void) *((uint32_t*)EBIU_AMBCTL0) = 0x7bb07bb0L; *((uint32_t*)EBIU_AMBCTL1) = 0x7bb07bb0L; *((uint16_t*)EBIU_AMGCTL) = 0x000f; - - /* Configure SDRAM + + /* Configure SDRAM *((uint32_t*)EBIU_SDGCTL) = 0x0091998d; *((uint16_t*)EBIU_SDBCTL) = 0x0013; *((uint16_t*)EBIU_SDRRC) = 0x0817; @@ -148,7 +148,7 @@ void Init_EBIU (void) /* * Init_Flags - * + * * Enable LEDs port */ void Init_Flags(void) @@ -157,9 +157,9 @@ void Init_Flags(void) *((uint16_t*)FIO_DIR) = 0x0000; *((uint16_t*)FIO_EDGE) = 0x0100; *((uint16_t*)FIO_MASKA_D) = 0x0100; - + *((uint8_t*)FlashA_PortB_Dir) = 0x3f; - *((uint8_t*)FlashA_PortB_Data) = 0x00; + *((uint8_t*)FlashA_PortB_Data) = 0x00; } /* @@ -168,7 +168,7 @@ void Init_Flags(void) */ void setLED (uint8_t value) { - *((uint8_t*)FlashA_PortB_Data) = value; + *((uint8_t*)FlashA_PortB_Data) = value; } /* @@ -193,5 +193,5 @@ void initCPLB(void) *data = dcplbs_table[i][1]; addr++; data++; - } + } } diff --git a/c/src/lib/libbsp/bfin/shared/start/start.S b/c/src/lib/libbsp/bfin/shared/start/start.S index dc2af88db2..b9fe272935 100644 --- a/c/src/lib/libbsp/bfin/shared/start/start.S +++ b/c/src/lib/libbsp/bfin/shared/start/start.S @@ -1,6 +1,6 @@ -#include +#include #include @@ -39,7 +39,7 @@ __start: /* Start by setting up a stack */ sp.h = 0xFFB0; sp.l = 0x0F00; - + /* Maybe we should zero the memory in the .bss section. */ /* This changes to the supervisor mode */ @@ -47,34 +47,34 @@ __start: p0.h = START; p1.l = LO(EVT15); p1.h = HI(EVT15); - + [P1] = P0; - + P0.h = HI(IMASK); P0.l = LO(IMASK); R0 = [P0]; /* R1.l = EVT_IVG15 & 0xFFFF; */ R1.l = 0x8000; - + R0 = R0 | R1; - + [P0] = R0; RAISE 15; - + P0.l = WAIT; P0.h = WAIT; RETI = P0; RTI; - + /* endless loop to wait */ - WAIT: + WAIT: jump WAIT; - + START: [--SP] = RETI; - + p0.h = _bss_start; p0.l = _bss_start; p1.h = _end; @@ -82,7 +82,7 @@ __start: r0 = p0; r1 = p1; r1 = r1 - r0; - p1 = r1; + p1 = r1; r0 = 0; /* Set _bss_start until _end to zero */ @@ -96,8 +96,8 @@ __start: call (p0); p0.l = _exit; - p0.h = _exit; - P3 = P4; + p0.h = _exit; + P3 = P4; jump (p0) /* Should not return. */ .global _null_isr diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S index be0bcbb859..8d4535ddc5 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -28,7 +28,7 @@ #define FRM_SIZ (16+512) #define SSE_OFF 16 #else -#define FRM_SIZ 16 +#define FRM_SIZ 16 #endif BEGIN_CODE @@ -137,7 +137,7 @@ SYM (_ISR_Handler): /* * We want to insure that the old stack pointer is in ebp - * By saving it on every interrupt, all we have to do is + * By saving it on every interrupt, all we have to do is * movl ebp->esp near the end of every interrupt. */ diff --git a/c/src/lib/libbsp/i386/shared/pci/pcibios.c b/c/src/lib/libbsp/i386/shared/pci/pcibios.c index b2aa10daa1..04b2dfe379 100644 --- a/c/src/lib/libbsp/i386/shared/pci/pcibios.c +++ b/c/src/lib/libbsp/i386/shared/pci/pcibios.c @@ -544,7 +544,7 @@ BSP_pci_read_config_byte( unsigned char fun, unsigned char offset, unsigned char *val -) +) { int sig; @@ -560,7 +560,7 @@ BSP_pci_read_config_word( unsigned char fun, unsigned char offset, unsigned short *val -) +) { int sig; @@ -576,7 +576,7 @@ BSP_pci_read_config_dword( unsigned char fun, unsigned char offset, uint32_t *val -) +) { int sig; @@ -592,7 +592,7 @@ BSP_pci_write_config_byte( unsigned char fun, unsigned char offset, unsigned char val -) +) { int sig; @@ -608,7 +608,7 @@ BSP_pci_write_config_word( unsigned char fun, unsigned char offset, unsigned short val -) +) { int sig; @@ -624,7 +624,7 @@ BSP_pci_write_config_dword( unsigned char fun, unsigned char offset, uint32_t val -) +) { int sig; diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c index 6081349ed0..09b1d3943b 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c @@ -538,7 +538,7 @@ serial_init(void) bd_t *bd; #if NVRAM_CONFIGURE == 1 - if ( ((nvram->console_mode & 0x06) != 0x04 ) || + if ( ((nvram->console_mode & 0x06) != 0x04 ) || ((nvram->console_mode & 0x30) != 0x20 )) { /* * FIXME: refine this condition... diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c index 0e440984b6..1ac160302d 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq.c @@ -218,8 +218,8 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum) ppc_cached_irq_mask |= (1 << (31 - BSP_CPM_INTERRUPT)); ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; } - /* - * make sure, that the masking operations in + /* + * make sure, that the masking operations in * ICTL and MSR are executed in order */ asm volatile("sync":::"memory"); @@ -232,8 +232,8 @@ int C_dispatch_irq_handler (BSP_Exception_frame *frame, unsigned int excNum) _CPU_MSR_SET(msr); - /* - * make sure, that the masking operations in + /* + * make sure, that the masking operations in * ICTL and MSR are executed in order */ asm volatile("sync":::"memory"); diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S b/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S index 5c99168819..03185d04f1 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S +++ b/c/src/lib/libbsp/powerpc/mbx8xx/startup/start.S @@ -51,7 +51,7 @@ #warning The call is "void boot_card(const char* cmdline);" #warning You need to pass a NULL. #warning Please check and remove these warnings. - + #include /* @@ -246,16 +246,16 @@ spin: /* * test function: blink orange led once */ -#define LEDBLINK_DELAY (5*1000*1000) +#define LEDBLINK_DELAY (5*1000*1000) #define LEDPORT 0xFA100001 #define LEDMASK 0xf0 #define LEDON 0x00 #define LEDOFF 0x08 - + PUBLIC_VAR(ledblink) SYM(ledblink): lis r3,LEDBLINK_DELAY>>16 -ledblink1: +ledblink1: subi r3,r3,1 cmpi 0,1,r3,0 bne ledblink1 @@ -267,9 +267,9 @@ ledblink1: andi. r0,r0,LEDMASK ori r0,r0,LEDOFF stb r0,LEDPORT@l(r3) - + lis r3,LEDBLINK_DELAY>>16 -ledblink2: +ledblink2: subi r3,r3,1 cmpi 0,1,r3,0 bne ledblink2 @@ -281,8 +281,8 @@ ledblink2: andi. r0,r0,LEDMASK ori r0,r0,LEDON stb r0,LEDPORT@l(r3) - - blr + + blr /* * #define LOADED_BY_EPPCBUG */ -- cgit v1.2.3