From 0091a875f1a35c9fd58c2fc85f119802c7832f3f Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Mon, 9 Jan 2006 10:52:50 +0000 Subject: Backport from rtems-4-6-branch --- c/src/lib/libbsp/sparc/shared/start.S | 65 +++++++++++++++++++++++++++++++---- 1 file changed, 58 insertions(+), 7 deletions(-) (limited to 'c/src/lib/libbsp/sparc') diff --git a/c/src/lib/libbsp/sparc/shared/start.S b/c/src/lib/libbsp/sparc/shared/start.S index 21c0ae5d7b..9b2bbb42fc 100644 --- a/c/src/lib/libbsp/sparc/shared/start.S +++ b/c/src/lib/libbsp/sparc/shared/start.S @@ -47,8 +47,8 @@ start: PUBLIC(trap_table) SYM(trap_table): - RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap - BAD_TRAP; ! 01 instruction access + RTRAP( 0, SYM(hard_reset) ); ! 00 reset trap + BAD_TRAP; ! 01 instruction access ! exception BAD_TRAP; ! 02 illegal instruction BAD_TRAP; ! 03 privileged instruction @@ -213,9 +213,6 @@ SYM(hard_reset): nop nop - call __bsp_board_init - nop - set (SYM(rdb_start)), %g6 ! End of work-space area st %sp, [%g6] set (SYM(Configuration)), %l1 @@ -226,7 +223,62 @@ SYM(hard_reset): mov %sp, %fp ! Set frame pointer nop -#if 0 +#if ENABLE_SIS_QUIRKS==1 + +#include + +/* Check if MEC is initialised. If not, this means that we are + running on the simulator. Initiate some of the parameters + that are done by the boot-prom otherwise. +*/ + + set SYM(ERC32_MEC), %g3 ! g3 = base address of peripherals + ld [%g3], %g2 + set 0xfe080000, %g1 + andcc %g1, %g2, %g0 + bne 2f + + /* Set the correct memory size in MEC memory config register */ + + set SYM(PROM_SIZE), %l0 + set 0, %l1 + srl %l0, 18, %l0 +1: + tst %l0 + srl %l0, 1, %l0 + bne,a 1b + inc %l1 + sll %l1, 8, %l1 + + set SYM(RAM_SIZE), %l0 + srl %l0, 19, %l0 +1: + tst %l0 + srl %l0, 1, %l0 + bne,a 1b + inc %l1 + sll %l1, 10, %l1 + + ! set the Memory Configuration + st %l1, [ %g3 + ERC32_MEC_MEMORY_CONFIGURATION_OFFSET ] + !DISABLE THE HARDWARE WATCHDOG + st %g0, [ %g3 + ERC32_MEC_WATCHDOG_TRAP_DOOR_SET_OFFSET ] + !Reduce the number of wait states to 0 for all memory areas. + st %g0, [ %g3 + ERC32_MEC_WAIT_STATE_CONFIGURATION_OFFSET ] + + set SYM(RAM_START), %l1 ! Cannot use RAM_END due to bug in linker + set SYM(RAM_SIZE), %l2 + add %l1, %l2, %sp + st %sp, [%g6] + + + set SYM(CLOCK_SPEED), %g6 ! Use 14 MHz in simulator + set 14, %g1 + st %g1, [%g6] + +2: +#endif + /* * Copy the initialized data to RAM * @@ -256,7 +308,6 @@ copy_data: cmp %g3, %g4 ! Is the pointer past the end of dest? bl copy_data nop -#endif /* clear the bss */ 1: -- cgit v1.2.3