From d2a94ab97f014c27a86a3183794387dba7d36a22 Mon Sep 17 00:00:00 2001 From: Daniel Hellstrom Date: Fri, 2 May 2014 14:28:44 +0200 Subject: GRSPW: added clock cycles after GRSPW reset added clock cycles after GRSPW reset to make sure CTRL.START bit write actually have an effect. Wait until reset is completed. --- c/src/lib/libbsp/sparc/shared/spw/grspw.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'c/src/lib/libbsp/sparc/shared/spw') diff --git a/c/src/lib/libbsp/sparc/shared/spw/grspw.c b/c/src/lib/libbsp/sparc/shared/spw/grspw.c index ebf7fe00ee..4d66d133bb 100644 --- a/c/src/lib/libbsp/sparc/shared/spw/grspw.c +++ b/c/src/lib/libbsp/sparc/shared/spw/grspw.c @@ -1649,6 +1649,19 @@ static void grspw_hw_reset(GRSPW_DEV *pDev) SPW_CTRL_WRITE(pDev, SPW_CTRL_RESET); /*reset core*/ SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/ + + /* Add extra writes to make sure we wait the number of clocks required + * after reset + */ + SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | + SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/ + SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | + SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/ + SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | + SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/ + SPW_STATUS_WRITE(pDev, SPW_STATUS_TO | SPW_STATUS_CE | SPW_STATUS_ER | SPW_STATUS_DE | SPW_STATUS_PE | + SPW_STATUS_WE | SPW_STATUS_IA | SPW_STATUS_EE); /*clear status*/ + SPW_CTRL_WRITE(pDev, SPW_CTRL_LINKSTART); /*start link core*/ } -- cgit v1.2.3