From b21b0ab3e77d91fc32e4324d3dfaf57ce24096ab Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Mon, 13 Nov 2000 22:40:29 +0000
Subject: 2000-11-13	Jiri Gaisler <jgais@ws.estec.esa.nl>

	* .cvsignore, ChangeLog, Makefile.am, README, bsp_specs,
	configure.in, times, clock/.cvsignore, clock/Makefile.am,
	clock/ckinit.c, console/.cvsignore, console/Makefile.am,
	console/console.c, console/consolereserveresources.c,
	console/debugputs.c, gnatsupp/.cvsignore,
	gnatsupp/Makefile.am, gnatsupp/gnatsupp.c,
	include/.cvsignore, include/Makefile.am, include/bsp.h,
	include/coverhd.h, include/leon.h, start/.cvsignore,
	start/Makefile.am, startup/.cvsignore, startup/Makefile.am,
	startup/boardinit.S, startup/linkcmds, startup/setvec.c,
	startup/spurious.c, timer/.cvsignore, timer/Makefile.am,
	timer/timer.c, tools/.cvsignore, tools/Makefile.am,
	tools/configure.in, tools/runtest.in, wrapup/.cvsignore,
	wrapup/Makefile.am: New file.
---
 c/src/lib/libbsp/sparc/leon/README | 80 ++++++++++++++++++++++++++++++++++++++
 1 file changed, 80 insertions(+)
 create mode 100644 c/src/lib/libbsp/sparc/leon/README

(limited to 'c/src/lib/libbsp/sparc/leon/README')

diff --git a/c/src/lib/libbsp/sparc/leon/README b/c/src/lib/libbsp/sparc/leon/README
new file mode 100644
index 0000000000..93f19bb383
--- /dev/null
+++ b/c/src/lib/libbsp/sparc/leon/README
@@ -0,0 +1,80 @@
+#
+#  Description of SIS as related to this BSP
+#
+#  $Id$
+#
+
+BSP NAME:           sis
+BOARD:              any based on the European Space Agency's ERC32
+BUS:                N/A
+CPU FAMILY:         sparc
+CPU:                ERC32 (SPARC V7 + on-CPU peripherals)
+                    based on Cypress 601/602
+COPROCESSORS:       on-chip 602 compatible FPU
+MODE:               32 bit mode
+
+DEBUG MONITOR:      none
+
+PERIPHERALS
+===========
+TIMERS:
+  NAME:             General Purpose Timer  
+  RESOLUTION:         50 nanoseconds - 12.8 microseconds
+  NAME:             Real Time Clock Timer  
+  RESOLUTION:         50 nanoseconds - 3.2768 milliseconds
+  NAME:             Watchdog Timer  
+  RESOLUTION:         XXX
+SERIAL PORTS:       2 using on-chip UART
+REAL-TIME CLOCK:    none
+DMA:                on-chip
+VIDEO:              none
+SCSI:               none
+NETWORKING:         none
+
+DRIVER INFORMATION
+==================
+CLOCK DRIVER:       ERC32 internal Real Time Clock Timer
+IOSUPP DRIVER:      N/A
+SHMSUPP:            N/A
+TIMER DRIVER:       ERC32 internal General Purpose Timer
+CONSOLE DRIVER:     ERC32 internal UART 
+
+STDIO
+=====
+PORT:               Channel A
+ELECTRICAL:         na since using simulator
+BAUD:               na
+BITS PER CHARACTER: na
+PARITY:             na
+STOP BITS:          na
+
+Notes
+=====
+
+ERC32 BSP only supports single processor operations.
+
+A nice feature of this BSP is that the RAM and PROM size are set in the 
+linkcmds file and the startup code programs the Memory Configuration
+Register based on those sizes.
+
+The Watchdog Timer is disabled.
+
+This code was developed and tested entirely using the SPARC Instruction 
+Simulator (SIS) for the ERC32.  All tests were known to run correctly
+against sis v1.7.
+
+
+Memory Map
+==========
+
+0x00000000 - 0x00000000 + _PROM_SIZE      code and initialized data
+0x01f80000                                on chip peripherals
+0x00000000 - 0x02000000 + _RAM_SIZE       destination for initialized data
+                                          BSS (i.e. unitialized data)
+                                          C Heap (i.e. malloc area)
+                                          RTEMS Workspace
+
+The C heap is assigned all memory between the end of the BSS and the 
+RTEMS Workspace.  The size of the RTEMS Workspace is based on that 
+specified in the application's configuration table.
+  
-- 
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