From 801b5d80325dbd3e92218271d54e75f389da7136 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 17 Feb 2014 09:23:59 +0100 Subject: powerpc: Change interrupt disable implemetation Instead of SPRG0 (= special purpose register 272) use the new global symbol _PPC_INTERRUPT_DISABLE_MASK to store the interrupt disable mask. The benefit is that it is now possible to disable interrupts without further run-time initialization in boot_card(). At least on Freescale e500 cores this leads also to a faster execution since the mfmsr and mfspr instruction require four cycles to complete. The instructions to load the mask value can execute while the mfmsr is in progress. --- c/src/lib/libbsp/shared/bootcard.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'c/src/lib/libbsp/shared') diff --git a/c/src/lib/libbsp/shared/bootcard.c b/c/src/lib/libbsp/shared/bootcard.c index 8a21bc00e0..7693a18de5 100644 --- a/c/src/lib/libbsp/shared/bootcard.c +++ b/c/src/lib/libbsp/shared/bootcard.c @@ -68,14 +68,6 @@ void boot_card( { rtems_interrupt_level bsp_isr_level; - /* - * Special case for PowerPC: The interrupt disable mask is stored in SPRG0. - * It must be valid before we can use rtems_interrupt_disable(). - */ - #ifdef PPC_INTERRUPT_DISABLE_MASK_DEFAULT - ppc_interrupt_set_disable_mask( PPC_INTERRUPT_DISABLE_MASK_DEFAULT ); - #endif /* PPC_INTERRUPT_DISABLE_MASK_DEFAULT */ - /* * Make sure interrupts are disabled. */ -- cgit v1.2.3