From 604f080c2cb526593b9236b5248ca9c2cd92e9b5 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 8 Dec 2017 13:13:14 +0100 Subject: bsp/shsim: Move libcpu files to BSP Update #3254. --- c/src/lib/libbsp/sh/shsim/Makefile.am | 6 +- c/src/lib/libbsp/sh/shsim/make/custom/simsh1.cfg | 1 - c/src/lib/libbsp/sh/shsim/make/custom/simsh2.cfg | 1 - c/src/lib/libbsp/sh/shsim/make/custom/simsh2e.cfg | 1 - c/src/lib/libbsp/sh/shsim/make/custom/simsh4.cfg | 1 - c/src/lib/libbsp/sh/shsim/startup/cpu_asm.c | 83 ++++++++++++ c/src/lib/libbsp/sh/shsim/startup/ispshgdb.c | 147 ++++++++++++++++++++++ 7 files changed, 233 insertions(+), 7 deletions(-) create mode 100644 c/src/lib/libbsp/sh/shsim/startup/cpu_asm.c create mode 100644 c/src/lib/libbsp/sh/shsim/startup/ispshgdb.c (limited to 'c/src/lib/libbsp/sh/shsim') diff --git a/c/src/lib/libbsp/sh/shsim/Makefile.am b/c/src/lib/libbsp/sh/shsim/Makefile.am index 1a3eda3828..e49e4f4b5f 100644 --- a/c/src/lib/libbsp/sh/shsim/Makefile.am +++ b/c/src/lib/libbsp/sh/shsim/Makefile.am @@ -38,6 +38,8 @@ libbsp_a_SOURCES += ../../shared/gnatinstallhandler.c libbsp_a_SOURCES += ../shared/bsphwinit.c libbsp_a_SOURCES += startup/sysexit.c libbsp_a_SOURCES += ../../shared/bspreset.c +libbsp_a_SOURCES += startup/cpu_asm.c +libbsp_a_SOURCES += startup/ispshgdb.c # clock libbsp_a_SOURCES += ../../shared/clock_driver_simidle.c @@ -51,9 +53,7 @@ libbsp_a_SOURCES += console/console-debugio.c # timer libbsp_a_SOURCES += ../../shared/timerstub.c -libbsp_a_LIBADD = \ - ../../../libcpu/@RTEMS_CPU@/@RTEMS_CPU_MODEL@/score.rel \ - ../../../libcpu/@RTEMS_CPU@/cache.rel +libbsp_a_LIBADD = ../../../libcpu/@RTEMS_CPU@/cache.rel include $(srcdir)/preinstall.am include $(top_srcdir)/../../../../automake/local.am diff --git a/c/src/lib/libbsp/sh/shsim/make/custom/simsh1.cfg b/c/src/lib/libbsp/sh/shsim/make/custom/simsh1.cfg index 84e891a580..0f1da687a8 100644 --- a/c/src/lib/libbsp/sh/shsim/make/custom/simsh1.cfg +++ b/c/src/lib/libbsp/sh/shsim/make/custom/simsh1.cfg @@ -6,7 +6,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=sh -RTEMS_CPU_MODEL=shgdb # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/sh/shsim/make/custom/simsh2.cfg b/c/src/lib/libbsp/sh/shsim/make/custom/simsh2.cfg index 8d238977eb..cde1fb2fbf 100644 --- a/c/src/lib/libbsp/sh/shsim/make/custom/simsh2.cfg +++ b/c/src/lib/libbsp/sh/shsim/make/custom/simsh2.cfg @@ -6,7 +6,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=sh -RTEMS_CPU_MODEL=shgdb # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/sh/shsim/make/custom/simsh2e.cfg b/c/src/lib/libbsp/sh/shsim/make/custom/simsh2e.cfg index c47e40fdde..ce34d26d78 100644 --- a/c/src/lib/libbsp/sh/shsim/make/custom/simsh2e.cfg +++ b/c/src/lib/libbsp/sh/shsim/make/custom/simsh2e.cfg @@ -5,7 +5,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=sh -RTEMS_CPU_MODEL=shgdb # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/sh/shsim/make/custom/simsh4.cfg b/c/src/lib/libbsp/sh/shsim/make/custom/simsh4.cfg index 076ba3db64..c23a8b93b5 100644 --- a/c/src/lib/libbsp/sh/shsim/make/custom/simsh4.cfg +++ b/c/src/lib/libbsp/sh/shsim/make/custom/simsh4.cfg @@ -5,7 +5,6 @@ include $(RTEMS_ROOT)/make/custom/default.cfg RTEMS_CPU=sh -RTEMS_CPU_MODEL=shgdb # This contains the compiler options necessary to select the CPU model # and (hopefully) optimize for it. diff --git a/c/src/lib/libbsp/sh/shsim/startup/cpu_asm.c b/c/src/lib/libbsp/sh/shsim/startup/cpu_asm.c new file mode 100644 index 0000000000..2ca8926a24 --- /dev/null +++ b/c/src/lib/libbsp/sh/shsim/startup/cpu_asm.c @@ -0,0 +1,83 @@ +/* + * Support for SuperH Simulator in GDB + */ + +/* + * COPYRIGHT (c) 1989-2008. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + */ + +#include +#include +#include +#include +#include +#include + +#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + unsigned long *_old_stack_ptr; +#endif + +register unsigned long *stack_ptr __asm__ ("r15"); + +void __ISR_Handler(uint32_t vector); + +/* + * This routine provides the RTEMS interrupt management. + */ +void __ISR_Handler( uint32_t vector) +{ + ISR_Level level; + + _ISR_Local_disable( level ); + + _Thread_Dispatch_disable(); + +#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + if ( _ISR_Nest_level == 0 ) + { + /* Install irq stack */ + _old_stack_ptr = stack_ptr; + stack_ptr = _CPU_Interrupt_stack_high; + } + +#endif + + _ISR_Nest_level++; + + _ISR_Local_enable( level ); + + /* call isp */ + if ( _ISR_Vector_table[ vector]) + (*_ISR_Vector_table[ vector ])( vector ); + + _ISR_Local_disable( level ); + + _Thread_Dispatch_unnest( _Per_CPU_Get() ); + + _ISR_Nest_level--; + +#if (CPU_HAS_SOFTWARE_INTERRUPT_STACK == TRUE) + + if ( _ISR_Nest_level == 0 ) + /* restore old stack pointer */ + stack_ptr = _old_stack_ptr; +#endif + + _ISR_Local_enable( level ); + + if ( _ISR_Nest_level ) + return; + + if ( !_Thread_Dispatch_is_enabled() ) { + return; + } + + if ( _Thread_Dispatch_necessary ) { + _Thread_Dispatch(); + } +} diff --git a/c/src/lib/libbsp/sh/shsim/startup/ispshgdb.c b/c/src/lib/libbsp/sh/shsim/startup/ispshgdb.c new file mode 100644 index 0000000000..191eb2f893 --- /dev/null +++ b/c/src/lib/libbsp/sh/shsim/startup/ispshgdb.c @@ -0,0 +1,147 @@ +/* + * This file contains the isp frames for the user interrupts. + * From these procedures __ISR_Handler is called with the vector number + * as argument. + * + * __ISR_Handler is kept in a separate file (cpu_asm.c), because a bug in + * some releases of gcc doesn't properly handle #pragma interrupt, if a + * file contains both isrs and normal functions. + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) and + * Bernd Becker (becker@faw.uni-ulm.de) + * + * COPYRIGHT (c) 1997-1998, FAW Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE + * + * + * COPYRIGHT (c) 1998. + * On-Line Applications Research Corporation (OAR). + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.org/license/LICENSE. + * + * Modified to reflect dummy isp entries for GDB SH simulator by Joel. + */ + +#include +#include + +/* + * This is a exception vector table + * + * It has the same structure as the actual vector table (vectab) + */ + +void _dummy_isp(uint32_t); + +proc_ptr _Hardware_isr_Table[256]={ +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* PWRon Reset, Maual Reset,...*/ +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +/* trapa 0 -31 */ +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, +_dummy_isp, _dummy_isp, _dummy_isp, _dummy_isp, /* irq 152-155*/ +_dummy_isp +}; + +#define Str(a)#a + +/* + * Some versions of gcc and all version of egcs at least until egcs-1.1b + * are not able to handle #pragma interrupt correctly if more than 1 isr is + * contained in a file and when optimizing. + * We try to work around this problem by using the macro below. + */ +#define isp( name, number, func)\ +__asm__ (".global _"Str(name)"\n\t"\ + "_"Str(name)": \n\t"\ + " mov.l r0,@-r15 \n\t"\ + " mov.l r1,@-r15 \n\t"\ + " mov.l r2,@-r15 \n\t"\ + " mov.l r3,@-r15 \n\t"\ + " mov.l r4,@-r15 \n\t"\ + " mov.l r5,@-r15 \n\t"\ + " mov.l r6,@-r15 \n\t"\ + " mov.l r7,@-r15 \n\t"\ + " mov.l r14,@-r15 \n\t"\ + " sts.l pr,@-r15 \n\t"\ + " sts.l mach,@-r15 \n\t"\ + " sts.l macl,@-r15 \n\t"\ + " mov r15,r14 \n\t"\ + " mov.l "Str(name)"_v, r2 \n\t"\ + " mov.l "Str(name)"_k, r1\n\t"\ + " jsr @r1 \n\t"\ + " mov r2,r4 \n\t"\ + " mov r14,r15 \n\t"\ + " lds.l @r15+,macl \n\t"\ + " lds.l @r15+,mach \n\t"\ + " lds.l @r15+,pr \n\t"\ + " mov.l @r15+,r14 \n\t"\ + " mov.l @r15+,r7 \n\t"\ + " mov.l @r15+,r6 \n\t"\ + " mov.l @r15+,r5 \n\t"\ + " mov.l @r15+,r4 \n\t"\ + " mov.l @r15+,r3 \n\t"\ + " mov.l @r15+,r2 \n\t"\ + " mov.l @r15+,r1 \n\t"\ + " mov.l @r15+,r0 \n\t"\ + " rte \n\t"\ + " nop \n\t"\ + " .align 2 \n\t"\ + #name"_k: \n\t"\ + ".long "Str(func)"\n\t"\ + #name"_v: \n\t"\ + ".long "Str(number)); + +/************************************************ + * Dummy interrupt service procedure for + * interrupts being not allowed --> Trap 34 + ************************************************/ +__asm__ (" .section .text\n\ +.global __dummy_isp\n\ +__dummy_isp:\n\ + mov.l r14,@-r15\n\ + mov r15, r14\n\ + trapa #34\n\ + mov.l @r15+,r14\n\ + rte\n\ + nop"); + -- cgit v1.2.3