From 845c202a486d76e82b3743c1655f8a81ed959cbd Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 24 Jul 2007 21:34:28 +0000 Subject: 2007-07-24 Joel Sherrill * Makefile.am, preinstall.am, startup/linkcmds: Save the old linker script as linkcmds.sim and use one with enough memory to link all tests so we can at least build things. * startup/linkcmds.sim: New file. --- c/src/lib/libbsp/sh/shsim/startup/linkcmds | 13 +- c/src/lib/libbsp/sh/shsim/startup/linkcmds.sim | 218 +++++++++++++++++++++++++ 2 files changed, 227 insertions(+), 4 deletions(-) create mode 100644 c/src/lib/libbsp/sh/shsim/startup/linkcmds.sim (limited to 'c/src/lib/libbsp/sh/shsim/startup') diff --git a/c/src/lib/libbsp/sh/shsim/startup/linkcmds b/c/src/lib/libbsp/sh/shsim/startup/linkcmds index 06811a5e4a..6635926350 100644 --- a/c/src/lib/libbsp/sh/shsim/startup/linkcmds +++ b/c/src/lib/libbsp/sh/shsim/startup/linkcmds @@ -24,11 +24,16 @@ ENTRY(_start) MEMORY { +/* Real memory layout submitted rom : o = 0x00000000, l = 128k - onchip_peri : o = 0x05000000, l = 512 ram : o = 0x00040000, l = 256k +*/ + +/* Memory layout which links all tests */ + rom : o = 0x01000000, l = 512k + ram : o = 0x00040000, l = 512k - onchip_ram : o = 0x00080000, l = 8k + onchip_peri : o = 0x05000000, l = 512 } SECTIONS @@ -173,7 +178,7 @@ SECTIONS PROVIDE( _HeapEnd = . ); _WorkSpaceStart = . ; - . = 0x00080000 ; + /* XXX . = 0x00080000 ; */ PROVIDE(_WorkSpaceEnd = .); _CPU_Interrupt_stack_low = 0x00080000 ; @@ -213,6 +218,6 @@ SECTIONS .debug_typenames 0 : { *(.debug_typenames) } .debug_varnames 0 : { *(.debug_varnames) } - .stack 0x00081ff0 : { _stack = .; *(.stack) } /* > onchip_ram */ + .stack /* 0x00081ff0 */: { _stack = .; *(.stack) } > ram /* > onchip_ram */ /* These must appear regardless of . */ } diff --git a/c/src/lib/libbsp/sh/shsim/startup/linkcmds.sim b/c/src/lib/libbsp/sh/shsim/startup/linkcmds.sim new file mode 100644 index 0000000000..06811a5e4a --- /dev/null +++ b/c/src/lib/libbsp/sh/shsim/startup/linkcmds.sim @@ -0,0 +1,218 @@ +/* + * Memory layout for an SH 7032 with main memory in area 0 + * + * NOTES: + * + All RAM/ROM areas are mapped onto area 0, because gdb's simulator + * is not able to simulate memory areas but area 0. Area 5 (on-chip + * peripherials) can not be mapped onto area 0 and will cause SIGILL + * exceptions. + * + Assumed to be compatible with other SH-cpu family members (eg. SH7045) + * + * Authors: Ralf Corsepius (corsepiu@faw.uni-ulm.de) + * + * COPYRIGHT (c) 2001, Ralf Corsepius, Ulm, Germany + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id$ + */ + +OUTPUT_ARCH(sh) +ENTRY(_start) + +MEMORY +{ + rom : o = 0x00000000, l = 128k + onchip_peri : o = 0x05000000, l = 512 + ram : o = 0x00040000, l = 256k + + onchip_ram : o = 0x00080000, l = 8k +} + +SECTIONS +{ + /* boot vector table */ + .monvects 0x00000000 (NOLOAD) : + { + _monvects = . ; + } > rom + + /* monitor play area */ + .monram 0x00040000 (NOLOAD) : + { + _ramstart = .; + } > ram + + /* monitor vector table */ + .vects 0x00042000 (NOLOAD) : { + _vectab = . ; + *(.vects); + } + + /* Read-only sections, merged into text segment: */ + + . = 0x00044000 ; + .interp : { *(.interp) } + .hash : { *(.hash) } + .dynsym : { *(.dynsym) } + .dynstr : { *(.dynstr) } + .gnu.version : { *(.gnu.version) } + .gnu.version_d : { *(.gnu.version_d) } + .gnu.version_r : { *(.gnu.version_r) } + .rela.dyn : + { + *(.rela.init) + *(.rela.text .rela.text.* .rela.gnu.linkonce.t.*) + *(.rela.fini) + *(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*) + *(.rela.data .rela.data.* .rela.gnu.linkonce.d.*) + *(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*) + *(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*) + *(.rela.ctors) + *(.rela.dtors) + *(.rela.got) + *(.rela.sdata .rela.sdata.* .rela.gnu.linkonce.s.*) + *(.rela.sbss .rela.sbss.* .rela.gnu.linkonce.sb.*) + *(.rela.sdata2 .rela.sdata2.* .rela.gnu.linkonce.s2.*) + *(.rela.sbss2 .rela.sbss2.* .rela.gnu.linkonce.sb2.*) + *(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*) + } >ram + .rel.text : + { *(.rel.text) *(.rel.gnu.linkonce.t*) } + .rel.data : + { *(.rel.data) *(.rel.gnu.linkonce.d*) } + .rel.rodata : + { *(.rel.rodata) *(.rel.gnu.linkonce.r*) } + .rel.got : { *(.rel.got) } + .rel.ctors : { *(.rel.ctors) } + .rel.dtors : { *(.rel.dtors) } + .rel.init : { *(.rel.init) } + .rel.fini : { *(.rel.fini) } + .rel.bss : { *(.rel.bss) } + .rel.plt : { *(.rel.plt) } + .init : { *(.init) } =0 + .plt : { *(.plt) } + .text . : + { + *(.text*) + *(.stub) + + /* + * Special FreeBSD sysctl sections. + */ + . = ALIGN (16); + ___start_set_sysctl_set = .; + *(set_sysc*); /* set_sysctl_* but name is truncated by SH-coff */ + ___stop_set_sysctl_set = ABSOLUTE(.); + *(set_doma*); /* set_domain_* but name is truncated by SH-coff */ + *(set_pseu*); /* set_pseudo_* but name is truncated by SH-coff */ + + /* .gnu.warning sections are handled specially by elf32.em. */ + *(.gnu.warning) + *(.gnu.linkonce.t*) + } > ram + .fini : + { + KEEP (*(.fini)) + } =0 + _etext = .; + PROVIDE (etext = .); + .rodata . : { *(.rodata*) .rodata.* *(.gnu.linkonce.r*) } + .rodata1 . : { *(.rodata1) } + /* Adjust the address for the data segment. We want to adjust up to + the same address within the page on the next page up. */ + . = ALIGN(128) + (. & (128 - 1)); + .data . : + { + *(.data*) + *(.gcc_exc*) + ___EH_FRAME_BEGIN__ = .; + *(.eh_fram*) + ___EH_FRAME_END__ = .; + LONG(0); + *(.gcc_except_table) + *(.gnu.linkonce.d*) + CONSTRUCTORS + } > ram + .data1 . : { *(.data1) } + .ctors . : + { + ___ctors = .; + *(.ctors) + ___ctors_end = .; + } + .dtors . : + { + ___dtors = .; + *(.dtors) + ___dtors_end = .; + } + .got . : { *(.got.plt) *(.got) } + .dynamic . : { *(.dynamic) } + /* We want the small data sections together, so single-instruction offsets + can access them all, and initialized data all before uninitialized, so + we can shorten the on-disk segment size. */ + .sdata . : { *(.sdata) } + _edata = .; + PROVIDE (edata = .); + __bss_start = .; + .sbss . : { *(.sbss*) *(.scommon) } + .bss . : + { + *(.dynbss) + *(.bss .bss* .gnu.linkonce.b*) + *(COMMON) + } > ram + _end = . ; + PROVIDE (end = .); + + _HeapStart = . ; + . = . + 1024 * 20 ; + PROVIDE( _HeapEnd = . ); + + _WorkSpaceStart = . ; + . = 0x00080000 ; + PROVIDE(_WorkSpaceEnd = .); + + _CPU_Interrupt_stack_low = 0x00080000 ; + _CPU_Interrupt_stack_high = _CPU_Interrupt_stack_low + 4096 ; + + /* Stabs debugging sections. */ + .stab 0 : { *(.stab) } + .stabstr 0 : { *(.stabstr) } + .stab.excl 0 : { *(.stab.excl) } + .stab.exclstr 0 : { *(.stab.exclstr) } + .stab.index 0 : { *(.stab.index) } + .stab.indexstr 0 : { *(.stab.indexstr) } + .comment 0 : { *(.comment) } + /* DWARF debug sections. + Symbols in the DWARF debugging sections are relative to the beginning + of the section so we begin them at 0. */ + /* DWARF 1 */ + .debug 0 : { *(.debug) } + .line 0 : { *(.line) } + /* GNU DWARF 1 extensions */ + .debug_srcinfo 0 : { *(.debug_srcinfo) } + .debug_sfnames 0 : { *(.debug_sfnames) } + /* DWARF 1.1 and DWARF 2 */ + .debug_aranges 0 : { *(.debug_aranges) } + .debug_pubnames 0 : { *(.debug_pubnames) } + /* DWARF 2 */ + .debug_info 0 : { *(.debug_info) } + .debug_abbrev 0 : { *(.debug_abbrev) } + .debug_line 0 : { *(.debug_line) } + .debug_frame 0 : { *(.debug_frame) } + .debug_str 0 : { *(.debug_str) } + .debug_loc 0 : { *(.debug_loc) } + .debug_macinfo 0 : { *(.debug_macinfo) } + /* SGI/MIPS DWARF 2 extensions */ + .debug_weaknames 0 : { *(.debug_weaknames) } + .debug_funcnames 0 : { *(.debug_funcnames) } + .debug_typenames 0 : { *(.debug_typenames) } + .debug_varnames 0 : { *(.debug_varnames) } + + .stack 0x00081ff0 : { _stack = .; *(.stack) } /* > onchip_ram */ + /* These must appear regardless of . */ +} -- cgit v1.2.3