From 353be08b396c45c494576bec0b0c00cfe6fd1c22 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 7 Jun 2011 13:28:01 +0000 Subject: 2011-06-07 Sebastian Huber * configure.ac, startup/bspstart.c: Use standard cache BSP options. --- c/src/lib/libbsp/powerpc/score603e/ChangeLog | 4 ++++ c/src/lib/libbsp/powerpc/score603e/configure.ac | 15 ++++++--------- c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c | 4 ++-- 3 files changed, 12 insertions(+), 11 deletions(-) (limited to 'c/src/lib/libbsp/powerpc/score603e') diff --git a/c/src/lib/libbsp/powerpc/score603e/ChangeLog b/c/src/lib/libbsp/powerpc/score603e/ChangeLog index 519b014d78..6fb019243b 100644 --- a/c/src/lib/libbsp/powerpc/score603e/ChangeLog +++ b/c/src/lib/libbsp/powerpc/score603e/ChangeLog @@ -1,3 +1,7 @@ +2011-06-07 Sebastian Huber + + * configure.ac, startup/bspstart.c: Use standard cache BSP options. + 2011-05-17 Till Straumann PR1797/bsps diff --git a/c/src/lib/libbsp/powerpc/score603e/configure.ac b/c/src/lib/libbsp/powerpc/score603e/configure.ac index 82a8cd0422..e7ffcdf2c2 100644 --- a/c/src/lib/libbsp/powerpc/score603e/configure.ac +++ b/c/src/lib/libbsp/powerpc/score603e/configure.ac @@ -15,6 +15,12 @@ RTEMS_PROG_CC_FOR_TARGET RTEMS_CANONICALIZE_TOOLS RTEMS_PROG_CCAS +RTEMS_BSPOPTS_SET_DATA_CACHE_ENABLED([*],[]) +RTEMS_BSPOPTS_HELP_DATA_CACHE_ENABLED + +RTEMS_BSPOPTS_SET_INSTRUCTION_CACHE_ENABLED([*],[]) +RTEMS_BSPOPTS_HELP_INSTRUCTION_CACHE_ENABLED + ## FIXME: This should be a 1 out of 3 selection ## and is somehow coupled to USE_DINK (cf. include/gen2.h) RTEMS_BSPOPTS_SET([SCORE603E_USE_SDS],[*],[0]) @@ -52,15 +58,6 @@ of the special purpose registers to slightly optimize interrupt response time. The use of these registers can conflict with other tools like debuggers.]) -RTEMS_BSPOPTS_SET([PPC_USE_DATA_CACHE],[*],[0]) -RTEMS_BSPOPTS_HELP([PPC_USE_DATA_CACHE], -[If defined, then the PowerPC specific code in RTEMS will use - data cache instructions to optimize the context switch code. - This code can conflict with debuggers or emulators. It is known - to break the Corelis PowerPC emulator with at least some combinations - of PowerPC 603e revisions and emulator versions. - The BSP actually contains the call that enables this.]) - RTEMS_BSPOPTS_SET([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [*], [1]) RTEMS_BSPOPTS_HELP([CONFIGURE_MALLOC_BSP_SUPPORTS_SBRK], [If defined then the BSP may reduce the available memory size diff --git a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c index 2ce9f958e0..2d9980fe5e 100644 --- a/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/score603e/startup/bspstart.c @@ -223,14 +223,14 @@ void bsp_start( void ) #endif bsp_clicks_per_usec = 66 / 4; - #if ( PPC_USE_DATA_CACHE ) + #if BSP_DATA_CACHE_ENABLED #if DEBUG printk("bsp_start: cache_enable\n"); #endif instruction_cache_enable (); data_cache_enable (); #if DEBUG - printk("bsp_start: END PPC_USE_DATA_CACHE\n"); + printk("bsp_start: END BSP_DATA_CACHE_ENABLED\n"); #endif #endif -- cgit v1.2.3