From b1ef3674c0bffdd169e070f039d413cceb5e706c Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Wed, 27 Jul 2016 11:30:09 +0200 Subject: bsp/qoriq: Add QORIQ_HAS_WRITE_BACK_L1_CACHE Fixes start via U-Boot on P1020. --- c/src/lib/libbsp/powerpc/qoriq/configure.ac | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'c/src/lib/libbsp/powerpc/qoriq/configure.ac') diff --git a/c/src/lib/libbsp/powerpc/qoriq/configure.ac b/c/src/lib/libbsp/powerpc/qoriq/configure.ac index 10dd17c0f9..9e63763b9e 100644 --- a/c/src/lib/libbsp/powerpc/qoriq/configure.ac +++ b/c/src/lib/libbsp/powerpc/qoriq/configure.ac @@ -172,6 +172,10 @@ RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[qoriq_t*],[1]) RTEMS_BSPOPTS_SET([QORIQ_HAS_HYPERVISOR_MODE],[*],[]) RTEMS_BSPOPTS_HELP([QORIQ_HAS_HYPERVISOR_MODE],[defined if the processor core has a hypervisor mode]) +RTEMS_BSPOPTS_SET([QORIQ_HAS_WRITE_BACK_L1_CACHE],[qoriq_t*],[]) +RTEMS_BSPOPTS_SET([QORIQ_HAS_WRITE_BACK_L1_CACHE],[*],[1]) +RTEMS_BSPOPTS_HELP([QORIQ_HAS_WRITE_BACK_L1_CACHE],[defined if the L1 cache supports write-back]) + RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[qoriq_t*],[0xfec20000]) RTEMS_BSPOPTS_SET([QORIQ_CLUSTER_1_L2CSR0],[*],[]) RTEMS_BSPOPTS_HELP([QORIQ_CLUSTER_1_L2CSR0],[address of Cluster 1 L2CSR0 register]) -- cgit v1.2.3