From f7ac681b5166bd91781c026ed81493e524860955 Mon Sep 17 00:00:00 2001 From: Thomas Doerfler Date: Fri, 30 Oct 2009 13:52:34 +0000 Subject: remove depratated powerpc exception API --- c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog | 5 + c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S | 410 --------------------- c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c | 163 -------- c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S | 146 -------- c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h | 143 ------- .../libbsp/powerpc/mbx8xx/vectors/vectors_init.c | 140 ------- 6 files changed, 5 insertions(+), 1002 deletions(-) delete mode 100644 c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S delete mode 100644 c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c delete mode 100644 c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S delete mode 100644 c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h delete mode 100644 c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c (limited to 'c/src/lib/libbsp/powerpc/mbx8xx') diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog index 43ed908a1d..5560144064 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog +++ b/c/src/lib/libbsp/powerpc/mbx8xx/ChangeLog @@ -1,3 +1,8 @@ +2009-10-23 Sebastian Huber + + * vectors/vectors.h, vectors/vectors_init.c, vectors/vectors.S, + irq/irq_init.c, irq/irq_asm.S: Removed files. + 2009-10-23 Sebastian Huber * include/irq-config.h: New file. diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S deleted file mode 100644 index c40df33880..0000000000 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_asm.S +++ /dev/null @@ -1,410 +0,0 @@ -/* - * This file contains the assembly code for the PowerPC - * IRQ veneers for RTEMS. - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * Modified to support the MCP750. - * Modifications Copyright (C) 1999 Eric Valette. valette@crf.canon.fr - * - * Till Straumann , 2003/7: - * - store isr nesting level in _ISR_Nest_level rather than - * SPRG0 - RTEMS relies on that variable. - * Till Straumann , 2005/4: - * - DONT enable FP across user ISR since fpregs are never saved!! - * - * $Id$ - */ - -#include -#include -#include -#include - -#define SYNC \ - sync; \ - isync - - .text - .p2align 5 - - PUBLIC_VAR(decrementer_exception_vector_prolog_code) - -SYM (decrementer_exception_vector_prolog_code): - /* - * let room for exception frame - */ - stwu r1, - (EXCEPTION_FRAME_END)(r1) - stw r4, GPR4_OFFSET(r1) -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* - * save link register - */ - mflr r4 - stw r4, EXC_LR_OFFSET(r1) - /* - * make link register contain shared_raw_irq_code_entry - * address - */ - lis r4,shared_raw_irq_code_entry@h - ori r4,r4,shared_raw_irq_code_entry@l - mtlr r4 - - li r4, ASM_DEC_VECTOR - blr -#else - li r4, ASM_DEC_VECTOR - ba shared_raw_irq_code_entry -#endif - - PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - - decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code - - PUBLIC_VAR(external_exception_vector_prolog_code) - -SYM (external_exception_vector_prolog_code): - /* - * let room for exception frame - */ - stwu r1, - (EXCEPTION_FRAME_END)(r1) - stw r4, GPR4_OFFSET(r1) -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - /* - * save link register - */ - mflr r4 - stw r4, EXC_LR_OFFSET(r1) - /* - * make link register contain shared_raw_irq_code_entry - * address - */ - lis r4,shared_raw_irq_code_entry@h - ori r4,r4,shared_raw_irq_code_entry@l - mtlr r4 - - li r4, ASM_EXT_VECTOR - blr -#else - li r4, ASM_EXT_VECTOR - ba shared_raw_irq_code_entry -#endif - - PUBLIC_VAR (external_exception_vector_prolog_code_size) - - external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code - - PUBLIC_VAR(shared_raw_irq_code_entry) - PUBLIC_VAR(C_dispatch_irq_handler) - - .p2align 5 -SYM (shared_raw_irq_code_entry): - /* - * Entry conditions : - * Registers already saved : R1, R4 - * R1 : points to a location with enough room for the - * interrupt frame - * R4 : vector number - */ - /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed - * to reenable exception processing - */ - stw r0, GPR0_OFFSET(r1) - stw r2, GPR2_OFFSET(r1) - stw r3, GPR3_OFFSET(r1) - - mfsrr0 r0 - mfsrr1 r2 - mfmsr r3 - - stw r0, SRR0_FRAME_OFFSET(r1) - stw r2, SRR1_FRAME_OFFSET(r1) - /* - * Enable data and instruction address translation, exception recovery - * - * also, on CPUs with FP, enable FP so that FP context can be - * saved and restored (using FP instructions) - */ - ori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Push C scratch registers on the current stack. It may - * actually be the thread stack or the interrupt stack. - * Anyway we have to make it in order to be able to call C/C++ - * functions. Depending on the nesting interrupt level, we will - * switch to the right stack later. - */ - stw r5, GPR5_OFFSET(r1) - stw r6, GPR6_OFFSET(r1) - stw r7, GPR7_OFFSET(r1) - stw r8, GPR8_OFFSET(r1) - stw r9, GPR9_OFFSET(r1) - stw r10, GPR10_OFFSET(r1) - stw r11, GPR11_OFFSET(r1) - stw r12, GPR12_OFFSET(r1) - stw r13, GPR13_OFFSET(r1) - - mfcr r5 - mfctr r6 - mfxer r7 -#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - mflr r8 -#endif - - stw r5, EXC_CR_OFFSET(r1) - stw r6, EXC_CTR_OFFSET(r1) - stw r7, EXC_XER_OFFSET(r1) -#ifndef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - stw r8, EXC_LR_OFFSET(r1) -#endif - - /* - * Add some non volatile registers to store information - * that will be used when returning from C handler - */ - stw r14, GPR14_OFFSET(r1) - stw r15, GPR15_OFFSET(r1) - /* - * save current stack pointer location in R14 - */ - addi r14, r1, 0 - /* - * store part of _Thread_Dispatch_disable_level address in R15 - */ - addis r15,0, _Thread_Dispatch_disable_level@ha -#if BROKEN_ISR_NEST_LEVEL - /* - * Get current nesting level in R2 - */ - mfspr r2, SPRG0 -#else - /* - * Retrieve current nesting level from _ISR_Nest_level - */ - lis r7, _ISR_Nest_level@ha - lwz r2, _ISR_Nest_level@l(r7) -#endif - /* - * Check if stack switch is necessary - */ - cmpwi r2,0 - bne nested - mfspr r1, SPRG1 - -nested: - /* - * Start Incrementing nesting level in R2 - */ - addi r2,r2,1 - /* - * Start Incrementing _Thread_Dispatch_disable_level R4 = _Thread_Dispatch_disable_level - */ - lwz r6,_Thread_Dispatch_disable_level@l(r15) -#if BROKEN_ISR_NEST_LEVEL - /* - * Store new nesting level in SPRG0 - */ - mtspr SPRG0, r2 -#else - /* store new nesting level in _ISR_Nest_level */ - stw r2, _ISR_Nest_level@l(r7) -#endif - - addi r6, r6, 1 - mfmsr r5 - /* - * store new _Thread_Dispatch_disable_level value - */ - stw r6, _Thread_Dispatch_disable_level@l(r15) - /* - * We are now running on the interrupt stack. External and decrementer - * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. - */ - /* - * Call C exception handler for decrementer Interrupt frame is passed just - * in case... - */ - addi r3, r14, 0x8 - bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ - /* - * start decrementing nesting level. Note : do not test result against 0 - * value as an easy exit condition because if interrupt nesting level > 1 - * then _Thread_Dispatch_disable_level > 1 - */ -#if BROKEN_ISR_NEST_LEVEL - mfspr r2, SPRG0 -#else - lis r7, _ISR_Nest_level@ha - lwz r2, _ISR_Nest_level@l(r7) -#endif - /* - * start decrementing _Thread_Dispatch_disable_level - */ - lwz r3,_Thread_Dispatch_disable_level@l(r15) - addi r2, r2, -1 /* Continue decrementing nesting level */ - addi r3, r3, -1 /* Continue decrementing _Thread_Dispatch_disable_level */ -#if BROKEN_ISR_NEST_LEVEL - mtspr SPRG0, r2 /* End decrementing nesting level */ -#else - stw r2, _ISR_Nest_level@l(r7) /* End decrementing nesting level */ -#endif - stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ - cmpwi r3, 0 - /* - * switch back to original stack (done here just optimize registers - * contention. Could have been done before...) - */ - addi r1, r14, 0 - bne easy_exit /* if (_Thread_Dispatch_disable_level != 0) goto easy_exit */ - /* - * Here we are running again on the thread system stack. - * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to - * do something with the current thread... - */ - addis r4, 0, _Context_Switch_necessary@ha - lbz r5, _Context_Switch_necessary@l(r4) - cmpwi r5, 0 - bne switch - - addis r6, 0, _ISR_Signals_to_thread_executing@ha - lbz r7, _ISR_Signals_to_thread_executing@l(r6) - cmpwi r7, 0 - li r8, 0 - beq easy_exit - stb r8, _ISR_Signals_to_thread_executing@l(r6) - /* - * going to call _ThreadProcessSignalsFromIrq - * Push a complete exception like frame... - */ - stmw r16, GPR16_OFFSET(r1) - addi r3, r1, 0x8 - /* - * compute SP at exception entry - */ - addi r2, r1, EXCEPTION_FRAME_END - /* - * store it at the right place - */ - stw r2, GPR1_OFFSET(r1) - /* - * Call High Level signal handling code - */ - bl _ThreadProcessSignalsFromIrq - /* - * start restoring exception like frame - */ - lwz r31, EXC_CTR_OFFSET(r1) - lwz r30, EXC_XER_OFFSET(r1) - lwz r29, EXC_CR_OFFSET(r1) - lwz r28, EXC_LR_OFFSET(r1) - - mtctr r31 - mtxer r30 - mtcr r29 - mtlr r28 - - lmw r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) - - /* - * Disable data and instruction translation. Make path non recoverable... - */ - mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Restore rfi related settings - */ - - lwz r3, SRR1_FRAME_OFFSET(r1) - mtsrr1 r3 - lwz r3, SRR0_FRAME_OFFSET(r1) - mtsrr0 r3 - - lwz r3, GPR3_OFFSET(r1) - addi r1,r1, EXCEPTION_FRAME_END - SYNC - rfi - -switch: -#if ( PPC_HAS_FPU != 0 ) -#if ! defined( CPU_USE_DEFERRED_FP_SWITCH ) -#error missing include file??? -#endif - mfmsr r4 -#if ( CPU_USE_DEFERRED_FP_SWITCH == TRUE ) - /* if the executing thread has FP enabled propagate - * this now so _Thread_Dispatch can save/restore the FPREGS - * NOTE: it is *crucial* to disable the FPU across the - * user ISR [independent of using the 'deferred' - * strategy or not]. We don't save FP regs across - * the user ISR and hence we prefer an exception to - * be raised rather than experiencing corruption. - */ - lwz r3, SRR1_FRAME_OFFSET(r1) - rlwimi r4, r3, 0, 18, 18 /* MSR_FP */ -#else - ori r4, r4, MSR_FP -#endif - mtmsr r4 -#endif - bl SYM (_Thread_Dispatch) - -easy_exit: - /* - * start restoring interrupt frame - */ - lwz r3, EXC_CTR_OFFSET(r1) - lwz r4, EXC_XER_OFFSET(r1) - lwz r5, EXC_CR_OFFSET(r1) - lwz r6, EXC_LR_OFFSET(r1) - - mtctr r3 - mtxer r4 - mtcr r5 - mtlr r6 - - lwz r15, GPR15_OFFSET(r1) - lwz r14, GPR14_OFFSET(r1) - lwz r13, GPR13_OFFSET(r1) - lwz r12, GPR12_OFFSET(r1) - lwz r11, GPR11_OFFSET(r1) - lwz r10, GPR10_OFFSET(r1) - lwz r9, GPR9_OFFSET(r1) - lwz r8, GPR8_OFFSET(r1) - lwz r7, GPR7_OFFSET(r1) - lwz r6, GPR6_OFFSET(r1) - lwz r5, GPR5_OFFSET(r1) - - /* - * Disable nested exception processing, data and instruction - * translation. - */ - mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Restore rfi related settings - */ - - lwz r4, SRR1_FRAME_OFFSET(r1) - lwz r2, SRR0_FRAME_OFFSET(r1) - lwz r3, GPR3_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) - - mtsrr1 r4 - mtsrr0 r2 - lwz r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - addi r1,r1, EXCEPTION_FRAME_END - SYNC - rfi diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c b/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c deleted file mode 100644 index 3024bcfd69..0000000000 --- a/c/src/lib/libbsp/powerpc/mbx8xx/irq/irq_init.c +++ /dev/null @@ -1,163 +0,0 @@ -/* irq_init.c - * - * This file contains the implementation of rtems initialization - * related to interrupt handling. - * - * CopyRight (C) 2001 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ -#include -#include -#include -#include -#include -#include - -extern unsigned int external_exception_vector_prolog_code_size; -extern void external_exception_vector_prolog_code(void); -extern unsigned int decrementer_exception_vector_prolog_code_size; -extern void decrementer_exception_vector_prolog_code(void); - -volatile unsigned int ppc_cached_irq_mask; - -/* - * default on/off function - */ -static void nop_func1(void *unused){} -static void nop_func2(void){} - -/* - * default isOn function - */ -static int not_connected(void) {return 0;} -/* - * default possible isOn function - */ -static int connected(void) {return 1;} - -static rtems_irq_connect_data rtemsIrq[BSP_IRQ_NUMBER]; -static rtems_irq_global_settings initial_config; -static rtems_irq_connect_data defaultIrq = { - /* vectorIdex, hdl , handle , on , off , isOn */ - 0, nop_func1 , 0 , nop_func2 , nop_func2 , not_connected -}; -static rtems_irq_prio irqPrioTable[BSP_IRQ_NUMBER]={ - /* - * actual rpiorities for interrupt : - * 0 means that only current interrupt is masked - * 255 means all other interrupts are masked - */ - /* - * SIU interrupts. - */ - 7,7, 6,6, 5,5, 4,4, 3,3, 2,2, 1,1, 0,0, - /* - * CPM Interrupts - */ - 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, - 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, - /* - * Processor exceptions handled as interrupts - */ - 0 -}; - -void BSP_SIU_irq_init(void) -{ - /* - * In theory we should initialize two registers at least : - * SIMASK, SIEL. SIMASK is reset at 0 value meaning no interrupt. But - * we should take care that a monitor may have restoreed to another value. - * If someone find a reasonnable value for SIEL, AND THE NEED TO CHANGE IT - * please feel free to add it here. - */ - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 0; - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 0xffff0000; - ppc_cached_irq_mask = 0; - ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel; -} - -/* - * Initialize CPM interrupt management - */ -void -BSP_CPM_irq_init(void) -{ - /* - * Initialize the CPM interrupt controller. - */ - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = -#ifdef mpc860 - (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#else - (CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#endif - ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; - - ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; -} - -void BSP_rtems_irq_mng_init(unsigned cpuId) -{ - rtems_raw_except_connect_data vectorDesc; - int i; - - BSP_SIU_irq_init(); - BSP_CPM_irq_init(); - /* - * Initialize Rtems management interrupt table - */ - /* - * re-init the rtemsIrq table - */ - for (i = 0; i < BSP_IRQ_NUMBER; i++) { - rtemsIrq[i] = defaultIrq; - rtemsIrq[i].name = i; - } - /* - * Init initial Interrupt management config - */ - initial_config.irqNb = BSP_IRQ_NUMBER; - initial_config.defaultEntry = defaultIrq; - initial_config.irqHdlTbl = rtemsIrq; - initial_config.irqBase = BSP_LOWEST_OFFSET; - initial_config.irqPrioTbl = irqPrioTable; - - if (!BSP_rtems_irq_mngt_set(&initial_config)) { - /* - * put something here that will show the failure... - */ - BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); - } - - /* - * We must connect the raw irq handler for the two - * expected interrupt sources : decrementer and external interrupts. - */ - vectorDesc.exceptIndex = ASM_DEC_VECTOR; - vectorDesc.hdl.vector = ASM_DEC_VECTOR; - vectorDesc.hdl.raw_hdl = decrementer_exception_vector_prolog_code; - vectorDesc.hdl.raw_hdl_size = (unsigned) &decrementer_exception_vector_prolog_code_size; - vectorDesc.on = nop_func2; - vectorDesc.off = nop_func2; - vectorDesc.isOn = connected; - if (!ppc_set_exception (&vectorDesc)) { - BSP_panic("Unable to initialize RTEMS decrementer raw exception\n"); - } - vectorDesc.exceptIndex = ASM_EXT_VECTOR; - vectorDesc.hdl.vector = ASM_EXT_VECTOR; - vectorDesc.hdl.raw_hdl = external_exception_vector_prolog_code; - vectorDesc.hdl.raw_hdl_size = (unsigned) &external_exception_vector_prolog_code_size; - if (!ppc_set_exception (&vectorDesc)) { - BSP_panic("Unable to initialize RTEMS external raw exception\n"); - } -#ifdef TRACE_IRQ_INIT - printk("RTEMS IRQ management is now operationnal\n"); -#endif -} diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S deleted file mode 100644 index 8b1793bf8a..0000000000 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.S +++ /dev/null @@ -1,146 +0,0 @@ -/* - * (c) 1999, Eric Valette valette@crf.canon.fr - * - * - * This file contains the assembly code for the PowerPC - * exception veneers for RTEMS. - * - * $Id$ - */ - -#include -#include -#include - -#define SYNC \ - sync; \ - isync - - .text - .p2align 5 - -PUBLIC_VAR(default_exception_vector_code_prolog) -SYM (default_exception_vector_code_prolog): - /* - * let room for exception frame - */ - stwu r1, - (EXCEPTION_FRAME_END)(r1) - stw r3, GPR3_OFFSET(r1) - stw r2, GPR2_OFFSET(r1) - mflr r2 - stw r2, EXC_LR_OFFSET(r1) - bl 0f -0: /* - * r3 = exception vector entry point - * (256 * vector number) + few instructions - */ - mflr r3 - /* - * r3 = r3 >> 8 = vector - */ - srwi r3,r3,8 -#ifdef THIS_CODE_LINKED_USING_FLASH_ADDR_RANGE - lis r2,push_normalized_frame@h - ori r2,r2,push_normalized_frame@l - mtlr r2 - blr -#else - ba push_normalized_frame -#endif - - PUBLIC_VAR (default_exception_vector_code_prolog_size) - - default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - - .p2align 5 -PUBLIC_VAR (push_normalized_frame) -SYM (push_normalized_frame): - stw r3, EXCEPTION_NUMBER_OFFSET(r1) - stw r0, GPR0_OFFSET(r1) - mfsrr0 r2 - stw r2, SRR0_FRAME_OFFSET(r1) - mfsrr1 r3 - stw r3, SRR1_FRAME_OFFSET(r1) - /* - * Save general purpose registers - * Already saved in prolog : R1, R2, R3, LR. - * Saved a few line above : R0 - * - * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance - * for the DEFAULT exception handler? - */ - stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ - - mfcr r31 - stw r31, EXC_CR_OFFSET(r1) - mfctr r30 - stw r30, EXC_CTR_OFFSET(r1) - mfxer r28 - stw r28, EXC_XER_OFFSET(r1) - /* - * compute SP at exception entry - */ - addi r2, r1, EXCEPTION_FRAME_END - /* - * store it at the right place - */ - stw r2, GPR1_OFFSET(r1) - /* - * Enable data and instruction address translation, exception nesting - */ - mfmsr r3 - ori r3,r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - - /* - * Call C exception handler - */ - /* - * store the execption frame address in r3 (first param) - */ - addi r3, r1, 0x8 - /* - * globalExceptHdl(r3) - */ - addis r4, 0, globalExceptHdl@ha - lwz r5, globalExceptHdl@l(r4) - mtlr r5 - blrl - /* - * Restore registers status - */ - lwz r31, EXC_CR_OFFSET(r1) - mtcr r31 - lwz r30, EXC_CTR_OFFSET(r1) - mtctr r30 - lwz r29, EXC_LR_OFFSET(r1) - mtlr r29 - lwz r28, EXC_XER_OFFSET(r1) - mtxer r28 - - lmw r4, GPR4_OFFSET(r1) - lwz r2, GPR2_OFFSET(r1) - lwz r0, GPR0_OFFSET(r1) - - /* - * Disable data and instruction translation. Make path non recoverable... - */ - mfmsr r3 - xori r3, r3, MSR_RI | MSR_IR | MSR_DR - mtmsr r3 - SYNC - /* - * Restore rfi related settings - */ - - lwz r3, SRR1_FRAME_OFFSET(r1) - mtsrr1 r3 - lwz r3, SRR0_FRAME_OFFSET(r1) - mtsrr0 r3 - - lwz r3, GPR3_OFFSET(r1) - addi r1,r1, EXCEPTION_FRAME_END - SYNC - rfi diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h deleted file mode 100644 index 3c37c54c73..0000000000 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * vectors.h Exception frame related contant and API. - * - * This include file describe the data structure and the functions implemented - * by rtems to handle exceptions. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ -#ifndef LIBBSP_POWERPC_MBX8XX_VECTORS_H -#define LIBBSP_POWERPC_MBX8XX_VECTORS_H - -/* - * The callee (high level exception code written in C) - * will store the Link Registers (return address) at entry r1 + 4 !!!. - * So let room for it!!!. - */ -#define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 -#define SRR0_FRAME_OFFSET 8 -#define SRR1_FRAME_OFFSET 12 -#define EXCEPTION_NUMBER_OFFSET 16 -#define GPR0_OFFSET 20 -#define GPR1_OFFSET 24 -#define GPR2_OFFSET 28 -#define GPR3_OFFSET 32 -#define GPR4_OFFSET 36 -#define GPR5_OFFSET 40 -#define GPR6_OFFSET 44 -#define GPR7_OFFSET 48 -#define GPR8_OFFSET 52 -#define GPR9_OFFSET 56 -#define GPR10_OFFSET 60 -#define GPR11_OFFSET 64 -#define GPR12_OFFSET 68 -#define GPR13_OFFSET 72 -#define GPR14_OFFSET 76 -#define GPR15_OFFSET 80 -#define GPR16_OFFSET 84 -#define GPR17_OFFSET 88 -#define GPR18_OFFSET 92 -#define GPR19_OFFSET 96 -#define GPR20_OFFSET 100 -#define GPR21_OFFSET 104 -#define GPR22_OFFSET 108 -#define GPR23_OFFSET 112 -#define GPR24_OFFSET 116 -#define GPR25_OFFSET 120 -#define GPR26_OFFSET 124 -#define GPR27_OFFSET 128 -#define GPR28_OFFSET 132 -#define GPR29_OFFSET 136 -#define GPR30_OFFSET 140 -#define GPR31_OFFSET 144 -#define EXC_CR_OFFSET 148 -#define EXC_CTR_OFFSET 152 -#define EXC_XER_OFFSET 156 -#define EXC_LR_OFFSET 160 -#define EXC_DAR_OFFSET 164 -/* - * maintain the EABI requested 8 bytes aligment - * As SVR4 ABI requires 16, make it 16 (as some - * exception may need more registers to be processed...) - */ -#define EXCEPTION_FRAME_END 176 - -#ifndef ASM -/* - * default raw exception handlers - */ - -extern void default_exception_vector_code_prolog(); -extern int default_exception_vector_code_prolog_size; - -/* codemove is like memmove, but it also gets the cache line size - * as 4th parameter to synchronize them. If this last parameter is - * zero, it performs more or less like memmove. No copy is performed if - * source and destination addresses are equal. However the caches - * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. - */ -extern void * codemove(void *, const void *, unsigned int, unsigned long); -extern void initialize_exceptions(); - -typedef struct { - unsigned EXC_SRR0; - unsigned EXC_SRR1; - unsigned _EXC_number; - unsigned GPR0; - unsigned GPR1; - unsigned GPR2; - unsigned GPR3; - unsigned GPR4; - unsigned GPR5; - unsigned GPR6; - unsigned GPR7; - unsigned GPR8; - unsigned GPR9; - unsigned GPR10; - unsigned GPR11; - unsigned GPR12; - unsigned GPR13; - unsigned GPR14; - unsigned GPR15; - unsigned GPR16; - unsigned GPR17; - unsigned GPR18; - unsigned GPR19; - unsigned GPR20; - unsigned GPR21; - unsigned GPR22; - unsigned GPR23; - unsigned GPR24; - unsigned GPR25; - unsigned GPR26; - unsigned GPR27; - unsigned GPR28; - unsigned GPR29; - unsigned GPR30; - unsigned GPR31; - unsigned EXC_CR; - unsigned EXC_CTR; - unsigned EXC_XER; - unsigned EXC_LR; - unsigned EXC_MSR; - unsigned EXC_DAR; -}BSP_Exception_frame; - -typedef void (*exception_handler_t) (BSP_Exception_frame* excPtr); -extern exception_handler_t globalExceptHdl; -/* - * Compatibility with pc386 - */ -typedef BSP_Exception_frame CPU_Exception_frame; -typedef exception_handler_t cpuExcHandlerType; - -#endif /* ASM */ - -#endif /* LIBBSP_POWERPC_MCP750_VECTORS_H */ diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c deleted file mode 100644 index 36120478cf..0000000000 --- a/c/src/lib/libbsp/powerpc/mbx8xx/vectors/vectors_init.c +++ /dev/null @@ -1,140 +0,0 @@ -/* - * vectors_init.c Exception hanlding initialisation (and generic handler). - * - * This include file describe the data structure and the functions implemented - * by rtems to handle exceptions. - * - * CopyRight (C) 1999 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.rtems.com/license/LICENSE. - * - * $Id$ - */ -#include -#include -#include -#include - -static rtems_raw_except_global_settings exception_config; -static rtems_raw_except_connect_data exception_table[LAST_VALID_EXC + 1]; - -exception_handler_t globalExceptHdl; - -void C_exception_handler(BSP_Exception_frame* excPtr) -{ - int recoverable = 0; - - printk("exception handler called for exception %d\n", excPtr->_EXC_number); - printk("\t Next PC or Address of fault = %x\n", excPtr->EXC_SRR0); - printk("\t Saved MSR = %x\n", excPtr->EXC_SRR1); - printk("\t R0 = %x\n", excPtr->GPR0); - printk("\t R1 = %x\n", excPtr->GPR1); - printk("\t R2 = %x\n", excPtr->GPR2); - printk("\t R3 = %x\n", excPtr->GPR3); - printk("\t R4 = %x\n", excPtr->GPR4); - printk("\t R5 = %x\n", excPtr->GPR5); - printk("\t R6 = %x\n", excPtr->GPR6); - printk("\t R7 = %x\n", excPtr->GPR7); - printk("\t R8 = %x\n", excPtr->GPR8); - printk("\t R9 = %x\n", excPtr->GPR9); - printk("\t R10 = %x\n", excPtr->GPR10); - printk("\t R11 = %x\n", excPtr->GPR11); - printk("\t R12 = %x\n", excPtr->GPR12); - printk("\t R13 = %x\n", excPtr->GPR13); - printk("\t R14 = %x\n", excPtr->GPR14); - printk("\t R15 = %x\n", excPtr->GPR15); - printk("\t R16 = %x\n", excPtr->GPR16); - printk("\t R17 = %x\n", excPtr->GPR17); - printk("\t R18 = %x\n", excPtr->GPR18); - printk("\t R19 = %x\n", excPtr->GPR19); - printk("\t R20 = %x\n", excPtr->GPR20); - printk("\t R21 = %x\n", excPtr->GPR21); - printk("\t R22 = %x\n", excPtr->GPR22); - printk("\t R23 = %x\n", excPtr->GPR23); - printk("\t R24 = %x\n", excPtr->GPR24); - printk("\t R25 = %x\n", excPtr->GPR25); - printk("\t R26 = %x\n", excPtr->GPR26); - printk("\t R27 = %x\n", excPtr->GPR27); - printk("\t R28 = %x\n", excPtr->GPR28); - printk("\t R29 = %x\n", excPtr->GPR29); - printk("\t R30 = %x\n", excPtr->GPR30); - printk("\t R31 = %x\n", excPtr->GPR31); - printk("\t CR = %x\n", excPtr->EXC_CR); - printk("\t CTR = %x\n", excPtr->EXC_CTR); - printk("\t XER = %x\n", excPtr->EXC_XER); - printk("\t LR = %x\n", excPtr->EXC_LR); - printk("\t MSR = %x\n", excPtr->EXC_MSR); - if (excPtr->_EXC_number == ASM_DEC_VECTOR) - recoverable = 1; - if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE - recoverable = 1; -#else - recoverable = 0; -#endif - if (!recoverable) { - printk("unrecoverable exception!!! Push reset button\n"); - while(1); - } -} - -void nop_except_enable(const rtems_raw_except_connect_data* ptr) -{ -} -int except_always_enabled(const rtems_raw_except_connect_data* ptr) -{ - return 1; -} - -void initialize_exceptions(void) -{ - int i; - - /* - * Initialize pointer used by low level execption handling - */ - globalExceptHdl = C_exception_handler; - /* - * Put default_exception_vector_code_prolog at relevant exception - * code entry addresses - */ - exception_config.exceptSize = LAST_VALID_EXC + 1; - exception_config.rawExceptHdlTbl = &exception_table[0]; - exception_config.defaultRawEntry.exceptIndex = 0; - exception_config.defaultRawEntry.hdl.vector = 0; - exception_config.defaultRawEntry.hdl.raw_hdl = default_exception_vector_code_prolog; - /* - * Note that next line the '&' before default_exception_vector_code_prolog_size - * is not a bug as it is defined a .set directly in asm... - */ - exception_config.defaultRawEntry.hdl.raw_hdl_size = (unsigned) &default_exception_vector_code_prolog_size; - for (i=0; i <= exception_config.exceptSize; i++) { - printk("installing exception number %d\n", i); - if (!ppc_vector_is_valid (i)) { - continue; - } -#if 0 /* FIXME: refine this condition, leave Syscall for EPPCBug console */ - if (i == ASM_SYS_VECTOR) { - continue; - } -#endif - exception_table[i].exceptIndex = i; - exception_table[i].hdl = exception_config.defaultRawEntry.hdl; - exception_table[i].hdl.vector = i; - exception_table[i].on = nop_except_enable; - exception_table[i].off = nop_except_enable; - exception_table[i].isOn = except_always_enabled; - } - if (!ppc_init_exceptions(&exception_config)) { - /* - * At this stage we may not call BSP_Panic because it uses exceptions!!! - */ - printk("Exception handling initialization failed\n"); - printk("System locked\n"); while(1); - } - else { - printk("Exception handling initialization done\n"); - } -} -- cgit v1.2.3