From 848e900c5c47fc0dbc24d2e093e3a6a3fa76202c Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 12 Sep 2005 13:32:58 +0000 Subject: 2005-09-12 Thomas Doerfler PR 822/bsps * console/console.c, startup/bspstart.c, startup/imbx8xx.c, startup/mmutlbtab.c, startup/start.S, vectors/vectors_init.c: Currently the MBX8xx BSP does not boot, because some logical errors are in the startup code. Additionally, the mpc8xx shared clock driver does not support the clocking scheme of some of the board variants, which are clocked from a 32768Hz (!) external crystal. --- c/src/lib/libbsp/powerpc/mbx8xx/console/console.c | 26 +++++++++++++++++++++++ 1 file changed, 26 insertions(+) (limited to 'c/src/lib/libbsp/powerpc/mbx8xx/console/console.c') diff --git a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c index e5507eeb0c..c723c80c48 100644 --- a/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c +++ b/c/src/lib/libbsp/powerpc/mbx8xx/console/console.c @@ -537,6 +537,13 @@ serial_init() unsigned int dpaddr, memaddr; bd_t *bd; +#if NVRAM_CONFIGURE == 1 + if ( ((nvram->console_mode & 0x06) != 0x04 ) || + ((nvram->console_mode & 0x30) != 0x20 )) { + /* + * FIXME: refine this condition... + */ +#endif bd = eppcbugInfo; cp = cpmp; @@ -642,7 +649,26 @@ serial_init() /* Enable transmitter/receiver. */ sp->smc_smcmr |= SMCMR_REN | SMCMR_TEN; +#if NVRAM_CONFIGURE == 1 + } + else { + const char bootmsg_text[]= "using EPPC bug for console I/O\n"; + _EPPCBug_pollWrite((nvram->console_printk_port & 0x70) >> 4, + bootmsg_text, + sizeof(bootmsg_text)-1); + } +#endif +#if NVRAM_CONFIGURE == 1 + if ((nvram->console_mode & 0x30) == 0x20 ) { + BSP_output_char = _BSP_output_char; + } + else { + BSP_output_char = serial_putchar; + } +#else + BSP_output_char = serial_putchar; +#endif } void -- cgit v1.2.3