From 907b07d99b0bc35b2304dbe0621ebba52a1f26c7 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Mon, 11 Mar 2013 17:43:08 +0100 Subject: mpc83xx: Add MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 --- c/src/lib/libbsp/powerpc/gen83xx/configure.ac | 4 ++++ c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h | 14 ++++++++++---- c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c | 18 +++++++++++++----- 3 files changed, 27 insertions(+), 9 deletions(-) (limited to 'c/src/lib/libbsp/powerpc/gen83xx') diff --git a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac index 369899820e..7d623bf625 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/configure.ac +++ b/c/src/lib/libbsp/powerpc/gen83xx/configure.ac @@ -46,6 +46,10 @@ RTEMS_BSPOPTS_SET([MPC83XX_CHIP_TYPE],[hsc_cm01],[8349]) RTEMS_BSPOPTS_SET([MPC83XX_CHIP_TYPE],[*],[8313]) RTEMS_BSPOPTS_HELP([MPC83XX_CHIP_TYPE],[chip type of the MPC83XX family]) +RTEMS_BSPOPTS_SET([MPC83XX_HAS_NAND_LP_FLASH_ON_CS0],[br_uid],[1]) +RTEMS_BSPOPTS_SET([MPC83XX_HAS_NAND_LP_FLASH_ON_CS0],[*],[]) +RTEMS_BSPOPTS_HELP([MPC83XX_HAS_NAND_LP_FLASH_ON_CS0],[indicates if the board has a NAND large page flash on chip select 0]) + RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[mpc8349eamds],[9600]) RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[hsc_cm01],[9600]) RTEMS_BSPOPTS_SET([BSP_CONSOLE_BAUD],[*],[115200]) diff --git a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h index 49ababb672..056f90fd89 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h +++ b/c/src/lib/libbsp/powerpc/gen83xx/include/hwreg_vals.h @@ -23,6 +23,13 @@ #include #include + +#ifdef MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 + #define MPC83XX_RCWHR_BOOT_DEVICE (RCWHR_ROMLOC_LB08 | RCWHR_RLEXT_NAND) +#else + #define MPC83XX_RCWHR_BOOT_DEVICE (RCWHR_ROMLOC_LB16 | RCWHR_RLEXT_LGCY) +#endif + /* * distinguish board characteristics */ @@ -60,7 +67,7 @@ RCWHR_BMS_LOW | \ RCWHR_BOOTSEQ_NONE | \ RCWHR_SW_DIS | \ - RCWHR_ROMLOC_LB16 | \ + MPC83XX_RCWHR_BOOT_DEVICE | \ RCWHR_TSEC1M_GMII | \ RCWHR_TSEC2M_GMII | \ RCWHR_ENDIAN_BIG | \ @@ -99,7 +106,7 @@ RCWHR_BMS_LOW | \ RCWHR_BOOTSEQ_NONE | \ RCWHR_SW_DIS | \ - RCWHR_ROMLOC_LB16 | \ + MPC83XX_RCWHR_BOOT_DEVICE | \ RCWHR_TSEC1M_RGMII | \ RCWHR_TSEC2M_GMII | \ RCWHR_ENDIAN_BIG | \ @@ -142,8 +149,7 @@ RCWHR_BMS_LOW | \ RCWHR_BOOTSEQ_NONE | \ RCWHR_SW_DIS | \ - RCWHR_ROMLOC_LB16 | \ - RCWHR_RLEXT_LGCY | \ + MPC83XX_RCWHR_BOOT_DEVICE | \ RCWHR_ENDIAN_BIG) #elif defined( HAS_UBOOT) diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c index ab409ca7ed..01426bce20 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/cpuinit.c @@ -240,11 +240,19 @@ void cpu_init( void) (uint32_t) bsp_rom_start, (uint32_t) bsp_rom_size, #endif /* HAS_UBOOT */ - true, - false, - false, - false, - BPP_RX + #ifdef MPC83XX_HAS_NAND_LP_FLASH_ON_CS0 + false, + true, + false, + true, + BPP_RW + #else + true, + false, + false, + false, + BPP_RX + #endif ); SET_DBAT( 1, dbat.batu, dbat.batl); -- cgit v1.2.3