From 7f7b09ca2e79a4773e0189a44d5708dfb91772d2 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 18 Jan 2013 09:48:38 +0100 Subject: bsp/gen83xx: Disable caches in bsp_restart() --- .../libbsp/powerpc/gen83xx/startup/bsprestart.c | 24 +++++++++++++++++++++- 1 file changed, 23 insertions(+), 1 deletion(-) (limited to 'c/src/lib/libbsp/powerpc/gen83xx/startup/bsprestart.c') diff --git a/c/src/lib/libbsp/powerpc/gen83xx/startup/bsprestart.c b/c/src/lib/libbsp/powerpc/gen83xx/startup/bsprestart.c index c09547872c..4e27c4e6c0 100644 --- a/c/src/lib/libbsp/powerpc/gen83xx/startup/bsprestart.c +++ b/c/src/lib/libbsp/powerpc/gen83xx/startup/bsprestart.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2008-2012 embedded brains GmbH. All rights reserved. + * Copyright (c) 2008-2013 embedded brains GmbH. All rights reserved. * * embedded brains GmbH * Obere Lagerstr. 30 @@ -13,12 +13,34 @@ */ #include +#include + +#include void bsp_restart(void *addr) { rtems_interrupt_level level; void (*start)(void) = addr; + #ifdef HAS_UBOOT + const void *mem_begin = (const void *) bsp_uboot_board_info.bi_memstart; + size_t mem_size = bsp_uboot_board_info.bi_memsize; + #else /* HAS_UBOOT */ + const void *mem_begin = bsp_ram_start; + size_t mem_size = (size_t) bsp_ram_size; + #endif /* HAS_UBOOT */ + uint32_t hid0; rtems_interrupt_disable(level); + + hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + + if ((hid0 & HID0_DCE) != 0) { + rtems_cache_flush_multiple_data_lines(mem_begin, mem_size); + } + + hid0 &= ~(HID0_DCE | HID0_ICE); + + PPC_SET_SPECIAL_PURPOSE_REGISTER(HID0, hid0); + (*start)(); } -- cgit v1.2.3