From 6128a4aa5e791ed4e0a655bfd346a52d92da7883 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Wed, 21 Apr 2004 10:43:04 +0000 Subject: Remove stray white spaces. --- c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c | 72 +++--- c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c | 4 +- .../lib/libbsp/powerpc/eth_comm/console/console.c | 22 +- c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h | 4 +- c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h | 30 +-- c/src/lib/libbsp/powerpc/eth_comm/include/info.h | 2 +- c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c | 50 ++-- c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h | 30 +-- c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S | 66 ++--- c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c | 10 +- .../lib/libbsp/powerpc/eth_comm/network/network.c | 270 ++++++++++----------- c/src/lib/libbsp/powerpc/eth_comm/start/start.S | 20 +- .../lib/libbsp/powerpc/eth_comm/startup/bspstart.c | 24 +- .../lib/libbsp/powerpc/eth_comm/startup/cpuinit.c | 10 +- .../libbsp/powerpc/eth_comm/startup/mmutlbtab.c | 14 +- .../lib/libbsp/powerpc/eth_comm/vectors/vectors.S | 30 +-- .../lib/libbsp/powerpc/eth_comm/vectors/vectors.h | 8 +- .../libbsp/powerpc/eth_comm/vectors/vectors_init.c | 6 +- 18 files changed, 336 insertions(+), 336 deletions(-) (limited to 'c/src/lib/libbsp/powerpc/eth_comm') diff --git a/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c b/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c index 389836e389..e9cce22c8a 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/canbus/canbus.c @@ -56,7 +56,7 @@ canInterruptHandler (rtems_vector_number v) } tmpTail = rxMsgBufTail[dev]; while (1) { - if ((tmpTail == rxMsgBufHead[dev]) && + if ((tmpTail == rxMsgBufHead[dev]) && (rxMsgBuf[dev][tmpTail].ctrl1 & I82527_MSG_CTRL_NEWDAT)) { break; /* Buf is full */ } @@ -69,7 +69,7 @@ canInterruptHandler (rtems_vector_number v) rxMsgBuf[dev][tmpTail].ctrl1 = candev[dev]->msg15.ctrl1; rxMsgBuf[dev][tmpTail].arb = candev[dev]->msg15.arb; rxMsgBuf[dev][tmpTail].cfg = candev[dev]->msg15.cfg; - + pkt_len = (rxMsgBuf[dev][tmpTail].cfg >> 4) & 0xf; for (i=0; imsg15.data[i]; @@ -97,7 +97,7 @@ canInterruptHandler (rtems_vector_number v) candev[dev]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_INTPND_CLR); - candev[dev]->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | + candev[dev]->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | I82527_MSG_CTRL_RMTPND_CLR); candev[dev]->status = 0x0; } @@ -117,7 +117,7 @@ rtems_device_driver canbus_initialize( #endif rtems_status_code status; rtems_isr_entry old_handler; - + #if (NUM_CAN_DEVS > 0) candev[0]=&canbus0; rtems_interrupt_catch (canInterruptHandler, @@ -135,7 +135,7 @@ rtems_device_driver canbus_initialize( rtems_interrupt_catch (canInterruptHandler, PPC_IRQ_IRQ2, &old_handler); - + /* Right now, we only support 3 CAN interfaces */ #else #error NUM_CAN_DEVS is too big. Fix it, damnit! @@ -147,7 +147,7 @@ rtems_device_driver canbus_initialize( for (i=0; i < NUM_CAN_DEVS; i++) { - + /* clear rx buffers */ rxMsgBufHead[i] = 0; rxMsgBufTail[i] = 0; @@ -158,10 +158,10 @@ rtems_device_driver canbus_initialize( candev[i]->ctrl = I82527_CTRL_CCE | /* Enable cfg reg writes */ I82527_CTRL_INIT; /* Disable external xfers */ - + candev[i]->cir = I82527_CIR_DMC; /* Divide memory clock by 2 */ - + /* We want 250 kbps so assuming an input clock rate of 10 MHz: * DSC = 0 => SCLK = 10 MHz, tSCLK = 100ns * BRP = 1 => tq = 200ns @@ -181,7 +181,7 @@ rtems_device_driver canbus_initialize( candev[i]->gms = 0xffff; /* addresses must match exactly */ candev[i]->gml = 0xffffffff; /* addresses must match exactly */ - + candev[i]->mlm = 0x0; /* all addresses accepted */ candev[i]->p2conf = 0xff; /* make all outputs */ @@ -190,85 +190,85 @@ rtems_device_driver canbus_initialize( candev[i]->msg1.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg2.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg2.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg3.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg3.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg4.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg4.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR | /* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg5.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg5.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg6.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg6.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg7.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg7.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg8.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg8.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg9.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg9.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg10.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg10.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR | /* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg11.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg11.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg12.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg12.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg13.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg13.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg14.cfg = I82527_MSG_CFG_DIR ; /* dir is xmit */ candev[i]->msg14.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ I82527_MSG_CTRL_TXIE_CLR |/* no tx interrupts */ I82527_MSG_CTRL_RXIE_CLR |/* no rx interrupts */ - I82527_MSG_CTRL_INTPND_CLR; + I82527_MSG_CTRL_INTPND_CLR; candev[i]->msg15.cfg = 0 ; /* dir is rcv */ candev[i]->msg15.ctrl0 = I82527_MSG_CTRL_MSGVAL_CLR |/* this msg invalid */ @@ -306,7 +306,7 @@ rtems_device_driver canbus_open( /* msg is in use, rx interrupts are enabled */ candev[minor]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_RXIE_SET); - + candev[minor]->ctrl |= I82527_CTRL_IE; candev[minor]->ctrl &= ~(I82527_CTRL_CCE | I82527_CTRL_INIT); switch (minor) { @@ -329,10 +329,10 @@ rtems_device_driver canbus_close( candev[minor]->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_CLR | I82527_MSG_CTRL_RXIE_CLR | I82527_MSG_CTRL_TXIE_CLR); - + /* Take transceiver off the bus, enable cfg. reg. writes */ candev[minor]->ctrl |= (I82527_CTRL_CCE | I82527_CTRL_INIT); - + return RTEMS_SUCCESSFUL; } @@ -351,7 +351,7 @@ rtems_device_driver canbus_read( tmpHead = rxMsgBufHead[minor]; while (1){ - if ((tmpHead == rxMsgBufTail[minor]) && + if ((tmpHead == rxMsgBufTail[minor]) && !(rxMsgBuf[minor][tmpHead].ctrl1 & I82527_MSG_CTRL_NEWDAT)) { break; } @@ -361,7 +361,7 @@ rtems_device_driver canbus_read( msg->ctrl1 = rxMsgBuf[minor][tmpHead].ctrl1; msg->arb = rxMsgBuf[minor][tmpHead].arb; msg->cfg = rxMsgBuf[minor][tmpHead].cfg; - + pkt_len = (msg->cfg >> 4) & 0xf; for (i=0; idata[i] = rxMsgBuf[minor][tmpHead].data[i]; @@ -390,7 +390,7 @@ rtems_device_driver canbus_read( return RTEMS_UNSATISFIED; } - + rtems_device_driver canbus_write( rtems_device_major_number major, rtems_device_minor_number minor, @@ -436,7 +436,7 @@ rtems_device_driver canbus_control( /* part of old canbus_read */ -#if 0 +#if 0 for (i=0; i < RX_CAN_BUF_SIZE) { if (rxMsgBuf[minor][i].ctrl1 & I82527_MSG_CTRL_NEWDAT) break; @@ -447,17 +447,17 @@ rtems_device_driver canbus_control( int j; msg.arb = rxMsgBuf[minor][i].arb; msg.cfg = rxMsgBuf[minor][i].cfg; - + pkt_len = (msg.cfg >> 4) & 0xf; - for (j=0; j < pkt_len; j++) + for (j=0; j < pkt_len; j++) msg.data[j] = rxMsgBuf[minor][i].data[j]; - - + + /* wait until there is a msg */ while (!(candev->msg15.ctrl1 & I82527_MSG_CTRL_NEWDAT)) continue; - + msg->ctrl1 = candev->msg15.ctrl1; msg->cfg = candev->msg15.cfg; msg->arb = candev->msg15.arb; @@ -468,7 +468,7 @@ rtems_device_driver canbus_control( candev->msg15.ctrl0 = 0xff & (I82527_MSG_CTRL_MSGVAL_SET | I82527_MSG_CTRL_INTPND_CLR); - candev->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | + candev->msg15.ctrl1 = 0xff & (I82527_MSG_CTRL_NEWDAT_CLR | I82527_MSG_CTRL_RMTPND_CLR); candev->status = 0x0; diff --git a/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c b/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c index 4a79f81864..b4bf7ca93e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/clock/p_clock.c @@ -28,7 +28,7 @@ static rtems_irq_connect_data clockIrqData = {BSP_PERIODIC_TIMER, (rtems_irq_enable)clockOn, (rtems_irq_disable)clockOff, (rtems_irq_is_enabled)clockIsOn}; - + int BSP_get_clock_irq_level() { /* @@ -65,6 +65,6 @@ int BSP_connect_clock_handler (rtems_irq_hdl hdl) clockIrqData.on = (rtems_irq_enable)clockOn; clockIrqData.off = (rtems_irq_enable)clockOff; clockIrqData.isOn = (rtems_irq_is_enabled)clockIsOn; - + return BSP_install_rtems_irq_handler (&clockIrqData); } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/console/console.c b/c/src/lib/libbsp/powerpc/eth_comm/console/console.c index 411e279ef2..d9d98c5a91 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/console/console.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/console/console.c @@ -1,10 +1,10 @@ -#define I_WANT_TERMIOS +#define I_WANT_TERMIOS /* * BSP specific Serial I/O Functions for the eth-comm BSP * - * This file contains the BSP specific functions for + * This file contains the BSP specific functions for * performing serial I/O. These are the functions - * RTEMS uses (the 6 listed in the device driver + * RTEMS uses (the 6 listed in the device driver * structure) * * The SCCs and SMCs are assigned as follows @@ -21,7 +21,7 @@ * appear to work correctly yet. On startup, with termios enabled, * the board hangs for a few seconds before running correctly * - * Author: Jay Monkman (jmonkman@frasca.com) + * Author: Jay Monkman (jmonkman@frasca.com) * Copyright (C) 1998 by Frasca International, Inc. * * $Id$ @@ -42,7 +42,7 @@ rtems_device_driver console_initialize(rtems_device_major_number major, void *arg) { rtems_status_code status; - + #ifdef I_WANT_TERMIOS /* * Set up TERMIOS (for /dev/console) @@ -59,11 +59,11 @@ rtems_device_driver console_initialize(rtems_device_major_number major, * Do device-specific initialization */ m8xx_uart_smc_initialize(SMC1_MINOR); /* /dev/tty0 */ - m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ + m8xx_uart_smc_initialize(SMC2_MINOR); /* /dev/tty1 */ m8xx_uart_scc_initialize(SCC2_MINOR); /* /dev/tty2 */ m8xx_uart_scc_initialize(SCC3_MINOR); /* /dev/tty3 */ m8xx_uart_scc_initialize(SCC4_MINOR); /* /dev/tty4 */ - + /* * Register the devices */ @@ -84,7 +84,7 @@ rtems_device_driver console_initialize(rtems_device_major_number major, rtems_fatal_error_occurred (status); return RTEMS_SUCCESSFUL; } - + rtems_device_driver console_open(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) @@ -116,7 +116,7 @@ rtems_device_driver console_open(rtems_device_major_number major, case 2: sccregs = &m8xx.scc1; break; - case 3: + case 3: sccregs = &m8xx.scc2; break; case 4: @@ -136,7 +136,7 @@ rtems_device_driver console_open(rtems_device_major_number major, if (minor == SCC2_MINOR) { return rtems_termios_open (major, minor, arg, &sccPollCallbacks); } - else { + else { return RTEMS_SUCCESSFUL; } #else @@ -207,7 +207,7 @@ rtems_device_driver console_write(rtems_device_major_number major, rtems_device_driver console_control(rtems_device_major_number major, rtems_device_minor_number minor, void *arg) -{ +{ #ifdef I_WANT_TERMIOS if (minor == SCC2_MINOR) { return rtems_termios_ioctl (arg); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h b/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h index 1a8f6b76f4..8c7f2e07fd 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/bsp.h @@ -40,7 +40,7 @@ extern "C" { /* #define CONFIGURE_NUMBER_OF_TERMIOS_PORTS 2 */ #define CONFIGURE_INTERRUPT_STACK_MEMORY (4 * 1024) - + /* * Network driver configuration */ @@ -98,7 +98,7 @@ extern rtems_configuration_table BSP_Configuration; /* * NOTE: Use the standard Console driver entry */ - + /* * NOTE: Use the standard Clock driver entry */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h b/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h index 6b07b823dd..e32d3c6338 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/canbus.h @@ -11,7 +11,7 @@ * found in the file LICENSE in this distribution or at * http://www.rtems.com/license/LICENSE. * - * $Id: + * $Id: */ #ifndef __CANBUS_H_ @@ -102,8 +102,8 @@ typedef struct i82527_t_ { #define I82527_DCR0 (1) #define I82527_BTR1_SPL (1<<7) #define I82527_MSG_CTRL_MSGVAL (2<<6) -#define I82527_MSG_CTRL_MSGVAL_NC (3<<6) -#define I82527_MSG_CTRL_MSGVAL_SET (2<<6) +#define I82527_MSG_CTRL_MSGVAL_NC (3<<6) +#define I82527_MSG_CTRL_MSGVAL_SET (2<<6) #define I82527_MSG_CTRL_MSGVAL_CLR (1<<6) #define I82527_MSG_CTRL_TXIE (2<<4) #define I82527_MSG_CTRL_TXIE_NC (3<<4) @@ -145,23 +145,23 @@ extern i82527_t canbus1; extern i82527_t canbus2; -rtems_device_driver canbus_initialize(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_initialize(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_open(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_open(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_close(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_close(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_read(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_read(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_write(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_write(rtems_device_major_number, + rtems_device_minor_number, void *); -rtems_device_driver canbus_control(rtems_device_major_number, - rtems_device_minor_number, +rtems_device_driver canbus_control(rtems_device_major_number, + rtems_device_minor_number, void *); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/include/info.h b/c/src/lib/libbsp/powerpc/eth_comm/include/info.h index 305a1d1429..d205fed121 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/include/info.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/include/info.h @@ -25,7 +25,7 @@ typedef struct BoardInfoBlock_ { uint8_t fpn[16]; /* Frasca part number in ASCII */ uint16_t rev; /* Board revision */ uint32_t ip_num; /* Board IP number */ - + } boardinfo_t; #define IFACE_ARINC429_TX0 0x00000001; diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c index d5f7ff1655..fe4b7fa418 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.c @@ -10,7 +10,7 @@ * * $Id$ */ - + #include #include #include @@ -65,9 +65,9 @@ static inline int is_processor_irq(const rtems_irq_symbolic_name irqLine) /* - * masks used to mask off the interrupts. For exmaple, for ILVL2, the - * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 - * and ILVL7. + * masks used to mask off the interrupts. For exmaple, for ILVL2, the + * mask is used to mask off interrupts ILVL2, IRQ3, ILVL3, ... IRQ7 + * and ILVL7. * */ const static unsigned int SIU_IvectMask[BSP_SIU_IRQ_NUMBER] = @@ -131,10 +131,10 @@ int BSP_irq_enable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 1; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_irq_index); @@ -144,10 +144,10 @@ int BSP_irq_disable_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) { int cpm_irq_index; - + if (!is_cpm_irq(irqLine)) return 0; - + cpm_irq_index = ((int) (irqLine) - BSP_CPM_IRQ_LOWEST_OFFSET); return (((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr & (1 << cpm_irq_index)); } @@ -155,7 +155,7 @@ int BSP_irq_enabled_at_cpm(const rtems_irq_symbolic_name irqLine) int BSP_irq_enable_at_siu(const rtems_irq_symbolic_name irqLine) { int siu_irq_index; - + if (!is_siu_irq(irqLine)) return 1; @@ -172,7 +172,7 @@ int BSP_irq_disable_at_siu(const rtems_irq_symbolic_name irqLine) if (!is_siu_irq(irqLine)) return 1; - + siu_irq_index = ((int) (irqLine) - BSP_SIU_IRQ_LOWEST_OFFSET); ppc_cached_irq_mask &= ~(1 << (31-siu_irq_index)); ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; @@ -198,7 +198,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine) int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -219,14 +219,14 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * store the data provided by user */ rtems_hdl_tbl[irq->name] = *irq; - + if (is_cpm_irq(irq->name)) { /* * Enable interrupt at PIC level */ BSP_irq_enable_at_cpm (irq->name); } - + if (is_siu_irq(irq->name)) { /* * Enable interrupt at SIU level @@ -244,7 +244,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -263,7 +263,7 @@ int BSP_get_current_rtems_irq_handler (rtems_irq_connect_data* irq) int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { unsigned int level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -295,7 +295,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) /* * disable exception at processor level */ - } + } /* * Disable interrupt on device @@ -411,7 +411,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[BSP_DECREMENTER].hdl(); _CPU_MSR_SET(msr); @@ -422,12 +422,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) */ #ifdef DISPATCH_HANDLER_STAT loopCounter = 0; -#endif +#endif while (1) { if ((ppc_cached_irq_mask & ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend) == 0) { #ifdef DISPATCH_HANDLER_STAT if (loopCounter > maxLoop) maxLoop = loopCounter; -#endif +#endif break; } irq = (((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26); @@ -442,12 +442,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) * Acknowledge current interrupt. This has no effect on internal level interrupt. */ ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = (1 << (31 - irq)); - + if (cpmIntr) { /* * We will reenable the SIU CPM interrupt to allow nesting of CPM interrupt. * We must before acknowledege the current irq at CPM level to avoid trigerring - * the interrupt again. + * the interrupt again. */ /* * Acknowledge and get the vector. @@ -467,7 +467,7 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) _CPU_MSR_GET(msr); new_msr = msr | MSR_EE; _CPU_MSR_SET(new_msr); - + rtems_hdl_tbl[irq].hdl(); _CPU_MSR_SET(msr); @@ -480,12 +480,12 @@ void C_dispatch_irq_handler (CPU_Interrupt_frame *frame, unsigned int excNum) ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = ppc_cached_irq_mask; #ifdef DISPATCH_HANDLER_STAT ++ loopCounter; -#endif +#endif } } - - + + void _ThreadProcessSignalsFromIrq (BSP_Exception_frame* ctx) { /* diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h index 6b30b759e9..635ee42fb8 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq.h @@ -69,7 +69,7 @@ typedef enum { * Some SIU IRQ symbolic name definition. Please note that * INT IRQ are defined but a single one will be used to * redirect all CPM interrupt. - */ + */ BSP_SIU_EXT_IRQ_0 = 0, BSP_SIU_INT_IRQ_0 = 1, @@ -78,19 +78,19 @@ typedef enum { BSP_SIU_EXT_IRQ_2 = 4, BSP_SIU_INT_IRQ_2 = 5, - + BSP_SIU_EXT_IRQ_3 = 6, BSP_SIU_INT_IRQ_3 = 7, - + BSP_SIU_EXT_IRQ_4 = 8, BSP_SIU_INT_IRQ_4 = 9, BSP_SIU_EXT_IRQ_5 = 10, BSP_SIU_INT_IRQ_5 = 11, - + BSP_SIU_EXT_IRQ_6 = 12, BSP_SIU_INT_IRQ_6 = 13, - + BSP_SIU_EXT_IRQ_7 = 14, BSP_SIU_INT_IRQ_7 = 15, /* @@ -110,18 +110,18 @@ typedef enum { BSP_CPM_IRQ_SPI = BSP_CPM_IRQ_LOWEST_OFFSET + 5, BSP_CPM_IRQ_PARALLEL_IO_PC6 = BSP_CPM_IRQ_LOWEST_OFFSET + 6, BSP_CPM_IRQ_TIMER_4 = BSP_CPM_IRQ_LOWEST_OFFSET + 7, - + BSP_CPM_IRQ_PARALLEL_IO_PC7 = BSP_CPM_IRQ_LOWEST_OFFSET + 9, BSP_CPM_IRQ_PARALLEL_IO_PC8 = BSP_CPM_IRQ_LOWEST_OFFSET + 10, BSP_CPM_IRQ_PARALLEL_IO_PC9 = BSP_CPM_IRQ_LOWEST_OFFSET + 11, BSP_CPM_IRQ_TIMER_3 = BSP_CPM_IRQ_LOWEST_OFFSET + 12, - + BSP_CPM_IRQ_PARALLEL_IO_PC10 = BSP_CPM_IRQ_LOWEST_OFFSET + 14, BSP_CPM_IRQ_PARALLEL_IO_PC11 = BSP_CPM_IRQ_LOWEST_OFFSET + 15, BSP_CPM_I2C = BSP_CPM_IRQ_LOWEST_OFFSET + 16, BSP_CPM_RISC_TIMER_TABLE = BSP_CPM_IRQ_LOWEST_OFFSET + 17, BSP_CPM_IRQ_TIMER_2 = BSP_CPM_IRQ_LOWEST_OFFSET + 18, - + BSP_CPM_IDMA2 = BSP_CPM_IRQ_LOWEST_OFFSET + 20, BSP_CPM_IDMA1 = BSP_CPM_IRQ_LOWEST_OFFSET + 21, BSP_CPM_SDMA_CHANNEL_BUS_ERR = BSP_CPM_IRQ_LOWEST_OFFSET + 22, @@ -138,10 +138,10 @@ typedef enum { * Some Processor exception handled as rtems IRQ symbolic name definition */ BSP_DECREMENTER = BSP_PROCESSOR_IRQ_LOWEST_OFFSET - + }rtems_irq_symbolic_name; -#define CPM_INTERRUPT +#define CPM_INTERRUPT /* @@ -171,9 +171,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at SIU and CPM level. RATIONALE : anyway @@ -209,7 +209,7 @@ typedef struct { rtems_irq_symbolic_name irqBase; /* * software priorities associated with interrupts. - * if irqPrio [i] > intrPrio [j] it means that + * if irqPrio [i] > intrPrio [j] it means that * interrupt handler hdl connected for interrupt name i * will not be interrupted by the handler connected for interrupt j * The interrupt source will be physically masked at i8259 level. @@ -285,7 +285,7 @@ int BSP_irq_enabled_at_siu (const rtems_irq_symbolic_name irqLine); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); /* @@ -328,7 +328,7 @@ int BSP_rtems_irq_mngt_set(rtems_irq_global_settings* config); * (Re) get info on current RTEMS interrupt management. */ int BSP_rtems_irq_mngt_get(rtems_irq_global_settings**); - + extern void BSP_rtems_irq_mng_init(unsigned cpuId); #ifdef __cplusplus diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S index 095e75aa51..38c7d2283d 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_asm.S @@ -1,5 +1,5 @@ /* - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * IRQ veneers for RTEMS. * * The license and distribution terms for this file may be @@ -15,22 +15,22 @@ * * $Id$ */ - + #include #include #include #include - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(decrementer_exception_vector_prolog_code) - + SYM (decrementer_exception_vector_prolog_code): /* * let room for exception frame @@ -41,11 +41,11 @@ SYM (decrementer_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (decrementer_exception_vector_prolog_code_size) - + decrementer_exception_vector_prolog_code_size = . - decrementer_exception_vector_prolog_code PUBLIC_VAR(external_exception_vector_prolog_code) - + SYM (external_exception_vector_prolog_code): /* * let room for exception frame @@ -56,12 +56,12 @@ SYM (external_exception_vector_prolog_code): ba shared_raw_irq_code_entry PUBLIC_VAR (external_exception_vector_prolog_code_size) - + external_exception_vector_prolog_code_size = . - external_exception_vector_prolog_code PUBLIC_VAR(shared_raw_irq_code_entry) PUBLIC_VAR(C_dispatch_irq_handler) - + .p2align 5 SYM (shared_raw_irq_code_entry): /* @@ -72,17 +72,17 @@ SYM (shared_raw_irq_code_entry): * R4 : vector number */ /* - * Save SRR0/SRR1 As soon As possible as it is the minimal needed + * Save SRR0/SRR1 As soon As possible as it is the minimal needed * to reenable exception processing */ stw r0, GPR0_OFFSET(r1) stw r2, GPR2_OFFSET(r1) stw r3, GPR3_OFFSET(r1) - + mfsrr0 r0 mfsrr1 r2 mfmsr r3 - + stw r0, SRR0_FRAME_OFFSET(r1) stw r2, SRR1_FRAME_OFFSET(r1) /* @@ -119,7 +119,7 @@ SYM (shared_raw_irq_code_entry): mfctr r6 mfxer r7 mflr r8 - + stw r5, EXC_CR_OFFSET(r1) stw r6, EXC_CTR_OFFSET(r1) stw r7, EXC_XER_OFFSET(r1) @@ -157,9 +157,9 @@ SYM (shared_raw_irq_code_entry): cmpwi r2,0 bne nested mfspr r1, SPRG1 - -nested: - /* + +nested: + /* * Start Incrementing nesting level in R2 */ addi r2,r2,1 @@ -176,7 +176,7 @@ nested: /* store new nesting level in _ISR_Nest_level */ stw r2, _ISR_Nest_level@l(r7) #endif - + addi r6, r6, 1 mfmsr r5 /* @@ -186,7 +186,7 @@ nested: /* * We are now running on the interrupt stack. External and decrementer * exceptions are still disabled. I see no purpose trying to optimize - * further assembler code. + * further assembler code. */ /* * Call C exception handler for decrementer Interrupt frame is passed just @@ -195,7 +195,7 @@ nested: addi r3, r14, 0x8 bl C_dispatch_irq_handler /* C_dispatch_irq_handler(cpu_interrupt_frame* r3, vector r4) */ /* - * start decrementing nesting level. Note : do not test result against 0 + * start decrementing nesting level. Note : do not test result against 0 * value as an easy exit condition because if interrupt nesting level > 1 * then _Thread_Dispatch_disable_level > 1 */ @@ -219,7 +219,7 @@ nested: stw r3,_Thread_Dispatch_disable_level@l(r15) /* End decrementing _Thread_Dispatch_disable_level */ cmpwi r3, 0 /* - * switch back to original stack (done here just optimize registers + * switch back to original stack (done here just optimize registers * contention. Could have been done before...) */ addi r1, r14, 0 @@ -227,14 +227,14 @@ nested: /* * Here we are running again on the thread system stack. * We have interrupt nesting level = _Thread_Dispatch_disable_level = 0. - * Interrupt are still disabled. Time to check if scheduler request to + * Interrupt are still disabled. Time to check if scheduler request to * do something with the current thread... */ addis r4, 0, _Context_Switch_necessary@ha lwz r5, _Context_Switch_necessary@l(r4) cmpwi r5, 0 bne switch - + addis r6, 0, _ISR_Signals_to_thread_executing@ha lwz r7, _ISR_Signals_to_thread_executing@l(r6) cmpwi r7, 0 @@ -266,12 +266,12 @@ nested: lwz r30, EXC_XER_OFFSET(r1) lwz r29, EXC_CR_OFFSET(r1) lwz r28, EXC_LR_OFFSET(r1) - + mtctr r31 mtxer r30 mtcr r29 mtlr r28 - + lmw r4, GPR4_OFFSET(r1) lwz r2, GPR2_OFFSET(r1) lwz r0, GPR0_OFFSET(r1) @@ -286,21 +286,21 @@ nested: /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC rfi - + switch: bl SYM (_Thread_Dispatch) - -easy_exit: + +easy_exit: /* * start restoring interrupt frame */ @@ -308,7 +308,7 @@ easy_exit: lwz r4, EXC_XER_OFFSET(r1) lwz r5, EXC_CR_OFFSET(r1) lwz r6, EXC_LR_OFFSET(r1) - + mtctr r3 mtxer r4 mtcr r5 @@ -337,7 +337,7 @@ easy_exit: /* * Restore rfi related settings */ - + lwz r4, SRR1_FRAME_OFFSET(r1) lwz r2, SRR0_FRAME_OFFSET(r1) lwz r3, GPR3_OFFSET(r1) diff --git a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c index 9ff513766e..53a8fb8975 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/irq/irq_init.c @@ -79,7 +79,7 @@ void BSP_SIU_irq_init() ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel = ((volatile immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel; } -/* +/* * Initialize CPM interrupt management */ void @@ -93,7 +93,7 @@ BSP_CPM_irq_init(void) (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | #else (CICR_SCB_SCC2 | CICR_SCA_SCC1) | -#endif +#endif ((BSP_CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; @@ -104,7 +104,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) { rtems_raw_except_connect_data vectorDesc; int i; - + BSP_SIU_irq_init(); BSP_CPM_irq_init(); /* @@ -132,7 +132,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) */ BSP_panic("Unable to initialize RTEMS interrupt Management!!! System locked\n"); } - + /* * We must connect the raw irq handler for the two * expected interrupt sources : decrementer and external interrupts. @@ -154,7 +154,7 @@ void BSP_rtems_irq_mng_init(unsigned cpuId) if (!mpc8xx_set_exception (&vectorDesc)) { BSP_panic("Unable to initialize RTEMS external raw exception\n"); } -#ifdef TRACE_IRQ_INIT +#ifdef TRACE_IRQ_INIT printk("RTEMS IRQ management is now operationnal\n"); #endif } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/network/network.c b/c/src/lib/libbsp/powerpc/eth_comm/network/network.c index 5a280e4eae..4ed7a0daa1 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/network/network.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/network/network.c @@ -142,9 +142,9 @@ static void m860_scc1_interrupt_handler () */ if ((m8xx.scc1.sccm & 0x8) && (m8xx.scc1.scce & 0x8)) { m8xx.scc1.scce = 0x8; - /* I don't think the next line is needed. It was in + /* I don't think the next line is needed. It was in * the 68360 stuff, though. - * m8xx.scc1.sccm &= ~0x8; + * m8xx.scc1.sccm &= ~0x8; */ enet_driver[0].rxInterrupts++; rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); @@ -155,9 +155,9 @@ static void m860_scc1_interrupt_handler () */ if ((m8xx.scc1.sccm & 0x12) && (m8xx.scc1.scce & 0x12)) { m8xx.scc1.scce = 0x12; - /* I don't think the next line is needed. It was in + /* I don't think the next line is needed. It was in * the 68360 stuff, though. - * m8xx.scc1.sccm &= ~0x12; + * m8xx.scc1.sccm &= ~0x12; */ enet_driver[0].txInterrupts++; rtems_event_send (enet_driver[0].txDaemonTid, INTERRUPT_EVENT); @@ -177,7 +177,7 @@ static void m860_fec_interrupt_handler () enet_driver[0].rxInterrupts++; rtems_event_send (enet_driver[0].rxDaemonTid, INTERRUPT_EVENT); } - + /* * Buffer transmitted or transmitter error? */ @@ -203,17 +203,17 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) { int i; unsigned char *hwaddr; - + /* * Configure port A CLK1, CLK2, TXD1 and RXD1 pins */ m8xx.papar |= 0x303; m8xx.padir &= ~0x303; m8xx.paodr &= ~0x303; - + /* * Configure port C CTS1* and CD1* pins, and PC4-PC7 - * + * */ m8xx.pcpar &= ~0x30; m8xx.pcdir |= 0x0f00; @@ -221,28 +221,28 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.pcso |= 0x30; m8xx.pcdat &= ~0x0f00; /* Clear LOOP */ m8xx.pcdat |= 0x0700; /* Set FULDL, TPSQEL, TPAPCE */ - + /* * Connect CLK1 and CLK2 to SCC1 */ m8xx.sicr &= ~0xFF; m8xx.sicr |= (5 << 3) | 4; - + /* * Initialize SDMA configuration register */ m8xx.sdcr = 1; - + /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers",0); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -250,46 +250,46 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.scc1p.rbase = (char *)sc->rxBdBase - (char *)&m8xx; m8xx.scc1p.tbase = (char *)sc->txBdBase - (char *)&m8xx; - + /* * Send "Init parameters" command */ m8xx_cp_execute_cmd (M8xx_CR_OP_INIT_RX_TX | M8xx_CR_CHAN_SCC1); - + /* * Set receive and transmit function codes */ m8xx.scc1p.rfcr = M8xx_RFCR_MOT | M8xx_RFCR_DMA_SPACE(0); m8xx.scc1p.tfcr = M8xx_TFCR_MOT | M8xx_TFCR_DMA_SPACE(0); - + /* * Set maximum receive buffer length */ m8xx.scc1p.mrblr = RBUF_SIZE; - + /* * Set CRC parameters */ m8xx.scc1p.un.ethernet.c_pres = 0xFFFFFFFF; m8xx.scc1p.un.ethernet.c_mask = 0xDEBB20E3; - + /* * Clear diagnostic counters */ m8xx.scc1p.un.ethernet.crcec = 0; m8xx.scc1p.un.ethernet.alec = 0; m8xx.scc1p.un.ethernet.disfc = 0; - + /* * Set pad value */ m8xx.scc1p.un.ethernet.pads = 0x8888; - + /* * Set retry limit */ m8xx.scc1p.un.ethernet.ret_lim = 15; - + /* * Set maximum and minimum frame length */ @@ -297,7 +297,7 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.minflr = 64; m8xx.scc1p.un.ethernet.maxd1 = RBUF_SIZE; m8xx.scc1p.un.ethernet.maxd2 = RBUF_SIZE; - + /* * Clear group address hash table */ @@ -305,21 +305,21 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.gaddr2 = 0; m8xx.scc1p.un.ethernet.gaddr3 = 0; m8xx.scc1p.un.ethernet.gaddr4 = 0; - + /* * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.scc1p.un.ethernet.paddr_h = (hwaddr[5] << 8) | hwaddr[4]; m8xx.scc1p.un.ethernet.paddr_m = (hwaddr[3] << 8) | hwaddr[2]; m8xx.scc1p.un.ethernet.paddr_l = (hwaddr[1] << 8) | hwaddr[0]; - + /* * Aggressive retry */ m8xx.scc1p.un.ethernet.p_per = 0; - + /* * Clear individual address hash table */ @@ -327,14 +327,14 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) m8xx.scc1p.un.ethernet.iaddr2 = 0; m8xx.scc1p.un.ethernet.iaddr3 = 0; m8xx.scc1p.un.ethernet.iaddr4 = 0; - + /* * Clear temp address */ m8xx.scc1p.un.ethernet.taddr_l = 0; m8xx.scc1p.un.ethernet.taddr_m = 0; m8xx.scc1p.un.ethernet.taddr_h = 0; - + /* * Set up receive buffer descriptors */ @@ -351,12 +351,12 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - + /* * Clear any outstanding events */ m8xx.scc1.scce = 0xFFFF; - + /* * Set up interrupts */ @@ -364,20 +364,20 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) rtems_panic ("Can't attach M8xx SCC1 interrupt handler\n",0); } m8xx.scc1.sccm = 0; /* No interrupts unmasked till necessary */ - + /* * Set up General SCC Mode Register * Ethernet configuration */ m8xx.scc1.gsmr_h = 0x0; m8xx.scc1.gsmr_l = 0x1088000c; - + /* * Set up data synchronization register * Ethernet synchronization pattern */ m8xx.scc1.dsr = 0xd555; - + /* * Set up protocol-specific mode register * No Heartbeat check @@ -395,13 +395,13 @@ m860_scc_initialize_hardware (struct m860_enet_struct *sc) * Disable full-duplex operation */ m8xx.scc1.psmr = 0x080A | (sc->acceptBroadcast ? 0 : 0x100); - + /* * Enable the TENA (RTS1*) pin */ m8xx.pcpar |= 0x1; m8xx.pcdir &= ~0x1; - + /* * Enable receiver and transmitter */ @@ -433,7 +433,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) */ m8xx.fec.ecntrl=0x1; - /* + /* * Put ethernet transciever in reset */ m8xx.pgcra |= 0x80; @@ -452,10 +452,10 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Set SIU interrupt level to LVL2 - * + * */ m8xx.fec.ivec = ((((unsigned) BSP_FAST_ETHERNET_CTRL)/2) << 29); - + /* * Set the TX and RX fifo sizes. For now, we'll split it evenly */ @@ -468,7 +468,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) * Set our physical address */ hwaddr = sc->arpcom.ac_enaddr; - + m8xx.fec.addr_low = (hwaddr[0] << 24) | (hwaddr[1] << 16) | (hwaddr[2] << 8) | (hwaddr[3] << 0); m8xx.fec.addr_high = (hwaddr[4] << 24) | (hwaddr[5] << 16); @@ -487,13 +487,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) /* * Allocate mbuf pointers */ - sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, + sc->rxMbuf = malloc (sc->rxBdCount * sizeof *sc->rxMbuf, M_MBUF, M_NOWAIT); - sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, + sc->txMbuf = malloc (sc->txBdCount * sizeof *sc->txMbuf, M_MBUF, M_NOWAIT); if (!sc->rxMbuf || !sc->txMbuf) rtems_panic ("No memory for mbuf pointers",0); - + /* * Set receiver and transmitter buffer descriptor bases */ @@ -501,7 +501,7 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) sc->txBdBase = m8xx_bd_allocate(sc->txBdCount); m8xx.fec.r_des_start = (int)sc->rxBdBase; m8xx.fec.x_des_start = (int)sc->txBdBase; - + /* * Set up Receive Control Register: * Not promiscuous mode @@ -535,17 +535,17 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) m8xx.sdcr = 1; /* - * Set MII speed to 2.5 MHz for 25 Mhz system clock + * Set MII speed to 2.5 MHz for 25 Mhz system clock */ m8xx.fec.mii_speed = 0x0a; m8xx.fec.mii_data = 0x58021000; - + /* * Set up receive buffer descriptors */ for (i = 0 ; i < sc->rxBdCount ; i++) (sc->rxBdBase + i)->status = 0; - + /* * Set up transmit buffer descriptors */ @@ -555,13 +555,13 @@ m860_fec_initialize_hardware (struct m860_enet_struct *sc) } sc->txBdHead = sc->txBdTail = 0; sc->txBdActiveCount = 0; - - + + /* * Mask all FEC interrupts and clear events */ - m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | + m8xx.fec.imask = M8xx_FEC_IEVENT_TFINT | M8xx_FEC_IEVENT_RFINT; m8xx.fec.ievent = ~0; @@ -589,7 +589,7 @@ m860Enet_retire_tx_bd (struct m860_enet_struct *sc) int i; int nRetired; struct mbuf *m, *n; - + i = sc->txBdTail; nRetired = 0; while ((sc->txBdActiveCount != 0) @@ -615,7 +615,7 @@ m860Enet_retire_tx_bd (struct m860_enet_struct *sc) enet_driver[0].txRetryLimit++; if (status & M8xx_BD_UNDERRUN) enet_driver[0].txUnderrun++; - + /* * Restart the transmitter */ @@ -661,7 +661,7 @@ scc_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -678,14 +678,14 @@ scc_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -694,7 +694,7 @@ scc_rxDaemon (void *arg) * Clear old events */ m8xx.scc1.scce = 0x8; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -704,19 +704,19 @@ scc_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.scc1.sccm |= 0x8; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -735,7 +735,7 @@ scc_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -743,7 +743,7 @@ scc_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -774,13 +774,13 @@ scc_rxDaemon (void *arg) if (status & M8xx_BD_COLLISION) sc->rxCollision++; } - + /* * Reenable the buffer descriptor */ rxBd->status = (status & (M8xx_BD_WRAP | M8xx_BD_INTERRUPT)) | M8xx_BD_EMPTY; - + /* * Move to next buffer descriptor */ @@ -798,7 +798,7 @@ fec_rxDaemon (void *arg) uint16_t status; m8xxBufferDescriptor_t *rxBd; int rxBdIndex; - + /* * Allocate space for incoming packets and start reception */ @@ -816,14 +816,14 @@ fec_rxDaemon (void *arg) break; } } - + /* * Input packet handling loop */ rxBdIndex = 0; for (;;) { rxBd = sc->rxBdBase + rxBdIndex; - + /* * Wait for packet if there's not one ready */ @@ -832,7 +832,7 @@ fec_rxDaemon (void *arg) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_RFINT; - + /* * Wait for packet * Note that the buffer descriptor is checked @@ -842,19 +842,19 @@ fec_rxDaemon (void *arg) */ while ((status = rxBd->status) & M8xx_BD_EMPTY) { rtems_event_set events; - + /* * Unmask RXF (Full frame received) event */ m8xx.fec.ievent |= M8xx_FEC_IEVENT_RFINT; - + rtems_bsdnet_event_receive (INTERRUPT_EVENT, RTEMS_WAIT|RTEMS_EVENT_ANY, RTEMS_NO_TIMEOUT, &events); } } - + /* * Check that packet is valid */ @@ -864,7 +864,7 @@ fec_rxDaemon (void *arg) * FIXME: Packet filtering hook could be done here. */ struct ether_header *eh; - + m = sc->rxMbuf[rxBdIndex]; m->m_len = m->m_pkthdr.len = rxBd->length - sizeof(uint32_t) - @@ -872,7 +872,7 @@ fec_rxDaemon (void *arg) eh = mtod (m, struct ether_header *); m->m_data += sizeof(struct ether_header); ether_input (ifp, eh, m); - + /* * Allocate a new mbuf */ @@ -923,12 +923,12 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) struct mbuf *l = NULL; uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m860Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -947,7 +947,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.scc1.scce = 0x12; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -963,7 +963,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -976,13 +976,13 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1016,7 +1016,7 @@ scc_sendpacket (struct ifnet *ifp, struct mbuf *m) if (l != NULL) l->m_next = m; } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1043,12 +1043,12 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) /* struct mbuf *l = NULL; */ uint16_t status; int nAdded; - + /* * Free up buffer descriptors */ m860Enet_retire_tx_bd (sc); - + /* * Set up the transmit buffer descriptors. * No need to pad out short packets since the @@ -1067,7 +1067,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) * Clear old events */ m8xx.fec.ievent = M8xx_FEC_IEVENT_TFINT; - + /* * Wait for buffer descriptor to become available. * Note that the buffer descriptors are checked @@ -1083,7 +1083,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); while ((sc->txBdActiveCount + nAdded) == sc->txBdCount) { rtems_event_set events; - + /* * Unmask TXB (buffer transmitted) and * TXE (transmitter error) events. @@ -1096,13 +1096,13 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) m860Enet_retire_tx_bd (sc); } } - + /* * Don't set the READY flag till the * whole packet has been readied. */ status = nAdded ? M8xx_BD_READY : 0; - + /* * FIXME: Why not deal with empty mbufs at at higher level? * The IP fragmentation routine in ip_output @@ -1138,7 +1138,7 @@ fec_sendpacket (struct ifnet *ifp, struct mbuf *m) l->m_next = m; */ } - + /* * Set the transmit buffer status. * Break out of the loop if this mbuf is the last in the frame. @@ -1168,13 +1168,13 @@ scc_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, RTEMS_EVENT_ANY | RTEMS_WAIT, RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1198,16 +1198,16 @@ fec_txDaemon (void *arg) struct ifnet *ifp = &sc->arpcom.ac_if; struct mbuf *m; rtems_event_set events; - + for (;;) { /* * Wait for packet */ - rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, - RTEMS_EVENT_ANY | RTEMS_WAIT, - RTEMS_NO_TIMEOUT, + rtems_bsdnet_event_receive (START_TRANSMIT_EVENT, + RTEMS_EVENT_ANY | RTEMS_WAIT, + RTEMS_NO_TIMEOUT, &events); - + /* * Send packets till queue is empty */ @@ -1231,7 +1231,7 @@ static void m860_enet_start (struct ifnet *ifp) { struct m860_enet_struct *sc = ifp->if_softc; - + rtems_event_send (sc->txDaemonTid, START_TRANSMIT_EVENT); ifp->if_flags |= IFF_OACTIVE; } @@ -1244,22 +1244,22 @@ scc_init (void *arg) { struct m860_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m860_scc_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, scc_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, scc_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1267,12 +1267,12 @@ scc_init (void *arg) m8xx.scc1.psmr |= 0x200; else m8xx.scc1.psmr &= ~0x200; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1284,22 +1284,22 @@ fec_init (void *arg) { struct m860_enet_struct *sc = arg; struct ifnet *ifp = &sc->arpcom.ac_if; - + if (sc->txDaemonTid == 0) { - + /* * Set up SCC hardware */ m860_fec_initialize_hardware (sc); - + /* * Start driver tasks */ sc->txDaemonTid = rtems_bsdnet_newproc ("SCtx", 4096, fec_txDaemon, sc); sc->rxDaemonTid = rtems_bsdnet_newproc ("SCrx", 4096, fec_rxDaemon, sc); - + } - + /* * Set flags appropriately */ @@ -1308,12 +1308,12 @@ fec_init (void *arg) else m8xx.fec.r_cntrl &= ~0x8; - + /* * Tell the world that we're running. */ ifp->if_flags |= IFF_RUNNING; - + /* * Enable receiver and transmitter */ @@ -1328,9 +1328,9 @@ static void scc_stop (struct m860_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1341,9 +1341,9 @@ static void fec_stop (struct m860_enet_struct *sc) { struct ifnet *ifp = &sc->arpcom.ac_if; - + ifp->if_flags &= ~IFF_RUNNING; - + /* * Shut down receiver and transmitter */ @@ -1366,7 +1366,7 @@ enet_stats (struct m860_enet_struct *sc) printf (" Overrun:%-8lu", sc->rxOverrun); printf (" Collision:%-8lu\n", sc->rxCollision); printf (" Discarded:%-8lu\n", (unsigned long)m8xx.scc1p.un.ethernet.disfc); - + printf (" Tx Interrupts:%-8lu", sc->txInterrupts); printf (" Deferred:%-8lu", sc->txDeferred); printf (" Missed Hearbeat:%-8lu\n", sc->txHeartbeat); @@ -1385,37 +1385,37 @@ scc_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m860_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: scc_stop (sc); break; - + case IFF_UP: scc_init (sc); break; - + case IFF_UP | IFF_RUNNING: scc_stop (sc); scc_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1431,37 +1431,37 @@ fec_ioctl (struct ifnet *ifp, int command, caddr_t data) { struct m860_enet_struct *sc = ifp->if_softc; int error = 0; - + switch (command) { case SIOCGIFADDR: case SIOCSIFADDR: ether_ioctl (ifp, command, data); break; - + case SIOCSIFFLAGS: switch (ifp->if_flags & (IFF_UP | IFF_RUNNING)) { case IFF_RUNNING: fec_stop (sc); break; - + case IFF_UP: fec_init (sc); break; - + case IFF_UP | IFF_RUNNING: fec_stop (sc); fec_init (sc); break; - + default: break; } break; - + case SIO_RTEMS_SHOW_STATS: enet_stats (sc); break; - + /* * FIXME: All sorts of multicast commands need to be added here! */ @@ -1482,7 +1482,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) struct ifnet *ifp; int mtu; int i; - + /* * Find a free driver */ @@ -1496,7 +1496,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) printf ("Too many SCC drivers.\n"); return 0; } - + /* * Process options */ @@ -1524,7 +1524,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1539,7 +1539,7 @@ rtems_scc1_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ @@ -1554,7 +1554,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) struct m860_enet_struct *sc; struct ifnet *ifp; int mtu; - + /* * Find a free driver */ @@ -1563,7 +1563,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) if (ifp->if_softc != NULL) return 0; - + /* * Process options */ @@ -1591,7 +1591,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) else sc->txBdCount = TX_BUF_COUNT * TX_BD_PER_BUF; sc->acceptBroadcast = !config->ignore_broadcast; - + /* * Set up network interface values */ @@ -1606,7 +1606,7 @@ rtems_fec_driver_attach (struct rtems_bsdnet_ifconfig *config) ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX; if (ifp->if_snd.ifq_maxlen == 0) ifp->if_snd.ifq_maxlen = ifqmaxlen; - + /* * Attach the interface */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/start/start.S b/c/src/lib/libbsp/powerpc/eth_comm/start/start.S index a281c11ad6..288b7f3cd9 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/start/start.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/start/start.S @@ -39,7 +39,7 @@ * GDB likes to have debugging information for the entry veneer. * Here is some DWARF information. */ -/* +/* * There was some debugging info here, but I removed it because I * couldn't get it to work. It isn't really necessary as far as I * can tell. It should still be in the papyrus BSP. -Jay @@ -47,30 +47,30 @@ -/* +/* * On entry to download_entry, R3 will hold a pointer to a Board Info * Block (boardinfo_t). This should be copied as soon as possible * to the global M860_binfo. (The block should be copied, _NOT_ * the pointer) */ - .section ".entry" /* This might have to be the first thing in the + .section ".entry" /* This might have to be the first thing in the * text section. At one time, it had to be * first, but I don't believe it is true * andy more. */ PUBLIC_VAR (start) SYM(start): bl .startup -base_addr: +base_addr: /* * Parameters from linker */ -toc_pointer: +toc_pointer: .long s.got -bss_length: +bss_length: .long bss.size -bss_addr: +bss_addr: .long bss.start PUBLIC_VAR (text_addr) @@ -83,16 +83,16 @@ text_length: /* - * Initialization code + * Initialization code */ .startup: /* Get start address */ mflr r1 - + /* clear the bss section */ bl bssclr -/* +/* * Copy the Board Info Block */ .extern SYM(M860_binfo) diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c index da674ec747..3d830a9f6e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c @@ -51,13 +51,13 @@ void bsp_libc_init( void *, uint32_t, int ); void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } /* @@ -73,14 +73,14 @@ void _BSP_Fatal_error(unsigned int v) * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int _end; uint32_t heap_start; - /* + /* * Let's check to see if the size of M860_binfo is what * it should be. It might not be if the info.h files * for RTEMS and the bootloader define boardinfo_t @@ -103,7 +103,7 @@ bsp_pretasking_hook(void) } /* set up a 256K heap */ bsp_libc_init((void *) heap_start, 256 * 1024, 0); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -121,7 +121,7 @@ void bsp_start(void) ppc_cpu_revision_t myCpuRevision; register unsigned char* intrStack; extern void cpu_init(void); - + /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function * store the result in global variables so that it can be used latter... @@ -134,19 +134,19 @@ void bsp_start(void) /* * Initialize some SPRG registers related to irq handling */ - + intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); /* Signal them that this BSP has fixed PR288 - eventually, this should go away */ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); - + /* * Install our own set of exception vectors */ initialize_exceptions(); - + /* * Allocate the memory for the RTEMS Work Space. This can come from * a variety of places: hard coded address, malloc'ed from outside @@ -172,7 +172,7 @@ void bsp_start(void) } BSP_Configuration.work_space_start = (void *)ws_start; - BSP_Configuration.work_space_size = 512 * 1024; + BSP_Configuration.work_space_size = 512 * 1024; /* * initialize the CPU table for this BSP @@ -195,7 +195,7 @@ void bsp_start(void) /* * Since we are currently autodetecting whether to use SCC1 or * the FEC for ethernet, we set up a register in the ethernet - * transciever that is used for 10/100 Mbps ethernet now, so that + * transciever that is used for 10/100 Mbps ethernet now, so that * we can attempt to read it later in rtems_enet_driver_attach() */ m8xx.fec.mii_speed = 0x0a; @@ -212,6 +212,6 @@ void bsp_start(void) BSP_rtems_irq_mng_init(0); #ifdef SHOW_MORE_INIT_SETTINGS printk("Exit from bspstart\n"); -#endif +#endif } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c index 6049f37878..99355ea11e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c @@ -1,8 +1,8 @@ -/* - * cpuinit.c - this file contains functions for initializing the CPU +/* + * cpuinit.c - this file contains functions for initializing the CPU * * Written by Jay Monkman (jmonkman@frasca.com) - * + * * $Id$ */ @@ -18,14 +18,14 @@ void cpu_init(void) { register unsigned long t1, t2; - /* Let's clear MSR[IR] and MSR[DR] */ + /* Let's clear MSR[IR] and MSR[DR] */ t2 = PPC_MSR_IR | PPC_MSR_DR; __asm__ volatile ( "mfmsr %0\n" "andc %0, %0, %1\n" "mtmsr %0\n" :"=r"(t1), "=r"(t2): "1"(t2)); - + t1 = M8xx_CACHE_CMD_UNLOCK; /* PUT_DC_CST(t1); */ PUT_IC_CST(t1); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c index f226e56df9..adc3c0491d 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c @@ -1,7 +1,7 @@ -/* +/* * mmutlbtab.c - * - * This file defines the MMU_TLB_table for the eth_comm board. + * + * This file defines the MMU_TLB_table for the eth_comm board. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -25,20 +25,20 @@ * The instruction and data TLBs each can hold 32 entries, so _TLB_Table must * not have more than 32 lines in it! * - * We set up the virtual memory map so that virtual address of a + * We set up the virtual memory map so that virtual address of a * location is equal to its real address. */ MMU_TLB_table_t MMU_TLB_table[] = { /* - * DRAM: CS1, Start address 0x00000000, 8M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 8M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for supervisor, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ { 0x00000200, 0x0D, 0x000001FD } /* DRAM - PS=PS=8M */ }; -/* +/* * MMU_N_TLB_Table_Entries is defined here because the size of the * MMU_TLB_table is only known in this file. */ diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S index 331c3e5f99..561f190225 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.S @@ -2,26 +2,26 @@ * (c) 1999, Eric Valette valette@crf.canon.fr * * - * This file contains the assembly code for the PowerPC + * This file contains the assembly code for the PowerPC * exception veneers for RTEMS. * * $Id$ */ - + #include #include #include - + #define SYNC \ sync; \ isync - + .text - .p2align 5 - + .p2align 5 + PUBLIC_VAR(default_exception_vector_code_prolog) SYM (default_exception_vector_code_prolog): /* @@ -34,7 +34,7 @@ SYM (default_exception_vector_code_prolog): stw r2, EXC_LR_OFFSET(r1) bl 0f 0: /* - * r3 = exception vector entry point + * r3 = exception vector entry point * (256 * vector number) + few instructions */ mflr r3 @@ -43,13 +43,13 @@ SYM (default_exception_vector_code_prolog): */ srwi r3,r3,8 ba push_normalized_frame - + PUBLIC_VAR (default_exception_vector_code_prolog_size) - + default_exception_vector_code_prolog_size= . - default_exception_vector_code_prolog - + .p2align 5 -PUBLIC_VAR (push_normalized_frame) +PUBLIC_VAR (push_normalized_frame) SYM (push_normalized_frame): stw r3, EXCEPTION_NUMBER_OFFSET(r1) stw r0, GPR0_OFFSET(r1) @@ -63,7 +63,7 @@ SYM (push_normalized_frame): * Saved a few line above : R0 * * Manual says that "stmw" instruction may be slower than - * series of individual "stw" but who cares about performance + * series of individual "stw" but who cares about performance * for the DEFAULT exception handler? */ stmw r4, GPR4_OFFSET(r1) /* save R4->R31 */ @@ -89,7 +89,7 @@ SYM (push_normalized_frame): ori r3,r3, MSR_RI | MSR_IR | MSR_DR mtmsr r3 SYNC - + /* * Call C exception handler */ @@ -130,12 +130,12 @@ SYM (push_normalized_frame): /* * Restore rfi related settings */ - + lwz r3, SRR1_FRAME_OFFSET(r1) mtsrr1 r3 lwz r3, SRR0_FRAME_OFFSET(r1) mtsrr0 r3 - + lwz r3, GPR3_OFFSET(r1) addi r1,r1, EXCEPTION_FRAME_END SYNC diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h index 8647d98ee4..3a366f5b83 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors.h @@ -1,4 +1,4 @@ -/* +/* * vectors.h Exception frame related contant and API. * * This include file describe the data structure and the functions implemented @@ -16,10 +16,10 @@ #define LIBBSP_POWERPC_ETH_COMM_VECTORS_H /* - * The callee (high level exception code written in C) + * The callee (high level exception code written in C) * will store the Link Registers (return address) at entry r1 + 4 !!!. * So let room for it!!!. - */ + */ #define LINK_REGISTER_CALLEE_UPDATE_ROOM 4 #define SRR0_FRAME_OFFSET 8 #define SRR1_FRAME_OFFSET 12 @@ -81,7 +81,7 @@ extern int default_exception_vector_code_prolog_size; * zero, it performs more or less like memmove. No copy is performed if * source and destination addresses are equal. However the caches * are synchronized. Note that the size is always rounded up to the - * next mutiple of 4. + * next mutiple of 4. */ extern void * codemove(void *, const void *, unsigned int, unsigned long); extern void initialize_exceptions(); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c index 332da08eda..489f9d5054 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/vectors/vectors_init.c @@ -1,4 +1,4 @@ -/* +/* * vectors_init.c Exception hanlding initialisation (and generic handler). * * This include file describe the data structure and the functions implemented @@ -26,7 +26,7 @@ exception_handler_t globalExceptHdl; void C_exception_handler(BSP_Exception_frame* excPtr) { int recoverable = 0; - + printk("exception handler called for exception %d\n", excPtr->_EXC_number); printk("\t Next PC or Address of fault = %x\n", excPtr->EXC_SRR0); printk("\t Saved MSR = %x\n", excPtr->EXC_SRR1); @@ -70,7 +70,7 @@ void C_exception_handler(BSP_Exception_frame* excPtr) if (excPtr->_EXC_number == ASM_DEC_VECTOR) recoverable = 1; if (excPtr->_EXC_number == ASM_SYS_VECTOR) -#ifdef TEST_RAW_EXCEPTION_CODE +#ifdef TEST_RAW_EXCEPTION_CODE recoverable = 1; #else recoverable = 0; -- cgit v1.2.3