From 6128a4aa5e791ed4e0a655bfd346a52d92da7883 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Wed, 21 Apr 2004 10:43:04 +0000 Subject: Remove stray white spaces. --- .../lib/libbsp/powerpc/eth_comm/startup/bspstart.c | 24 +++++++++++----------- .../lib/libbsp/powerpc/eth_comm/startup/cpuinit.c | 10 ++++----- .../libbsp/powerpc/eth_comm/startup/mmutlbtab.c | 14 ++++++------- 3 files changed, 24 insertions(+), 24 deletions(-) (limited to 'c/src/lib/libbsp/powerpc/eth_comm/startup') diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c index da674ec747..3d830a9f6e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c @@ -51,13 +51,13 @@ void bsp_libc_init( void *, uint32_t, int ); void BSP_panic(char *s) { printk("%s PANIC %s\n",_RTEMS_version, s); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } void _BSP_Fatal_error(unsigned int v) { printk("%s PANIC ERROR %x\n",_RTEMS_version, v); - __asm__ __volatile ("sc"); + __asm__ __volatile ("sc"); } /* @@ -73,14 +73,14 @@ void _BSP_Fatal_error(unsigned int v) * not yet initialized. * */ - + void bsp_pretasking_hook(void) { extern int _end; uint32_t heap_start; - /* + /* * Let's check to see if the size of M860_binfo is what * it should be. It might not be if the info.h files * for RTEMS and the bootloader define boardinfo_t @@ -103,7 +103,7 @@ bsp_pretasking_hook(void) } /* set up a 256K heap */ bsp_libc_init((void *) heap_start, 256 * 1024, 0); - + #ifdef RTEMS_DEBUG rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); #endif @@ -121,7 +121,7 @@ void bsp_start(void) ppc_cpu_revision_t myCpuRevision; register unsigned char* intrStack; extern void cpu_init(void); - + /* * Get CPU identification dynamically. Note that the get_ppc_cpu_type() function * store the result in global variables so that it can be used latter... @@ -134,19 +134,19 @@ void bsp_start(void) /* * Initialize some SPRG registers related to irq handling */ - + intrStack = (((unsigned char*)&intrStackPtr) - CPU_MINIMUM_STACK_FRAME_SIZE); _write_SPRG1((unsigned int)intrStack); /* Signal them that this BSP has fixed PR288 - eventually, this should go away */ _write_SPRG0(PPC_BSP_HAS_FIXED_PR288); - + /* * Install our own set of exception vectors */ initialize_exceptions(); - + /* * Allocate the memory for the RTEMS Work Space. This can come from * a variety of places: hard coded address, malloc'ed from outside @@ -172,7 +172,7 @@ void bsp_start(void) } BSP_Configuration.work_space_start = (void *)ws_start; - BSP_Configuration.work_space_size = 512 * 1024; + BSP_Configuration.work_space_size = 512 * 1024; /* * initialize the CPU table for this BSP @@ -195,7 +195,7 @@ void bsp_start(void) /* * Since we are currently autodetecting whether to use SCC1 or * the FEC for ethernet, we set up a register in the ethernet - * transciever that is used for 10/100 Mbps ethernet now, so that + * transciever that is used for 10/100 Mbps ethernet now, so that * we can attempt to read it later in rtems_enet_driver_attach() */ m8xx.fec.mii_speed = 0x0a; @@ -212,6 +212,6 @@ void bsp_start(void) BSP_rtems_irq_mng_init(0); #ifdef SHOW_MORE_INIT_SETTINGS printk("Exit from bspstart\n"); -#endif +#endif } diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c index 6049f37878..99355ea11e 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/cpuinit.c @@ -1,8 +1,8 @@ -/* - * cpuinit.c - this file contains functions for initializing the CPU +/* + * cpuinit.c - this file contains functions for initializing the CPU * * Written by Jay Monkman (jmonkman@frasca.com) - * + * * $Id$ */ @@ -18,14 +18,14 @@ void cpu_init(void) { register unsigned long t1, t2; - /* Let's clear MSR[IR] and MSR[DR] */ + /* Let's clear MSR[IR] and MSR[DR] */ t2 = PPC_MSR_IR | PPC_MSR_DR; __asm__ volatile ( "mfmsr %0\n" "andc %0, %0, %1\n" "mtmsr %0\n" :"=r"(t1), "=r"(t2): "1"(t2)); - + t1 = M8xx_CACHE_CMD_UNLOCK; /* PUT_DC_CST(t1); */ PUT_IC_CST(t1); diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c index f226e56df9..adc3c0491d 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/mmutlbtab.c @@ -1,7 +1,7 @@ -/* +/* * mmutlbtab.c - * - * This file defines the MMU_TLB_table for the eth_comm board. + * + * This file defines the MMU_TLB_table for the eth_comm board. * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at @@ -25,20 +25,20 @@ * The instruction and data TLBs each can hold 32 entries, so _TLB_Table must * not have more than 32 lines in it! * - * We set up the virtual memory map so that virtual address of a + * We set up the virtual memory map so that virtual address of a * location is equal to its real address. */ MMU_TLB_table_t MMU_TLB_table[] = { /* - * DRAM: CS1, Start address 0x00000000, 8M, - * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, + * DRAM: CS1, Start address 0x00000000, 8M, + * ASID=0x0, APG=0x0, not guarded memory, copyback data cache policy, * R/W,X for supervisor, no ASID comparison, not cache-inhibited. * EPN TWC RPN */ { 0x00000200, 0x0D, 0x000001FD } /* DRAM - PS=PS=8M */ }; -/* +/* * MMU_N_TLB_Table_Entries is defined here because the size of the * MMU_TLB_table is only known in this file. */ -- cgit v1.2.3