From 8ef38186faea3d9b5e6f0f1242f668cb7e7a3d52 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 12 Jun 2000 19:57:02 +0000 Subject: Patch from John Cotton , Charles-Antoine Gauthier , and Darlene A. Stewart to add support for a number of very significant things: + BSPs for many variations on the Motorola MBX8xx board series + Cache Manager including initial support for m68040 and PowerPC + Rework of mpc8xx libcpu code so all mpc8xx CPUs now use same code base. + Rework of eth_comm BSP to utiltize above. John reports this works on the 821 and 860 --- c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c | 19 ++++++++++--------- 1 file changed, 10 insertions(+), 9 deletions(-) (limited to 'c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c') diff --git a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c index be35333ea5..c5c1c37d76 100644 --- a/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c +++ b/c/src/lib/libbsp/powerpc/eth_comm/startup/bspstart.c @@ -18,7 +18,6 @@ */ #include -#include #include #include @@ -115,6 +114,10 @@ void bsp_start(void) extern int _end; rtems_unsigned32 heap_start; rtems_unsigned32 ws_start; + + cpu_init(); + mmu_init(); + /* * Allocate the memory for the RTEMS Work Space. This can come from * a variety of places: hard coded address, malloc'ed from outside @@ -166,16 +169,14 @@ void bsp_start(void) * transciever that is used for 10/100 Mbps ethernet now, so that * we can attempt to read it later in rtems_enet_driver_attach() */ - m860.fec.mii_speed = 0x0a; - m860.fec.mii_data = 0x680a0000; - + m8xx.fec.mii_speed = 0x0a; + m8xx.fec.mii_data = 0x680a0000; - m860.scc2.sccm=0; - m860.scc2p.rbase=0; - m860.scc2p.tbase=0; - M860ExecuteRISC(M860_CR_OP_STOP_TX | M860_CR_CHAN_SCC2); - mmu_init(); + m8xx.scc2.sccm=0; + m8xx.scc2p.rbase=0; + m8xx.scc2p.tbase=0; + m8xx_cp_execute_cmd( M8xx_CR_OP_STOP_TX | M8xx_CR_CHAN_SCC2 ); } -- cgit v1.2.3