From 25964be6675edd80e3fb9d7ae1a0eb6664297c46 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Thu, 22 Apr 2004 15:57:29 +0000 Subject: 2004-04-22 Ralf Corsepius * include/bsp.h: Split out tmtest27 support. * include/tm27.h: New. --- c/src/lib/libbsp/mips/genmongoosev/ChangeLog | 5 ++ c/src/lib/libbsp/mips/genmongoosev/include/bsp.h | 34 ------------ c/src/lib/libbsp/mips/genmongoosev/include/tm27.h | 49 ++++++++++++++++++ c/src/lib/libbsp/mips/jmr3904/ChangeLog | 5 ++ c/src/lib/libbsp/mips/jmr3904/include/bsp.h | 48 ----------------- c/src/lib/libbsp/mips/jmr3904/include/tm27.h | 63 +++++++++++++++++++++++ c/src/lib/libbsp/mips/p4000/ChangeLog | 5 ++ c/src/lib/libbsp/mips/p4000/include/bsp.h | 14 ----- c/src/lib/libbsp/mips/p4000/include/tm27.h | 33 ++++++++++++ 9 files changed, 160 insertions(+), 96 deletions(-) create mode 100644 c/src/lib/libbsp/mips/genmongoosev/include/tm27.h create mode 100644 c/src/lib/libbsp/mips/jmr3904/include/tm27.h create mode 100644 c/src/lib/libbsp/mips/p4000/include/tm27.h (limited to 'c/src/lib/libbsp/mips') diff --git a/c/src/lib/libbsp/mips/genmongoosev/ChangeLog b/c/src/lib/libbsp/mips/genmongoosev/ChangeLog index 5277f230a1..3db3b6a26a 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/ChangeLog +++ b/c/src/lib/libbsp/mips/genmongoosev/ChangeLog @@ -1,3 +1,8 @@ +2004-04-22 Ralf Corsepius + + * include/bsp.h: Split out tmtest27 support. + * include/tm27.h: New. + 2004-04-21 Ralf Corsepius PR 613/bsps diff --git a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h index ad8d7b47fe..fb6f421389 100644 --- a/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h +++ b/c/src/lib/libbsp/mips/genmongoosev/include/bsp.h @@ -48,42 +48,8 @@ extern "C" { extern void assertSoftwareInterrupt(uint32_t); -/* - * Define the interrupt mechanism for Time Test 27 - * - * NOTE: Following are for XXX and are board independent - * - */ - #define CLOCK_VECTOR MONGOOSEV_IRQ_TIMER1 -#define MUST_WAIT_FOR_INTERRUPT 1 - -#if 1 - -#define Install_tm27_vector( handler ) \ - (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); - -#define Cause_tm27_intr() assertSoftwareInterrupt(0); - -#define Clear_tm27_intr() -#define Lower_tm27_intr() - -#else - -#define Install_tm27_vector( handler ) \ - (void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 ); - -#define Cause_tm27_intr() \ - do { \ - ; \ - } while(0) - -#define Clear_tm27_intr() -#define Lower_tm27_intr() - -#endif - /* Constants */ /* miscellaneous stuff assumed to exist */ diff --git a/c/src/lib/libbsp/mips/genmongoosev/include/tm27.h b/c/src/lib/libbsp/mips/genmongoosev/include/tm27.h new file mode 100644 index 0000000000..54c8b05d1d --- /dev/null +++ b/c/src/lib/libbsp/mips/genmongoosev/include/tm27.h @@ -0,0 +1,49 @@ +/* + * tm27.h + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#ifndef _TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#if 1 + +#define Install_tm27_vector( handler ) \ + (void) set_vector( handler, MONGOOSEV_IRQ_SOFTWARE_1, 1 ); + +#define Cause_tm27_intr() assertSoftwareInterrupt(0); + +#define Clear_tm27_intr() +#define Lower_tm27_intr() + +#else + +#define Install_tm27_vector( handler ) \ + (void) set_vector( handler, MONGOOSEV_IRQ_TIMER1, 1 ); + +#define Cause_tm27_intr() \ + do { \ + ; \ + } while(0) + +#define Clear_tm27_intr() +#define Lower_tm27_intr() + +#endif + +#endif diff --git a/c/src/lib/libbsp/mips/jmr3904/ChangeLog b/c/src/lib/libbsp/mips/jmr3904/ChangeLog index eb0bb1cee8..2b4108aa11 100644 --- a/c/src/lib/libbsp/mips/jmr3904/ChangeLog +++ b/c/src/lib/libbsp/mips/jmr3904/ChangeLog @@ -1,3 +1,8 @@ +2004-04-22 Ralf Corsepius + + * include/bsp.h: Split out tmtest27 support. + * include/tm27.h: New. + 2004-04-21 Ralf Corsepius PR 613/bsps diff --git a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h index 2d632062d9..ce7f4a78af 100644 --- a/c/src/lib/libbsp/mips/jmr3904/include/bsp.h +++ b/c/src/lib/libbsp/mips/jmr3904/include/bsp.h @@ -28,54 +28,6 @@ extern "C" { #include #include -/* - * Define the interrupt mechanism for Time Test 27 - * - * NOTE: Following are for XXX and are board independent - * - */ - -#define MUST_WAIT_FOR_INTERRUPT 1 - -#if 0 -#define Install_tm27_vector( handler ) \ - (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \ - -#define Cause_tm27_intr() \ - asm volatile ( "syscall 0x01" : : ); - -#define CLOCK_VECTOR TX3904_IRQ_TMR0 - -#define Clear_tm27_intr() - -#define Lower_tm27_intr() -#else -#define Install_tm27_vector( handler ) \ - (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \ - -#define Cause_tm27_intr() \ - do { \ - uint32_t _clicks = 20; \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xC0 ); \ - *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \ - } while(0) - -#define Clear_tm27_intr() \ - do { \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ - TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ - } while(0) - -#define Lower_tm27_intr() \ - mips_enable_in_interrupt_mask( 0xff01 ); - -#endif - /* Constants */ /* miscellaneous stuff assumed to exist */ diff --git a/c/src/lib/libbsp/mips/jmr3904/include/tm27.h b/c/src/lib/libbsp/mips/jmr3904/include/tm27.h new file mode 100644 index 0000000000..0130f51829 --- /dev/null +++ b/c/src/lib/libbsp/mips/jmr3904/include/tm27.h @@ -0,0 +1,63 @@ +/* + * tm27.h + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#ifndef _TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#if 0 +#define Install_tm27_vector( handler ) \ + (void) set_vector( handler, TX3904_IRQ_SOFTWARE_1, 1 ); \ + +#define Cause_tm27_intr() \ + asm volatile ( "syscall 0x01" : : ); + +#define CLOCK_VECTOR TX3904_IRQ_TMR0 + +#define Clear_tm27_intr() + +#define Lower_tm27_intr() +#else +#define Install_tm27_vector( handler ) \ + (void) set_vector( handler, TX3904_IRQ_TMR0, 1 ); \ + +#define Cause_tm27_intr() \ + do { \ + uint32_t _clicks = 20; \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CPRA, _clicks ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x8001 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TCR, 0xC0 ); \ + *((volatile uint32_t*) 0xFFFFC01C) = 0x00000700; \ + } while(0) + +#define Clear_tm27_intr() \ + do { \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_ITMR, 0x0001 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_CCDR, 0x3 ); \ + TX3904_TIMER_WRITE( TX3904_TIMER0_BASE, TX3904_TIMER_TISR, 0x00 ); \ + } while(0) + +#define Lower_tm27_intr() \ + mips_enable_in_interrupt_mask( 0xff01 ); + +#endif + +#endif diff --git a/c/src/lib/libbsp/mips/p4000/ChangeLog b/c/src/lib/libbsp/mips/p4000/ChangeLog index 5467df311d..a967d4ae09 100644 --- a/c/src/lib/libbsp/mips/p4000/ChangeLog +++ b/c/src/lib/libbsp/mips/p4000/ChangeLog @@ -1,3 +1,8 @@ +2004-04-22 Ralf Corsepius + + * include/bsp.h: Split out tmtest27 support. + * include/tm27.h: New. + 2004-04-21 Ralf Corsepius PR 613/bsps diff --git a/c/src/lib/libbsp/mips/p4000/include/bsp.h b/c/src/lib/libbsp/mips/p4000/include/bsp.h index 3bb04eafc4..4f195fd0a9 100644 --- a/c/src/lib/libbsp/mips/p4000/include/bsp.h +++ b/c/src/lib/libbsp/mips/p4000/include/bsp.h @@ -39,20 +39,6 @@ extern "C" { extern void WriteDisplay( char * string ); -/* - * Stuff for Time Test 27 - */ - -#define MUST_WAIT_FOR_INTERRUPT 0 - -#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 ) - -#define Cause_tm27_intr() - -#define Clear_tm27_intr() - -#define Lower_tm27_intr() - extern uint32_t mips_get_timer( void ); #define CPU_CLOCK_RATE_MHZ (50) diff --git a/c/src/lib/libbsp/mips/p4000/include/tm27.h b/c/src/lib/libbsp/mips/p4000/include/tm27.h new file mode 100644 index 0000000000..17ee3f7956 --- /dev/null +++ b/c/src/lib/libbsp/mips/p4000/include/tm27.h @@ -0,0 +1,33 @@ +/* + * tm27.h + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.rtems.com/license/LICENSE. + * + * $Id$ + */ + +#ifndef _TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +#define MUST_WAIT_FOR_INTERRUPT 0 + +#define Install_tm27_vector( handler ) set_vector( (handler), 0, 1 ) + +#define Cause_tm27_intr() + +#define Clear_tm27_intr() + +#define Lower_tm27_intr() + + +#endif -- cgit v1.2.3