From 0df29b07d81623fbe605f79667bb262536c2ebdc Mon Sep 17 00:00:00 2001
From: Ralf Corsepius <ralf.corsepius@rtems.org>
Date: Thu, 22 Apr 2004 15:41:35 +0000
Subject: 2004-04-22	Ralf Corsepius <ralf_corsepius@rtems.org>

	* include/bsp.h: Split out tmtest27 support.
	* include/tm27.h: New.
---
 c/src/lib/libbsp/m68k/mvme167/include/bsp.h  | 18 --------------
 c/src/lib/libbsp/m68k/mvme167/include/tm27.h | 37 ++++++++++++++++++++++++++++
 2 files changed, 37 insertions(+), 18 deletions(-)
 create mode 100644 c/src/lib/libbsp/m68k/mvme167/include/tm27.h

(limited to 'c/src/lib/libbsp/m68k/mvme167/include')

diff --git a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
index 0660fa0a62..d68650d2dc 100644
--- a/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
+++ b/c/src/lib/libbsp/m68k/mvme167/include/bsp.h
@@ -345,24 +345,6 @@ extern rtems_configuration_table BSP_Configuration;
 
 extern m68k_isr_entry M68Kvec[];   /* vector table address */
 
-/*
- *  Define the interrupt mechanism for Time Test 27
- *
- *  NOTE: We use software interrupt 0
- */
-#define MUST_WAIT_FOR_INTERRUPT 0
-
-#define Install_tm27_vector( handler ) \
-            set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
-            lcsr->intr_level[2] |= 3; \
-            lcsr->intr_ena |= 0x100
-
-#define Cause_tm27_intr()  lcsr->intr_soft_set |= 0x100
-
-#define Clear_tm27_intr()  lcsr->intr_clear |= 0x100
-
-#define Lower_tm27_intr()
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/c/src/lib/libbsp/m68k/mvme167/include/tm27.h b/c/src/lib/libbsp/m68k/mvme167/include/tm27.h
new file mode 100644
index 0000000000..c0201fb32d
--- /dev/null
+++ b/c/src/lib/libbsp/m68k/mvme167/include/tm27.h
@@ -0,0 +1,37 @@
+/*
+ *  tm27.h
+ *
+ *  The license and distribution terms for this file may be
+ *  found in the file LICENSE in this distribution or at
+ *  http://www.rtems.com/license/LICENSE.
+ *
+ *  $Id$
+ */
+
+#ifndef _TMTEST27
+#error "This is an RTEMS internal file you must not include directly."
+#endif
+
+#ifndef __tm27_h
+#define __tm27_h
+
+/*
+ *  Define the interrupt mechanism for Time Test 27
+ *
+ *  NOTE: We use software interrupt 0
+ */
+#define MUST_WAIT_FOR_INTERRUPT 0
+
+#define Install_tm27_vector( handler ) \
+            set_vector( (handler), VBR1 * 0x10 + 0x8, 1 ); \
+            lcsr->intr_level[2] |= 3; \
+            lcsr->intr_ena |= 0x100
+
+#define Cause_tm27_intr()  lcsr->intr_soft_set |= 0x100
+
+#define Clear_tm27_intr()  lcsr->intr_clear |= 0x100
+
+#define Lower_tm27_intr()
+
+
+#endif
-- 
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