From e0dd8a5ad830798bc8082b03b8c42c32fb9660e0 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Fri, 20 Apr 2018 12:08:42 +0200 Subject: bsps: Move benchmark timer to bsps This patch is a part of the BSP source reorganization. Update #3285. --- c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S | 26 -------------------------- 1 file changed, 26 deletions(-) delete mode 100644 c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S (limited to 'c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S') diff --git a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S b/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S deleted file mode 100644 index 418cf64108..0000000000 --- a/c/src/lib/libbsp/m68k/mvme147/timer/timerisr.S +++ /dev/null @@ -1,26 +0,0 @@ -/* timer_isr() - * - * This routine provides the ISR for the PCC timer on the MVME147 - * board. The timer is set up to generate an interrupt at maximum - * intervals. - * - * MVME147 port for TNI - Telecom Bretagne - * by Dominique LE CAMPION (Dominique.LECAMPION@enst-bretagne.fr) - * May 1996 - */ - -#include - -BEGIN_CODE - -.set T1_CONTROL_REGISTER, 0xfffe1018 | timer 1 control register - - PUBLIC (timerisr) -SYM (timerisr): - orb #0x80, T1_CONTROL_REGISTER | clear T1 int status bit - addql #1, SYM (Ttimer_val) | increment timer value -end_timerisr: - rte - -END_CODE -END -- cgit v1.2.3