From 486c329f2b4f95dbfefdcbefbe6b25adf7895a94 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 20 Sep 1995 15:05:19 +0000 Subject: Actually adding efi bsp's from John Gwynne after forgetting to commit them. --- c/src/lib/libbsp/m68k/efi332/README | 42 +++ c/src/lib/libbsp/m68k/efi332/clock/ckinit.c | 145 +++++++++ c/src/lib/libbsp/m68k/efi332/console/console.c | 390 ++++++++++++++++++++++++ c/src/lib/libbsp/m68k/efi332/include/bsp.h | 147 +++++++++ c/src/lib/libbsp/m68k/efi332/include/coverhd.h | 106 +++++++ c/src/lib/libbsp/m68k/efi332/include/efi332.h | 46 +++ c/src/lib/libbsp/m68k/efi332/spurious/spinit.c | 85 ++++++ c/src/lib/libbsp/m68k/efi332/startup/bspclean.c | 28 ++ c/src/lib/libbsp/m68k/efi332/startup/bspstart.c | 220 +++++++++++++ c/src/lib/libbsp/m68k/efi332/startup/linkcmds | 100 ++++++ c/src/lib/libbsp/m68k/efi332/timer/timer.c | 84 +++++ 11 files changed, 1393 insertions(+) create mode 100644 c/src/lib/libbsp/m68k/efi332/README create mode 100644 c/src/lib/libbsp/m68k/efi332/clock/ckinit.c create mode 100644 c/src/lib/libbsp/m68k/efi332/console/console.c create mode 100644 c/src/lib/libbsp/m68k/efi332/include/bsp.h create mode 100644 c/src/lib/libbsp/m68k/efi332/include/coverhd.h create mode 100644 c/src/lib/libbsp/m68k/efi332/include/efi332.h create mode 100644 c/src/lib/libbsp/m68k/efi332/spurious/spinit.c create mode 100644 c/src/lib/libbsp/m68k/efi332/startup/bspclean.c create mode 100644 c/src/lib/libbsp/m68k/efi332/startup/bspstart.c create mode 100644 c/src/lib/libbsp/m68k/efi332/startup/linkcmds create mode 100644 c/src/lib/libbsp/m68k/efi332/timer/timer.c (limited to 'c/src/lib/libbsp/m68k/efi332') diff --git a/c/src/lib/libbsp/m68k/efi332/README b/c/src/lib/libbsp/m68k/efi332/README new file mode 100644 index 0000000000..12d8cc13cf --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/README @@ -0,0 +1,42 @@ +# +# $Id$ +# + +Description: efi68k +============ +CPU: MC68332 @16MHz +RAM: 256k max. (supports several configurations) +ROM: 512k (supports several configurations) + + This general purpose controller has been designed by a group of +Internet subscribes to the mailing list "efi332" (an offshoot of the +"diy_efi" mailing list). Although efi332 was initially designed for +automotive research, it is a fairly generalized embedded controller +when used without the companion EFI board. It is patterned much after +the the Motorola BCC but cost on the order of $250US. A 4x3 inch +(approx.) printed circuit board is available. For complete +information see + + http://www.cim.swin.edu.au/wwwhome/aden/efi332/332_index.html + +TODO: +===== +- add separate interrupt stack (low priority). + +- add a timer driver for the tmtest set. + +- generate include/coverhd.c to preform the tmtest. + +- the interrupt drive I/O should be integrated into the RTEMS. + +- finish the ROM memory model. + + + John S Gwynne + Gwynne.1@osu.edu +_______________________________________________________________________________ + T h e O h i o - S t a t e U n i v e r s i t y + ElectroScience Laboratory, 1320 Kinnear Road, Columbus, Ohio 43212, USA + Telephone: (614) 292-7981 * Fax: (614) 292-7297 +------------------------------------------------------------------------------- + diff --git a/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c b/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c new file mode 100644 index 0000000000..2bfa34d32d --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/clock/ckinit.c @@ -0,0 +1,145 @@ +/* Clock_init() + * + * This routine initailizes the periodic interrupt timer on + * the Motorola 68332. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include +#include +#include + +#define CLOCK_VECTOR EFI_PIV + +rtems_unsigned32 Clock_isrs; /* ISRs until next tick */ +volatile rtems_unsigned32 Clock_driver_ticks; + /* ticks since initialization */ +rtems_isr_entry Old_ticker; + +void Clock_exit( void ); + +/* + * These are set by clock driver during its init + */ + +rtems_device_major_number rtems_clock_major = ~0; +rtems_device_minor_number rtems_clock_minor; + +rtems_isr Clock_isr(rtems_vector_number vector) +{ + Clock_driver_ticks += 1; + + if ( Clock_isrs == 1 ) { + rtems_clock_tick(); + Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; + } + else + Clock_isrs -= 1; +} + +void Install_clock( + rtems_isr_entry clock_isr +) +{ + Clock_driver_ticks = 0; + Clock_isrs = BSP_Configuration.microseconds_per_tick / 1000; + + if ( BSP_Configuration.ticks_per_timeslice ) { + Old_ticker = (rtems_isr_entry) set_vector( clock_isr, CLOCK_VECTOR, 1 ); + + /* enable 1mS interrupts */ + *PITR = (unsigned short int)( SAM(0x09,0,PITM) );/* load counter */ + *PICR = (unsigned short int) /* enable interrupt */ + ( SAM(ISRL_PIT,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) ); + + atexit( Clock_exit ); + } +} + +void ReInstall_clock( + rtems_isr_entry clock_isr +) +{ + rtems_unsigned32 isrlevel = 0 ; + + rtems_interrupt_disable( isrlevel ); + (void) set_vector( clock_isr, CLOCK_VECTOR, 1 ); + rtems_interrupt_enable( isrlevel ); +} + +void Clock_exit( void ) +{ + + if ( BSP_Configuration.ticks_per_timeslice ) { + + /* shutdown the periodic interrupt */ + *PICR = (unsigned short int) + ( SAM(0,8,PIRQL) | SAM(CLOCK_VECTOR,0,PIV) ); + /* ^^ zero disables interrupt */ + + /* do not restore old vector */ + + } +} + +rtems_device_driver Clock_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + Install_clock( Clock_isr ); + + /* + * make major/minor avail to others such as shared memory driver + */ + + rtems_clock_major = major; + rtems_clock_minor = minor; + + return RTEMS_SUCCESSFUL; +} + +rtems_device_driver Clock_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *pargp +) +{ + rtems_libio_ioctl_args_t *args = pargp; + + if (args == 0) + goto done; + + /* + * This is hokey, but until we get a defined interface + * to do this, it will just be this simple... + */ + + if (args->command == rtems_build_name('I', 'S', 'R', ' ')) + { + Clock_isr(CLOCK_VECTOR); + } + else if (args->command == rtems_build_name('N', 'E', 'W', ' ')) + { + ReInstall_clock(args->buffer); + } + +done: + return RTEMS_SUCCESSFUL; +} + diff --git a/c/src/lib/libbsp/m68k/efi332/console/console.c b/c/src/lib/libbsp/m68k/efi332/console/console.c new file mode 100644 index 0000000000..b16ec72334 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/console/console.c @@ -0,0 +1,390 @@ +/* + * This file contains the efi332 console IO package. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include +#include + +/* BUFFER_LENGTH must be 2^n for n=1, 2, 3, .... */ +#define BUFFER_LENGTH 256 +#define RTS_STOP_SIZE BUFFER_LENGTH-64 +#define RTS_START_SIZE 16 + +char xmt_buf[BUFFER_LENGTH]; +char rcv_buf[BUFFER_LENGTH]; +/* in: last entry into the buffer; always on a valid character */ +/* out: points to the next character to be pull from the buffer */ +/* in+1=out => buffer empty */ +/* in+2=out => buffer full */ +struct UART_buf { + char *offset; + char *in; + char *out; +}; +static volatile struct UART_buf xmt = { xmt_buf, (char *)0, (char *)1}; +static volatile struct UART_buf rcv = { rcv_buf, (char *)0, (char *)1}; +static volatile char _debug_flag = 0; + +#define SET_RTS(a) {*PORTF0 = (*PORTF0 & 0x4) | ( (a)? 0 : 0x4); } +#define GET_CTS (!(*PORTF0 & 0x2)) + +/* _catchSCIint, _catchCTSint, and _catchSPURIOUSint are the + interrupt front-ends */ +extern void _catchSCIint(); +asm(" .text + .align 2 + .globl _catchSCIint +_catchSCIint: + moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ + jbsr uart_interrupt + moveml %sp@+,%d0-%d7/%a0-%a6 + rte + "); + +extern void _catchCTSint(); +asm(" .text + .align 2 + .globl _catchCTSint +_catchCTSint: + moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ + jbsr cts_interrupt + moveml %sp@+,%d0-%d7/%a0-%a6 + rte + "); + +extern void _catchSPURIOUSint(); +asm(" .text + .align 2 + .globl _catchSPURIOUSint +_catchSPURIOUSint: + moveml %d0-%d7/%a0-%a6,%sp@- /* save registers */ + jbsr spurious_interrupt + moveml %sp@+,%d0-%d7/%a0-%a6 + rte + "); + +int _spurious_int_counter=0; + +/* note: cts uses int1. If it "bounces", a spurious interrupt is generated */ +void spurious_interrupt(void) { + _spurious_int_counter++; /* there should never be alot of these */ +} + +/* _fake_trap_1 will continue the UART interrupt (%sr *still* + UART_ISR_LEVEL) as a trap #1 to enter the debugger */ + +/* *****fix me; this is for 68000 w/jsr ram exception table ******* */ +asm(" .text + .align 2 +_fake_trap_1: + unlk %a6 /* clear interrupt frame */ + lea %sp@(4),%sp /* remove jbsr instruction */ + moveml %sp@+,%d0-%d7/%a0-%a6 /* pop registers */ + jmp (33*6-12) /* jump exception 1 */ + "); + +/* dispatch UART interrupt */ +void xmit_interrupt(void); +void rcvr_interrupt(void); +void _fake_trap_1(void); + +void uart_interrupt(void) { + /* receiver status bits are cleared by a SCSR read followed + by a SCDR read. transmitter status bits are cleared by + a SCSR read followed by a SCDR write. */ + if ((*SCSR) & (TDRE | TC)) + xmit_interrupt(); + + if ((*SCSR) & (RDRF)) + rcvr_interrupt(); + + if (_debug_flag) { + _debug_flag = 0; /* reset the flag */ + _fake_trap_1(); /* fake a trap #1 */ + } +} + +/* transfer received character to the buffer */ +void rcvr_interrupt(void) { + register char *a, c; + register int length; + + while((*SCSR) & (RDRF)) { + if ((c=*SCDR) == 0x1a) /* use ctl-z to reboot */ + reboot(); +/* else if (c == 0x03) { */ /* use ctl-c to enter debugger */ +/* _debug_flag = 1; */ +/* continue; */ +/* } */ + + *(char *)((int)rcv.offset +(int) + (a=(char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1)))) = c; + if ((char *)(((int)rcv.in+2) & ((int)BUFFER_LENGTH-1)) != rcv.out) + rcv.in=a; + }; + + length = (BUFFER_LENGTH -1) & ( + ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out + + (int)rcv.in + 1); + if (length >= RTS_STOP_SIZE) + SET_RTS(0); +} + +/* tranfer buffered characters to the UART */ +void xmit_interrupt(void) { + register short int oldsr; + + _CPU_ISR_Disable( oldsr ); /* for when outbyte or flush calls */ + while ((*SCSR) & (TDRE)) { + if ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out) + /* xmit buffer not empty */ + if (GET_CTS) { + /* send next char */ + *SCDR=*(char *)((int)xmt.offset+(int)xmt.out); + xmt.out= (char *)(((int)xmt.out+1) & ((int)BUFFER_LENGTH-1)); + *SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE); + } + else { + /* configue CTS interrupt and shutdown xmit interrupts */ + *SCCR1 &= ~(TIE | TCIE); + *PFPAR |= 0x2; + break; + } + else { + /* xmit buffer empty; shutdown interrupts */ + *SCCR1 &= ~(TIE | TCIE); + break; + } + } + _CPU_ISR_Enable( oldsr ); +} + +void cts_interrupt(void) { + register short int oldsr; + + _CPU_ISR_Disable( oldsr ); /* for when outbyte calls */ + + *PFPAR &= ~0x2; + *SCCR1 = (*SCCR1 & ~(TIE | TCIE)) | (TIE); + + _CPU_ISR_Enable( oldsr ); +} + + + +/* transfer character from the buffer */ +char inbyte(void) { + register char a; + register int length; + + while ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out); + a=*(char *)((int)rcv.offset+(int)rcv.out); + rcv.out= (char *)(((int)rcv.out+1) & ((int)BUFFER_LENGTH-1)); + length = (BUFFER_LENGTH -1) & ( + ( ((int)rcv.out <= (int)rcv.in) ? 0 : BUFFER_LENGTH) - (int)rcv.out + + (int)rcv.in + 1); + if (length < RTS_START_SIZE) + SET_RTS(1); + return (a); +} + +/* once room is avaliable in the buffer, transfer + the character into the buffer and enable + the xmtr interrupt */ +void outbyte(char c) { + register char *a; + + while ((char *)(((int)xmt.in+2) & ((int)BUFFER_LENGTH-1)) == xmt.out); + *(char *)((int)xmt.offset+(int) + (a=(char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1))))=c; + xmt.in=a; + + if (!(*SCCR1 & (TIE | TCIE)) && (!(*PFPAR & 0x2)) ) + /* if neither interrupts are running, */ + xmit_interrupt(); /* we need to restart the xmiter */ +} + +void _UART_flush(void) { + /* loop till xmt buffer empty. Works with interrupts disabled */ + while ((char *)(((int)xmt.in+1) & ((int)BUFFER_LENGTH-1)) != xmt.out) + xmit_interrupt(); + /* loop till UART buffer empty */ + while ( (*SCSR & TC) == 0 ); +} + +/* console_initialize + * + * This routine initializes the console IO driver. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_device_driver console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +) +{ + rtems_status_code status; + + *QSMCR = ( SAM(QSM_IARB,0,IARB) ); + *QILR = ( SAM(ISRL_QSPI,4,ILQSPI) | SAM(ISRL_SCI,0,ILSCI) ); + *QIVR = ( SAM(EFI_QIVR,0,INTV) ); + + *SCCR0 = ( (int)( SYS_CLOCK/SCI_BAUD/32.0+0.5 ) & 0x1fff ); + *SCCR1 = ( RIE | TE | RE ); + + set_vector(_catchSPURIOUSint, EFI_SPINT, 0); + set_vector(_catchSCIint, EFI_QIVR, 0); + set_vector(_catchCTSint, EFI_INT1, 0); + status = rtems_io_register_name( + "/dev/console", + major, + (rtems_device_minor_number) 0 + ); + + if (status != RTEMS_SUCCESSFUL) + rtems_fatal_error_occurred(status); + + return RTEMS_SUCCESSFUL; +} + +/* is_character_ready + * + * This routine returns TRUE if a character is available. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * Return values: + */ + +rtems_boolean is_character_ready( + char *ch +) +{ + if ((char *)(((int)rcv.in+1) & ((int)BUFFER_LENGTH-1))== rcv.out) + return(FALSE); + else + return(TRUE); +} + +/* + * Open entry point + */ + +rtems_device_driver console_open( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} + +/* + * Close entry point + */ + +rtems_device_driver console_close( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} + +/* + * read bytes from the serial port. We only have stdin. + */ + +rtems_device_driver console_read( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + rtems_libio_rw_args_t *rw_args; + char *buffer; + int maximum; + int count = 0; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + buffer[ count ] = inbyte(); + if (buffer[ count ] == '\n' || buffer[ count ] == '\r') { + buffer[ count++ ] = '\n'; + buffer[ count ] = 0; + break; + } + } + + rw_args->bytes_moved = count; + return (count >= 0) ? RTEMS_SUCCESSFUL : RTEMS_UNSATISFIED; +} + +/* + * write bytes to the serial port. Stdout and stderr are the same. + */ + +rtems_device_driver console_write( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + int count; + int maximum; + rtems_libio_rw_args_t *rw_args; + char *buffer; + + rw_args = (rtems_libio_rw_args_t *) arg; + + buffer = rw_args->buffer; + maximum = rw_args->count; + + for (count = 0; count < maximum; count++) { + if ( buffer[ count ] == '\n') { + outbyte('\r'); + } + outbyte( buffer[ count ] ); + } + + rw_args->bytes_moved = maximum; + return 0; +} + +/* + * IO Control entry point + */ + +rtems_device_driver console_control( + rtems_device_major_number major, + rtems_device_minor_number minor, + void * arg +) +{ + return RTEMS_SUCCESSFUL; +} + diff --git a/c/src/lib/libbsp/m68k/efi332/include/bsp.h b/c/src/lib/libbsp/m68k/efi332/include/bsp.h new file mode 100644 index 0000000000..dd876eeeec --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/include/bsp.h @@ -0,0 +1,147 @@ +/* bsp.h + * + * This include file contains all efi332 board IO definitions. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __EFI332_BSP_h +#define __EFI332_BSP_h + +#ifdef __cplusplus +extern "C" { +#endif + +#include +#include +#include +#include +#include +#include +#include + +/* + * Define the time limits for RTEMS Test Suite test durations. + * Long test and short test duration limits are provided. These + * values are in seconds and need to be converted to ticks for the + * application. + * + */ + +#define MAX_LONG_TEST_DURATION 300 /* 5 minutes = 300 seconds */ +#define MAX_SHORT_TEST_DURATION 3 /* 3 seconds */ + +/* + * Define the interrupt mechanism for Time Test 27 + */ + +/* XXX - JRS - I want to compile the tmtests */ + +#define MUST_WAIT_FOR_INTERRUPT 1 + +#define Install_tm27_vector( handler ) + +#define Cause_tm27_intr() + +#define Clear_tm27_intr() + +#define Lower_tm27_intr() + +/* + * Simple spin delay in microsecond units for device drivers. + * This is very dependent on the clock speed of the target. + */ + +#define delay( microseconds ) \ + { register rtems_unsigned32 _delay=(microseconds); \ + register rtems_unsigned32 _tmp=123; \ + asm volatile( "0: \ + nbcd %0 ; \ + nbcd %0 ; \ + dbf %1,0b" \ + : "=d" (_tmp), "=d" (_delay) \ + : "0" (_tmp), "1" (_delay) ); \ + } + +/* macros */ + +#define RAM_START 0x80000 +#define RAM_END 0xc0000 + +#define RAW_PUTS(str) \ + { register char *ptr = str; \ + while (*ptr) outbyte(*ptr++); \ + } + +#define RAW_PUTI(n) { \ + register int i, j; \ + \ + RAW_PUTS("0x"); \ + for (i=28;i>=0;i -= 4) { \ + j = (n>>i) & 0xf; \ + outbyte( (j>9 ? j-10+'a' : j+'0') ); \ + } \ + } + +/* miscellaneous stuff assumed to exist */ + +extern rtems_configuration_table BSP_Configuration; + +extern m68k_isr_entry M68Kvec[]; /* vector table address */ + +extern int stack_size; + +extern int stack_start; + +/* + * Device Driver Table Entries + */ + +/* + * NOTE: Use the standard Console driver entry + */ + +/* + * NOTE: Use the standard Clock driver entry + */ + +/* + * How many libio files we want + */ + +#define BSP_LIBIO_MAX_FDS 20 + +/* functions */ + +void bsp_cleanup( void ); + +m68k_isr_entry set_vector( + rtems_isr_entry handler, + rtems_vector_number vector, + int type +); + +void console_init(void); + +void Spurious_Initialize(void); + +void _UART_flush(void); + +void Clock_exit(void); + +void outbyte(char); + +#ifdef __cplusplus +} +#endif + +#endif +/* end of include file */ diff --git a/c/src/lib/libbsp/m68k/efi332/include/coverhd.h b/c/src/lib/libbsp/m68k/efi332/include/coverhd.h new file mode 100644 index 0000000000..671f20d197 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/include/coverhd.h @@ -0,0 +1,106 @@ +/* coverhd.h + * + * This include file has defines to represent the overhead associated + * with calling a particular directive from C. These are used in the + * Timing Test Suite to ignore the overhead required to pass arguments + * to directives. On some CPUs and/or target boards, this overhead + * is significant and makes it difficult to distinguish internal + * RTEMS execution time from that used to call the directive. + * This file should be updated after running the C overhead timing + * test. Once this update has been performed, the RTEMS Time Test + * Suite should be rebuilt to account for these overhead times in the + * timing results. + * + * NOTE: If these are all zero, then the times reported include all + * all calling overhead including passing of arguments. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#ifndef __COVERHD_h +#define __COVERHD_h + +#define CALLING_OVERHEAD_INITIALIZE_EXECUTIVE 0 +#define CALLING_OVERHEAD_SHUTDOWN_EXECUTIVE 0 +#define CALLING_OVERHEAD_TASK_CREATE 0 +#define CALLING_OVERHEAD_TASK_IDENT 0 +#define CALLING_OVERHEAD_TASK_START 0 +#define CALLING_OVERHEAD_TASK_RESTART 0 +#define CALLING_OVERHEAD_TASK_DELETE 0 +#define CALLING_OVERHEAD_TASK_SUSPEND 0 +#define CALLING_OVERHEAD_TASK_RESUME 0 +#define CALLING_OVERHEAD_TASK_SET_PRIORITY 0 +#define CALLING_OVERHEAD_TASK_MODE 0 +#define CALLING_OVERHEAD_TASK_GET_NOTE 0 +#define CALLING_OVERHEAD_TASK_SET_NOTE 0 +#define CALLING_OVERHEAD_TASK_WAKE_WHEN 0 +#define CALLING_OVERHEAD_TASK_WAKE_AFTER 0 +#define CALLING_OVERHEAD_INTERRUPT_CATCH 0 +#define CALLING_OVERHEAD_CLOCK_GET 0 +#define CALLING_OVERHEAD_CLOCK_SET 0 +#define CALLING_OVERHEAD_CLOCK_TICK 0 + +#define CALLING_OVERHEAD_TIMER_CREATE 0 +#define CALLING_OVERHEAD_TIMER_IDENT 0 +#define CALLING_OVERHEAD_TIMER_DELETE 0 +#define CALLING_OVERHEAD_TIMER_FIRE_AFTER 0 +#define CALLING_OVERHEAD_TIMER_FIRE_WHEN 0 +#define CALLING_OVERHEAD_TIMER_RESET 0 +#define CALLING_OVERHEAD_TIMER_CANCEL 0 +#define CALLING_OVERHEAD_SEMAPHORE_CREATE 0 +#define CALLING_OVERHEAD_SEMAPHORE_IDENT 0 +#define CALLING_OVERHEAD_SEMAPHORE_DELETE 0 +#define CALLING_OVERHEAD_SEMAPHORE_OBTAIN 0 +#define CALLING_OVERHEAD_SEMAPHORE_RELEASE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_CREATE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_IDENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_DELETE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_SEND 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_URGENT 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_BROADCAST 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_RECEIVE 0 +#define CALLING_OVERHEAD_MESSAGE_QUEUE_FLUSH 0 + +#define CALLING_OVERHEAD_EVENT_SEND 0 +#define CALLING_OVERHEAD_EVENT_RECEIVE 0 +#define CALLING_OVERHEAD_SIGNAL_CATCH 0 +#define CALLING_OVERHEAD_SIGNAL_SEND 0 +#define CALLING_OVERHEAD_PARTITION_CREATE 0 +#define CALLING_OVERHEAD_PARTITION_IDENT 0 +#define CALLING_OVERHEAD_PARTITION_DELETE 0 +#define CALLING_OVERHEAD_PARTITION_GET_BUFFER 0 +#define CALLING_OVERHEAD_PARTITION_RETURN_BUFFER 0 +#define CALLING_OVERHEAD_REGION_CREATE 0 +#define CALLING_OVERHEAD_REGION_IDENT 0 +#define CALLING_OVERHEAD_REGION_DELETE 0 +#define CALLING_OVERHEAD_REGION_GET_SEGMENT 0 +#define CALLING_OVERHEAD_REGION_RETURN_SEGMENT 0 +#define CALLING_OVERHEAD_PORT_CREATE 0 +#define CALLING_OVERHEAD_PORT_IDENT 0 +#define CALLING_OVERHEAD_PORT_DELETE 0 +#define CALLING_OVERHEAD_PORT_EXTERNAL_TO_INTERNAL 0 +#define CALLING_OVERHEAD_PORT_INTERNAL_TO_EXTERNAL 0 + +#define CALLING_OVERHEAD_IO_INITIALIZE 0 +#define CALLING_OVERHEAD_IO_OPEN 0 +#define CALLING_OVERHEAD_IO_CLOSE 0 +#define CALLING_OVERHEAD_IO_READ 0 +#define CALLING_OVERHEAD_IO_WRITE 0 +#define CALLING_OVERHEAD_IO_CONTROL 0 +#define CALLING_OVERHEAD_FATAL_ERROR_OCCURRED 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CREATE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_IDENT 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_DELETE 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_CANCEL 0 +#define CALLING_OVERHEAD_RATE_MONOTONIC_PERIOD 0 +#define CALLING_OVERHEAD_MULTIPROCESSING_ANNOUNCE 0 + +#endif diff --git a/c/src/lib/libbsp/m68k/efi332/include/efi332.h b/c/src/lib/libbsp/m68k/efi332/include/efi332.h new file mode 100644 index 0000000000..80d23f291a --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/include/efi332.h @@ -0,0 +1,46 @@ +/* efi332.h + * + * $Id$ + */ + +#ifndef _EFI332_H_ +#define _EFI332_H_ + + +/* SIM_MM (SIM Module Mapping) determines the location of the control + register block. When MM=0, register addresses range fom 0x7ff000 to + 0x7FFFFF. When MM=1, register addresses range from 0xfff000 to + 0xffffff. */ +#define SIM_MM 1 + + +/* Interrupt related definitions */ +#define SIM_IARB 15 +#define QSM_IARB 10 + +#define EFI_PIV 64 +#define ISRL_PIT 4 /* zero disables PIT */ + +#define EFI_QIVR 66 /* 66=>SCI and 67=>QSPI interrupt */ +#define ISRL_QSPI 0 + +#define EFI_SPINT 24 /* spurious interrupt */ +#define EFI_INT1 25 /* CTS interrupt */ +#define ISRL_SCI 6 + + + +/* System Clock definitions */ +#define XTAL 32768.0 /* crystal frequency in Hz */ +#define EFI_W 0 /* system clock parameters */ +#define EFI_X 1 +#define EFI_Y 0x38 +#define SYS_CLOCK (XTAL*4.0*(EFI_Y+1)*(1 << (2*EFI_W+EFI_X))) +#define SCI_BAUD 19200 /* RS232 Baud Rate */ + + +/* macros/functions */ +static void reboot(void) __attribute__ ((noreturn)); +__inline__ static void reboot() {asm("trap #15");} + +#endif /* _EFI332_H_ */ diff --git a/c/src/lib/libbsp/m68k/efi332/spurious/spinit.c b/c/src/lib/libbsp/m68k/efi332/spurious/spinit.c new file mode 100644 index 0000000000..3370cb0e30 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/spurious/spinit.c @@ -0,0 +1,85 @@ +/* Spurious_driver + * + * This routine installs spurious interrupt handlers for the efi332. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993. + * On-Line Applications Research Corporation (OAR). + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +const char * const _Spurious_Error_[] = {"Reset","Bus Error","Address Error", + "Illegal Instruction","Zero Division","CHK, CHK2 Instruction", + "TRAPcc, TRAPV Instruction","Privilege Violation","Trace", + "Line 1010 Emulation","Line 1111 Emulation","Hardware Breakpoint", + "Coprocessor Protocal Violation", + "Format Error ans Uninitialized Interrupt","Unassigned", + "Spurious Interrupt","AVec1","AVec2","AVec3","AVec4","AVec5","AVec6", + "AVec7","Trap Instruction","Debug","Reboot","Reserved Coprocessor", + "Reserved Unassigned","User Defined"}; + +rtems_isr Spurious_Isr( + rtems_vector_number vector +) +{ + int sp = 0; + const char * const VectDescrip[] = { + _Spurious_Error_[0], _Spurious_Error_[0], _Spurious_Error_[1], + _Spurious_Error_[2], _Spurious_Error_[3], _Spurious_Error_[4], + _Spurious_Error_[5], _Spurious_Error_[6], _Spurious_Error_[7], + _Spurious_Error_[8], _Spurious_Error_[9], _Spurious_Error_[10], + _Spurious_Error_[11], _Spurious_Error_[12], _Spurious_Error_[13], + _Spurious_Error_[13], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[14], _Spurious_Error_[14], _Spurious_Error_[14], + _Spurious_Error_[15], _Spurious_Error_[16], _Spurious_Error_[17], + _Spurious_Error_[18], _Spurious_Error_[19], _Spurious_Error_[20], + _Spurious_Error_[21], _Spurious_Error_[22], _Spurious_Error_[23], + _Spurious_Error_[24], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[23], + _Spurious_Error_[23], _Spurious_Error_[23], _Spurious_Error_[25], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[26], + _Spurious_Error_[26], _Spurious_Error_[26], _Spurious_Error_[27], + _Spurious_Error_[27], _Spurious_Error_[27], _Spurious_Error_[27], + _Spurious_Error_[27], _Spurious_Error_[28]}; + + asm volatile ( "movea.l %%sp,%0 " : "=a" (sp) : "0" (sp) ); + + _CPU_ISR_Set_level( 7 ); + _UART_flush(); + + RAW_PUTS("\n\rRTEMS: Spurious interrupt: "); + RAW_PUTS((char *)VectDescrip[( (vector>64) ? 64 : vector )]); + RAW_PUTS("\n\rRTEMS: Vector: "); + RAW_PUTI(vector); + RAW_PUTS(" sp: "); + RAW_PUTI(sp); + RAW_PUTS("\n\r"); + + bsp_cleanup(); + + for(;;); +} + +void Spurious_Initialize(void) +{ + rtems_vector_number vector; + + for ( vector = 0x0 ; vector <= 0xFF ; vector++ ) + (void) set_vector( Spurious_Isr, vector, 1 ); +} diff --git a/c/src/lib/libbsp/m68k/efi332/startup/bspclean.c b/c/src/lib/libbsp/m68k/efi332/startup/bspclean.c new file mode 100644 index 0000000000..34a57b6b68 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/startup/bspclean.c @@ -0,0 +1,28 @@ +/* bsp_cleanup() + * + * This routine cleans up in the sense that it places the board + * in a safe state and flushes the I/O buffers before exiting. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include + +void bsp_cleanup(void) +{ + /* interrupt driven stdio must be flushed */ + _CPU_ISR_Set_level( 7 ); + _UART_flush(); +} diff --git a/c/src/lib/libbsp/m68k/efi332/startup/bspstart.c b/c/src/lib/libbsp/m68k/efi332/startup/bspstart.c new file mode 100644 index 0000000000..6a7830bcfe --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/startup/bspstart.c @@ -0,0 +1,220 @@ +#define STACK_CHECKER_ON +/* bsp_start() + * + * This routine starts the application. It includes application, + * board, and monitor specific initialization and configuration. + * The generic CPU dependent initialization has been performed + * before this routine is invoked. + * + * INPUT: NONE + * + * OUTPUT: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include +#include + +#include +#include + +#ifdef STACK_CHECKER_ON +#include +#endif + +/* + * The original table from the application and our copy of it with + * some changes. + */ + +extern rtems_configuration_table Configuration; +rtems_configuration_table BSP_Configuration; + +rtems_cpu_table Cpu_table; + +char *rtems_progname; + +/* Initialize whatever libc we are using + * called from postdriver hook + */ + +void bsp_libc_init() +{ + extern int end; + rtems_unsigned32 heap_start; + + heap_start = (rtems_unsigned32) &end; + if (heap_start & (CPU_ALIGNMENT-1)) + heap_start = (heap_start + CPU_ALIGNMENT) & ~(CPU_ALIGNMENT-1); + + RTEMS_Malloc_Initialize((void *) heap_start, 64 * 1024, 0); + + /* + * Init the RTEMS libio facility to provide UNIX-like system + * calls for use by newlib (ie: provide __open, __close, etc) + * Uses malloc() to get area for the iops, so must be after malloc init + */ + + rtems_libio_init(); + + /* + * Set up for the libc handling. + */ + + if (BSP_Configuration.ticks_per_timeslice > 0) + libc_init(1); /* reentrant if possible */ + else + libc_init(0); /* non-reentrant */ +} + +/* + * Function: bsp_pretasking_hook + * Created: 95/03/10 + * + * Description: + * BSP pretasking hook. Called just before drivers are initialized. + * Used to setup libc and install any BSP extensions. + * + * NOTES: + * Must not use libc (to do io) from here, since drivers are + * not yet initialized. + * + */ + +void +bsp_pretasking_hook(void) +{ + bsp_libc_init(); + +#ifdef STACK_CHECKER_ON + /* + * Initialize the stack bounds checker + * We can either turn it on here or from the app. + */ + + Stack_check_Initialize(); +#endif + +#ifdef RTEMS_DEBUG + rtems_debug_enable( RTEMS_DEBUG_ALL_MASK ); +#endif +} + + +/* + * After drivers are setup, register some "filenames" + * and open stdin, stdout, stderr files + * + * Newlib will automatically associate the files with these + * (it hardcodes the numbers) + */ + +void +bsp_postdriver_hook(void) +{ + int stdin_fd, stdout_fd, stderr_fd; + + if ((stdin_fd = __open("/dev/console", O_RDONLY, 0)) == -1) + rtems_fatal_error_occurred('STD0'); + + if ((stdout_fd = __open("/dev/console", O_WRONLY, 0)) == -1) + rtems_fatal_error_occurred('STD1'); + + if ((stderr_fd = __open("/dev/console", O_WRONLY, 0)) == -1) + rtems_fatal_error_occurred('STD2'); + + if ((stdin_fd != 0) || (stdout_fd != 1) || (stderr_fd != 2)) + rtems_fatal_error_occurred('STIO'); +} + +int main( + int argc, + char **argv, + char **environp +) +{ + void *vbr; + + /* + * we only use a hook to get the C library initialized. + */ + + Cpu_table.pretasking_hook = bsp_pretasking_hook; + + Cpu_table.predriver_hook = NULL; + + Cpu_table.postdriver_hook = bsp_postdriver_hook; + + Cpu_table.idle_task = NULL; /* do not override system IDLE task */ + + Cpu_table.do_zero_of_workspace = TRUE; + + m68k_get_vbr( vbr ); + Cpu_table.interrupt_vector_table = vbr; + + Cpu_table.interrupt_stack_size = 4096; + + Cpu_table.extra_system_initialization_stack = 0; + + /* + * Copy the table + */ + + BSP_Configuration = Configuration; + + BSP_Configuration.work_space_start = (void *) + (RAM_END - BSP_Configuration.work_space_size); + + if ((unsigned int)BSP_Configuration.work_space_start < + (unsigned int)((stack_start + stack_size) & 0xffffffc0) ) { + /* rtems_fatal_error_occurred can not be used before initalization */ + RAW_PUTS("\n\rRTEMS: Out of memory.\n\r"); + RAW_PUTS("RTEMS: Check RAM_END and the size of the work space.\n\r"); + goto exit; + } + + /* + * Add 1 region for Malloc in libc_low + */ + + BSP_Configuration.maximum_regions++; + + /* + * Add 1 extension for newlib libc + */ + +#ifdef RTEMS_NEWLIB + BSP_Configuration.maximum_extensions++; +#endif + + /* + * Add another extension if using the stack checker + */ + +#ifdef STACK_CHECKER_ON + BSP_Configuration.maximum_extensions++; +#endif + + rtems_initialize_executive( &BSP_Configuration, &Cpu_table ); + /* does not return */ + + /* Clock_exit is done as an atexit() function */ + +exit: + /* configure peripherals for safe exit */ + bsp_cleanup(); + + /* return like a "normal" subroutine to the monitor */ + return 0; +} + diff --git a/c/src/lib/libbsp/m68k/efi332/startup/linkcmds b/c/src/lib/libbsp/m68k/efi332/startup/linkcmds new file mode 100644 index 0000000000..37d1eb5667 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/startup/linkcmds @@ -0,0 +1,100 @@ +/* linkcmds + * + * $Id$ + */ + +OUTPUT_ARCH(m68k) +__DYNAMIC = 0; + +/* + * The memory map looks like this: + * +--------------------+ <- low memory + * | .text | + * | etext | + * | ctor list | the ctor and dtor lists are for + * | dtor list | C++ support + * | _endtext | + * +--------------------+ + * | .data | initialized data goes here + * | _sdata | + * | _edata | + * +--------------------+ + * | .bss | + * | __bss_start | start of bss, cleared by crt0 + * | _end | start of heap, used by sbrk() + * +--------------------+ + * | heap space | + * | _ENDHEAP | + * | stack space | + * | __stack | top of stack + * +--------------------+ <- high memory + */ + +MEMORY +{ + ram : ORIGIN = 0x80000, LENGTH = 256K +} + +_copy_data_from_rom = 0; + +/* + * stick everything in ram (of course) + */ +SECTIONS +{ + .text : + { + CREATE_OBJECT_SYMBOLS + text_start = .; + _text_start = .; + *(.text) + etext = ALIGN(0x10); + _etext = .; + __CTOR_LIST__ = .; + LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2) + *(.ctors) + LONG(0) + __CTOR_END__ = .; + __DTOR_LIST__ = .; + LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2) + *(.dtors) + LONG(0) + __DTOR_END__ = .; + *(.lit) + *(.shdata) + _endtext = .; + } > ram + .data : + { + data_start = .; + _data_start = .; + _sdata = . ; + *(.data) + CONSTRUCTORS + edata = ALIGN(0x10); + _edata = .; + } > ram + .shbss : + { + *(.shbss) + } > ram + .bss : + { + __bss_start = ALIGN(0x8); + bss_start = .; + _bss_start = .; + *(.bss) + *(COMMON) + end = .; + _end = ALIGN(0x8); + __end = ALIGN(0x8); + } > ram + .stab . (NOLOAD) : + { + [ .stab ] + } + .stabstr . (NOLOAD) : + { + [ .stabstr ] + } +} diff --git a/c/src/lib/libbsp/m68k/efi332/timer/timer.c b/c/src/lib/libbsp/m68k/efi332/timer/timer.c new file mode 100644 index 0000000000..7a9b1b6267 --- /dev/null +++ b/c/src/lib/libbsp/m68k/efi332/timer/timer.c @@ -0,0 +1,84 @@ +/* Timer_init() + * + * This routine initializes a timer in efi68k's DP8570A TCP + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * NOTE: It is important that the timer start/stop overhead be + * determined when porting or modifying this code. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + + +#include + +rtems_boolean Timer_driver_Find_average_overhead; + +extern rtems_isr Clock_isr(); + +void Timer_initialize( void ) +{ +} + +/* + * The following controls the behavior of Read_timer(). + * + * FIND_AVG_OVERHEAD * instructs the routine to return the "raw" count. + * + * AVG_OVEREHAD is the overhead for starting and stopping the timer. It + * is usually deducted from the number returned. + * + * LEAST_VALID is the lowest number this routine should trust. Numbers + * below this are "noise" and zero is returned. + */ + +#define AVG_OVERHEAD 0 /* It typically takes X.X microseconds */ + /* (Y countdowns) to start/stop the timer. */ + /* This value is in microseconds. */ +#define LEAST_VALID 1 /* Don't trust a clicks value lower than this */ + +/* + * Return timer value in 1/2-microsecond units + */ +int Read_timer( void ) +{ + rtems_unsigned32 total; + total = 0; + + if ( Timer_driver_Find_average_overhead == 1 ) + return total; /* in XXX microsecond units */ + + if ( total < LEAST_VALID ) + return 0; /* below timer resolution */ + + return (total - AVG_OVERHEAD); +} + + +/* + * Empty function call used in loops to measure basic cost of looping + * in Timing Test Suite. + */ + +rtems_status_code Empty_function(void) +{ + return RTEMS_SUCCESSFUL; +} + +void Set_find_average_overhead( + rtems_boolean find_flag +) +{ + Timer_driver_Find_average_overhead = find_flag; +} -- cgit v1.2.3