From c236082873cb4a2fd42af4ca0868106e1dd65422 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 30 Jul 2013 15:54:53 +0200 Subject: smp: Provide cache optimized Per_CPU_Control Delete _Per_CPU_Information_p. --- c/src/lib/libbsp/i386/shared/irq/irq_asm.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'c/src/lib/libbsp/i386') diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S index 2b16234622..bbc1afb5d6 100644 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -99,9 +99,10 @@ SYM (_ISR_Handler): .check_stack_switch: movl esp, ebp /* ebp = previous stack pointer */ #if defined(RTEMS_SMP) && defined(BSP_HAS_SMP) - movl $SYM(_Per_CPU_Information_p), ebx call SYM(_CPU_SMP_Get_current_processor) - mov (ebx,eax,4), ebx + sall $PER_CPU_CONTROL_SIZE_LOG2, eax + addl $SYM(_Per_CPU_Information), eax + movl eax, ebx pushl ecx call SYM(_ISR_SMP_Enter) popl ecx -- cgit v1.2.3