From 01629105c2817a59a4f1f05039593f211cf5ddaa Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Mon, 14 Dec 1998 23:15:38 +0000 Subject: Patch from Ralf Corsepius to rename all .s files to .S in conformance with GNU conventions. This is a minor step along the way to supporting automake. --- c/src/lib/libbsp/i386/force386/start/Makefile.in | 6 +- c/src/lib/libbsp/i386/force386/start/start.S | 267 +++++++++++++ c/src/lib/libbsp/i386/force386/start/start.s | 267 ------------- c/src/lib/libbsp/i386/force386/startup/Makefile.in | 6 +- c/src/lib/libbsp/i386/force386/startup/ldsegs.S | 86 ++++ c/src/lib/libbsp/i386/force386/startup/ldsegs.s | 86 ---- c/src/lib/libbsp/i386/force386/timer/Makefile.in | 6 +- c/src/lib/libbsp/i386/force386/timer/timerisr.S | 34 ++ c/src/lib/libbsp/i386/force386/timer/timerisr.s | 34 -- c/src/lib/libbsp/i386/force386/wrapup/Makefile.in | 15 +- c/src/lib/libbsp/i386/go32/timer/Makefile.in | 6 +- c/src/lib/libbsp/i386/go32/timer/timerisr.S | 41 ++ c/src/lib/libbsp/i386/go32/timer/timerisr.s | 41 -- c/src/lib/libbsp/i386/i386ex/clock/Makefile.in | 6 +- c/src/lib/libbsp/i386/i386ex/console/Makefile.in | 6 +- c/src/lib/libbsp/i386/i386ex/start/Makefile.in | 6 +- c/src/lib/libbsp/i386/i386ex/start/start.S | 437 +++++++++++++++++++++ c/src/lib/libbsp/i386/i386ex/start/start.s | 437 --------------------- c/src/lib/libbsp/i386/i386ex/startup/Makefile.in | 6 +- c/src/lib/libbsp/i386/i386ex/timer/Makefile.in | 6 +- c/src/lib/libbsp/i386/i386ex/timer/timerisr.S | 40 ++ c/src/lib/libbsp/i386/i386ex/timer/timerisr.s | 40 -- c/src/lib/libbsp/i386/pc386/console/Makefile.in | 6 +- c/src/lib/libbsp/i386/pc386/console/videoAsm.S | 51 +++ c/src/lib/libbsp/i386/pc386/console/videoAsm.s | 51 --- c/src/lib/libbsp/i386/pc386/start/start.S | 202 ++++++++++ c/src/lib/libbsp/i386/pc386/start/start.s | 202 ---------- c/src/lib/libbsp/i386/pc386/start/start16.S | 183 +++++++++ c/src/lib/libbsp/i386/pc386/start/start16.s | 183 --------- c/src/lib/libbsp/i386/pc386/startup/Makefile.in | 6 +- c/src/lib/libbsp/i386/pc386/startup/ldsegs.S | 222 +++++++++++ c/src/lib/libbsp/i386/pc386/startup/ldsegs.s | 222 ----------- c/src/lib/libbsp/i386/pc386/timer/Makefile.in | 6 +- c/src/lib/libbsp/i386/pc386/timer/timerisr.S | 61 +++ c/src/lib/libbsp/i386/pc386/timer/timerisr.s | 61 --- c/src/lib/libbsp/i386/shared/irq/irq_asm.S | 250 ++++++++++++ c/src/lib/libbsp/i386/shared/irq/irq_asm.s | 250 ------------ 37 files changed, 1920 insertions(+), 1915 deletions(-) create mode 100644 c/src/lib/libbsp/i386/force386/start/start.S delete mode 100644 c/src/lib/libbsp/i386/force386/start/start.s create mode 100644 c/src/lib/libbsp/i386/force386/startup/ldsegs.S delete mode 100644 c/src/lib/libbsp/i386/force386/startup/ldsegs.s create mode 100644 c/src/lib/libbsp/i386/force386/timer/timerisr.S delete mode 100644 c/src/lib/libbsp/i386/force386/timer/timerisr.s create mode 100644 c/src/lib/libbsp/i386/go32/timer/timerisr.S delete mode 100644 c/src/lib/libbsp/i386/go32/timer/timerisr.s create mode 100644 c/src/lib/libbsp/i386/i386ex/start/start.S delete mode 100644 c/src/lib/libbsp/i386/i386ex/start/start.s create mode 100644 c/src/lib/libbsp/i386/i386ex/timer/timerisr.S delete mode 100644 c/src/lib/libbsp/i386/i386ex/timer/timerisr.s create mode 100644 c/src/lib/libbsp/i386/pc386/console/videoAsm.S delete mode 100644 c/src/lib/libbsp/i386/pc386/console/videoAsm.s create mode 100644 c/src/lib/libbsp/i386/pc386/start/start.S delete mode 100644 c/src/lib/libbsp/i386/pc386/start/start.s create mode 100644 c/src/lib/libbsp/i386/pc386/start/start16.S delete mode 100644 c/src/lib/libbsp/i386/pc386/start/start16.s create mode 100644 c/src/lib/libbsp/i386/pc386/startup/ldsegs.S delete mode 100644 c/src/lib/libbsp/i386/pc386/startup/ldsegs.s create mode 100644 c/src/lib/libbsp/i386/pc386/timer/timerisr.S delete mode 100644 c/src/lib/libbsp/i386/pc386/timer/timerisr.s create mode 100644 c/src/lib/libbsp/i386/shared/irq/irq_asm.S delete mode 100644 c/src/lib/libbsp/i386/shared/irq/irq_asm.s (limited to 'c/src/lib/libbsp/i386') diff --git a/c/src/lib/libbsp/i386/force386/start/Makefile.in b/c/src/lib/libbsp/i386/force386/start/Makefile.in index 388e25b482..02ce42102d 100644 --- a/c/src/lib/libbsp/i386/force386/start/Makefile.in +++ b/c/src/lib/libbsp/i386/force386/start/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=start -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/force386/start/start.S b/c/src/lib/libbsp/i386/force386/start/start.S new file mode 100644 index 0000000000..c1d0ffd099 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/start/start.S @@ -0,0 +1,267 @@ +/* start.s + * + * This file contains the entry point for the application. + * The name of this entry point is compiler dependent. + * It jumps to the BSP which is responsible for performing + * all initialization. + * + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + +/* + * A Descriptor table register has the following format + */ + +.set DTR_LIMIT, 0 # offset of two byte limit +.set DTR_BASE, 2 # offset of four byte base address +.set DTR_SIZE, 6 # size of DTR register + + BEGIN_DATA + EXTERN (Do_Load_IDT) + EXTERN (Do_Load_GDT) + END_DATA + + BEGIN_CODE + + PUBLIC (start) # GNU default entry point + + EXTERN (boot_card) + EXTERN (load_segments) + EXTERN (exit) + +SYM (start): + nop + cli # DISABLE INTERRUPTS!!! +/* + * Load the segment registers + * + * NOTE: Upon return, gs will contain the segment descriptor for + * a segment which maps directly to all of physical memory. + */ + jmp SYM (_load_segments) # load board dependent segments + +/* + * Set up the stack + */ + + PUBLIC (_establish_stack) +SYM (_establish_stack): + + movl $end,eax # eax = end of bss/start of heap + addl $heap_size,eax # eax = end of heap + movl eax,stack_start # Save for brk() routine + addl $stack_size,eax # make room for stack + andl $0xffffffc0,eax # align it on 16 byte boundary + movl eax,esp # set stack pointer + movl eax,ebp # set base pointer +/* + * Zero out the BSS segment + */ +SYM (zero_bss): + cld # make direction flag count up + movl $ SYM (end),ecx # find end of .bss + movl $ SYM (_bss_start),edi # edi = beginning of .bss + subl edi,ecx # ecx = size of .bss in bytes + shrl ecx # size of .bss in longs + shrl ecx + xorl eax,eax # value to clear out memory + repne # while ecx != 0 + stosl # clear a long in the bss + +/* + * Copy the Global Descriptor Table to our space + */ + + sgdt SYM (_Original_GDTR) # save original GDT + movzwl SYM (_Original_GDTR)+DTR_LIMIT,ecx + /* size of GDT in bytes; limit is */ + /* 8192 entries * 8 bytes per */ + + /* + * make ds:esi point to the original GDT + */ + + movl SYM (_Original_GDTR)+DTR_BASE,esi + push ds # save ds + movw gs,ax + movw ax,ds + + /* + * make es:edi point to the new (our copy) GDT + */ + + movl $ SYM (_Global_descriptor_table),edi + + rep + movsb # copy the GDT (ds:esi -> es:edi) + + pop ds # restore ds + + /* + * Build and load new contents of GDTR + */ + movw SYM (_Original_GDTR)+DTR_LIMIT,ecx # set new limit + movw cx, SYM (_New_GDTR)+DTR_LIMIT + + push $ SYM (_Global_descriptor_table) + push es + call SYM (i386_Logical_to_physical) + addl $6,esp + movl eax, SYM (_New_GDTR)+DTR_BASE # set new base + + cmpb $0, SYM (_Do_Load_GDT) # Should the new GDT be loaded? + je SYM (no_gdt_load) # NO, then branch + lgdt SYM (_New_GDTR) # load the new GDT +SYM (no_gdt_load): + +/* + * Copy the Interrupt Descriptor Table to our space + */ + + sidt SYM (_Original_IDTR) # save original IDT + movzwl SYM (_Original_IDTR)+DTR_LIMIT,ecx + /* size of IDT in bytes; limit is */ + /* 256 entries * 8 bytes per */ + + + /* + * make ds:esi point to the original IDT + */ + movl SYM (_Original_IDTR)+DTR_BASE,esi + + push ds # save ds + movw gs,ax + movw ax,ds + + /* + * make es:edi point to the new (our copy) IDT + */ + movl $ SYM (Interrupt_descriptor_table),edi + + rep + movsb # copy the IDT (ds:esi -> es:edi) + pop ds # restore ds + + /* + * Build and load new contents of IDTR + */ + movw SYM (_Original_IDTR+DTR_LIMIT),ecx # set new limit + movw cx,SYM (_New_IDTR)+DTR_LIMIT + + push $ SYM (Interrupt_descriptor_table) + push es + call SYM (i386_Logical_to_physical) + addl $6,esp + movl eax, SYM (_New_IDTR)+DTR_BASE # set new base + + cmpb $0, SYM (_Do_Load_IDT) # Should the new IDT be loaded? + je SYM (no_idt_load) # NO, then branch + lidt SYM (_New_IDTR) # load the new IDT +SYM (no_idt_load): + +/* + * Initialize the i387. + * + * Using the NO WAIT form of the instruction insures that + * if it is not present the board will not lock up or get an + * exception. + */ + + fninit # MUST USE NO-WAIT FORM + +/* + * Transfer control to User's Board Support Package + */ + pushl $0 # environp + pushl $0 # argv + pushl $0 # argc + call SYM (boot_card) + addl $12,esp + +/* + * Clean up + */ + + EXTERN (return_to_monitor) + + PUBLIC (Bsp_cleanup) +SYM (Bsp_cleanup): + cmpb $0, SYM (_Do_Load_IDT) # Was the new IDT loaded? + je SYM (no_idt_restore) # NO, then branch + lidt SYM (_Original_IDTR) # restore the new IDT +SYM (no_idt_restore): + + cmpb $0, SYM (_Do_Load_GDT) # Was the new GDT loaded? + je SYM (no_gdt_restore) # NO, then branch + lgdt SYM (_Original_GDTR) # restore the new GDT +SYM (no_gdt_restore): + jmp SYM (_return_to_monitor) + +END_CODE + +BEGIN_DATA + + .align 2 + PUBLIC (start_frame) +SYM (start_frame): + .long 0 + + PUBLIC (stack_start) +SYM (stack_start): + .long 0 + +END_DATA + +BEGIN_BSS + + PUBLIC(heap_size) + .set heap_size,0x2000 + + PUBLIC(stack_size) + .set stack_size,0x1000 + + PUBLIC (Interrupt_descriptor_table) +SYM (Interrupt_descriptor_table): + .space 256*8 + + PUBLIC (_Original_IDTR) +SYM (_Original_IDTR): + .space DTR_SIZE + + PUBLIC (_New_IDTR) +SYM (_New_IDTR): + .space DTR_SIZE + + PUBLIC (_Global_descriptor_table) +SYM (_Global_descriptor_table): + .space 8192*8 + + PUBLIC (_Original_GDTR) +SYM (_Original_GDTR): + .space DTR_SIZE + + PUBLIC (_New_GDTR) +SYM (_New_GDTR): + .space DTR_SIZE + + PUBLIC (_Physical_base_of_ds) +SYM (_Physical_base_of_ds): + .space 4 + + PUBLIC (_Physical_base_of_cs) +SYM (_Physical_base_of_cs): + .space 4 + +END_BSS +END diff --git a/c/src/lib/libbsp/i386/force386/start/start.s b/c/src/lib/libbsp/i386/force386/start/start.s deleted file mode 100644 index c1d0ffd099..0000000000 --- a/c/src/lib/libbsp/i386/force386/start/start.s +++ /dev/null @@ -1,267 +0,0 @@ -/* start.s - * - * This file contains the entry point for the application. - * The name of this entry point is compiler dependent. - * It jumps to the BSP which is responsible for performing - * all initialization. - * - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" - -/* - * A Descriptor table register has the following format - */ - -.set DTR_LIMIT, 0 # offset of two byte limit -.set DTR_BASE, 2 # offset of four byte base address -.set DTR_SIZE, 6 # size of DTR register - - BEGIN_DATA - EXTERN (Do_Load_IDT) - EXTERN (Do_Load_GDT) - END_DATA - - BEGIN_CODE - - PUBLIC (start) # GNU default entry point - - EXTERN (boot_card) - EXTERN (load_segments) - EXTERN (exit) - -SYM (start): - nop - cli # DISABLE INTERRUPTS!!! -/* - * Load the segment registers - * - * NOTE: Upon return, gs will contain the segment descriptor for - * a segment which maps directly to all of physical memory. - */ - jmp SYM (_load_segments) # load board dependent segments - -/* - * Set up the stack - */ - - PUBLIC (_establish_stack) -SYM (_establish_stack): - - movl $end,eax # eax = end of bss/start of heap - addl $heap_size,eax # eax = end of heap - movl eax,stack_start # Save for brk() routine - addl $stack_size,eax # make room for stack - andl $0xffffffc0,eax # align it on 16 byte boundary - movl eax,esp # set stack pointer - movl eax,ebp # set base pointer -/* - * Zero out the BSS segment - */ -SYM (zero_bss): - cld # make direction flag count up - movl $ SYM (end),ecx # find end of .bss - movl $ SYM (_bss_start),edi # edi = beginning of .bss - subl edi,ecx # ecx = size of .bss in bytes - shrl ecx # size of .bss in longs - shrl ecx - xorl eax,eax # value to clear out memory - repne # while ecx != 0 - stosl # clear a long in the bss - -/* - * Copy the Global Descriptor Table to our space - */ - - sgdt SYM (_Original_GDTR) # save original GDT - movzwl SYM (_Original_GDTR)+DTR_LIMIT,ecx - /* size of GDT in bytes; limit is */ - /* 8192 entries * 8 bytes per */ - - /* - * make ds:esi point to the original GDT - */ - - movl SYM (_Original_GDTR)+DTR_BASE,esi - push ds # save ds - movw gs,ax - movw ax,ds - - /* - * make es:edi point to the new (our copy) GDT - */ - - movl $ SYM (_Global_descriptor_table),edi - - rep - movsb # copy the GDT (ds:esi -> es:edi) - - pop ds # restore ds - - /* - * Build and load new contents of GDTR - */ - movw SYM (_Original_GDTR)+DTR_LIMIT,ecx # set new limit - movw cx, SYM (_New_GDTR)+DTR_LIMIT - - push $ SYM (_Global_descriptor_table) - push es - call SYM (i386_Logical_to_physical) - addl $6,esp - movl eax, SYM (_New_GDTR)+DTR_BASE # set new base - - cmpb $0, SYM (_Do_Load_GDT) # Should the new GDT be loaded? - je SYM (no_gdt_load) # NO, then branch - lgdt SYM (_New_GDTR) # load the new GDT -SYM (no_gdt_load): - -/* - * Copy the Interrupt Descriptor Table to our space - */ - - sidt SYM (_Original_IDTR) # save original IDT - movzwl SYM (_Original_IDTR)+DTR_LIMIT,ecx - /* size of IDT in bytes; limit is */ - /* 256 entries * 8 bytes per */ - - - /* - * make ds:esi point to the original IDT - */ - movl SYM (_Original_IDTR)+DTR_BASE,esi - - push ds # save ds - movw gs,ax - movw ax,ds - - /* - * make es:edi point to the new (our copy) IDT - */ - movl $ SYM (Interrupt_descriptor_table),edi - - rep - movsb # copy the IDT (ds:esi -> es:edi) - pop ds # restore ds - - /* - * Build and load new contents of IDTR - */ - movw SYM (_Original_IDTR+DTR_LIMIT),ecx # set new limit - movw cx,SYM (_New_IDTR)+DTR_LIMIT - - push $ SYM (Interrupt_descriptor_table) - push es - call SYM (i386_Logical_to_physical) - addl $6,esp - movl eax, SYM (_New_IDTR)+DTR_BASE # set new base - - cmpb $0, SYM (_Do_Load_IDT) # Should the new IDT be loaded? - je SYM (no_idt_load) # NO, then branch - lidt SYM (_New_IDTR) # load the new IDT -SYM (no_idt_load): - -/* - * Initialize the i387. - * - * Using the NO WAIT form of the instruction insures that - * if it is not present the board will not lock up or get an - * exception. - */ - - fninit # MUST USE NO-WAIT FORM - -/* - * Transfer control to User's Board Support Package - */ - pushl $0 # environp - pushl $0 # argv - pushl $0 # argc - call SYM (boot_card) - addl $12,esp - -/* - * Clean up - */ - - EXTERN (return_to_monitor) - - PUBLIC (Bsp_cleanup) -SYM (Bsp_cleanup): - cmpb $0, SYM (_Do_Load_IDT) # Was the new IDT loaded? - je SYM (no_idt_restore) # NO, then branch - lidt SYM (_Original_IDTR) # restore the new IDT -SYM (no_idt_restore): - - cmpb $0, SYM (_Do_Load_GDT) # Was the new GDT loaded? - je SYM (no_gdt_restore) # NO, then branch - lgdt SYM (_Original_GDTR) # restore the new GDT -SYM (no_gdt_restore): - jmp SYM (_return_to_monitor) - -END_CODE - -BEGIN_DATA - - .align 2 - PUBLIC (start_frame) -SYM (start_frame): - .long 0 - - PUBLIC (stack_start) -SYM (stack_start): - .long 0 - -END_DATA - -BEGIN_BSS - - PUBLIC(heap_size) - .set heap_size,0x2000 - - PUBLIC(stack_size) - .set stack_size,0x1000 - - PUBLIC (Interrupt_descriptor_table) -SYM (Interrupt_descriptor_table): - .space 256*8 - - PUBLIC (_Original_IDTR) -SYM (_Original_IDTR): - .space DTR_SIZE - - PUBLIC (_New_IDTR) -SYM (_New_IDTR): - .space DTR_SIZE - - PUBLIC (_Global_descriptor_table) -SYM (_Global_descriptor_table): - .space 8192*8 - - PUBLIC (_Original_GDTR) -SYM (_Original_GDTR): - .space DTR_SIZE - - PUBLIC (_New_GDTR) -SYM (_New_GDTR): - .space DTR_SIZE - - PUBLIC (_Physical_base_of_ds) -SYM (_Physical_base_of_ds): - .space 4 - - PUBLIC (_Physical_base_of_cs) -SYM (_Physical_base_of_cs): - .space 4 - -END_BSS -END diff --git a/c/src/lib/libbsp/i386/force386/startup/Makefile.in b/c/src/lib/libbsp/i386/force386/startup/Makefile.in index bda5bb88da..100f7c7385 100644 --- a/c/src/lib/libbsp/i386/force386/startup/Makefile.in +++ b/c/src/lib/libbsp/i386/force386/startup/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=ldsegs -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(srcdir)/linkcmds $(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/force386/startup/ldsegs.S b/c/src/lib/libbsp/i386/force386/startup/ldsegs.S new file mode 100644 index 0000000000..7689a7693f --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/startup/ldsegs.S @@ -0,0 +1,86 @@ +/* _load_segments + * + * This file assists the board independent startup code by + * loading the proper segment register values. The values + * loaded are board dependent. + * + * NOTE: No stack has been established when this routine + * is invoked. It returns by jumping back to bspentry. + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + +BEGIN_CODE + +/* + * FORCEBUG loads us into a virtual address space which + * really starts at PHYSICAL_ADDRESS_BASE. + */ + +.set PHYSICAL_ADDRESS_BASE, 0x00002000 + +/* + * At reset time, FORCEBUG normally has the segment selectors preloaded. + * If a human resets the instruction pointer, this will not have occurred. + * However, no guarantee can be made of the other registers if cs:ip was + * modified to restart the program. Because of this, the BSP reloads all + * segment registers (except cs) with the values they have following + * a reset. + */ + + +.set RESET_SS, 0x40 # initial value of stack segment register +.set RESET_DS, 0x40 # initial value of data segment register +.set RESET_ES, 0x40 # initial value of extra segment register +.set RESET_FS, 0x40 # initial value of "f" segment register +.set RESET_GS, 0x30 # initial value of "g" segment register + + +#define LOAD_SEGMENTS(_value,_segment) \ + movw $ ## _value, ax ; \ + movw ax, _segment + + EXTERN (establish_stack) + + PUBLIC (_load_segments) +SYM (_load_segments): + LOAD_SEGMENTS( RESET_SS, ss ) + LOAD_SEGMENTS( RESET_DS, ds ) + LOAD_SEGMENTS( RESET_ES, es ) + LOAD_SEGMENTS( RESET_FS, fs ) + LOAD_SEGMENTS( RESET_GS, gs ) + + jmp SYM (_establish_stack) # return to the bsp entry code + + PUBLIC (_return_to_monitor) +SYM (_return_to_monitor): + + call SYM (Clock_exit) + movb $0,al + int $0x20 # restart FORCEbug + jmp SYM (start) # FORCEbug does not reset PC + +END_CODE + +BEGIN_DATA + + PUBLIC (_Do_Load_IDT) +SYM (_Do_Load_IDT): + .byte 1 + + PUBLIC (_Do_Load_GDT) +SYM (_Do_Load_GDT): + .byte 0 + +END_DATA +END diff --git a/c/src/lib/libbsp/i386/force386/startup/ldsegs.s b/c/src/lib/libbsp/i386/force386/startup/ldsegs.s deleted file mode 100644 index 7689a7693f..0000000000 --- a/c/src/lib/libbsp/i386/force386/startup/ldsegs.s +++ /dev/null @@ -1,86 +0,0 @@ -/* _load_segments - * - * This file assists the board independent startup code by - * loading the proper segment register values. The values - * loaded are board dependent. - * - * NOTE: No stack has been established when this routine - * is invoked. It returns by jumping back to bspentry. - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" - -BEGIN_CODE - -/* - * FORCEBUG loads us into a virtual address space which - * really starts at PHYSICAL_ADDRESS_BASE. - */ - -.set PHYSICAL_ADDRESS_BASE, 0x00002000 - -/* - * At reset time, FORCEBUG normally has the segment selectors preloaded. - * If a human resets the instruction pointer, this will not have occurred. - * However, no guarantee can be made of the other registers if cs:ip was - * modified to restart the program. Because of this, the BSP reloads all - * segment registers (except cs) with the values they have following - * a reset. - */ - - -.set RESET_SS, 0x40 # initial value of stack segment register -.set RESET_DS, 0x40 # initial value of data segment register -.set RESET_ES, 0x40 # initial value of extra segment register -.set RESET_FS, 0x40 # initial value of "f" segment register -.set RESET_GS, 0x30 # initial value of "g" segment register - - -#define LOAD_SEGMENTS(_value,_segment) \ - movw $ ## _value, ax ; \ - movw ax, _segment - - EXTERN (establish_stack) - - PUBLIC (_load_segments) -SYM (_load_segments): - LOAD_SEGMENTS( RESET_SS, ss ) - LOAD_SEGMENTS( RESET_DS, ds ) - LOAD_SEGMENTS( RESET_ES, es ) - LOAD_SEGMENTS( RESET_FS, fs ) - LOAD_SEGMENTS( RESET_GS, gs ) - - jmp SYM (_establish_stack) # return to the bsp entry code - - PUBLIC (_return_to_monitor) -SYM (_return_to_monitor): - - call SYM (Clock_exit) - movb $0,al - int $0x20 # restart FORCEbug - jmp SYM (start) # FORCEbug does not reset PC - -END_CODE - -BEGIN_DATA - - PUBLIC (_Do_Load_IDT) -SYM (_Do_Load_IDT): - .byte 1 - - PUBLIC (_Do_Load_GDT) -SYM (_Do_Load_GDT): - .byte 0 - -END_DATA -END diff --git a/c/src/lib/libbsp/i386/force386/timer/Makefile.in b/c/src/lib/libbsp/i386/force386/timer/Makefile.in index 24809cbed8..21ca9675e7 100644 --- a/c/src/lib/libbsp/i386/force386/timer/Makefile.in +++ b/c/src/lib/libbsp/i386/force386/timer/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=timerisr -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/force386/timer/timerisr.S b/c/src/lib/libbsp/i386/force386/timer/timerisr.S new file mode 100644 index 0000000000..3264248b05 --- /dev/null +++ b/c/src/lib/libbsp/i386/force386/timer/timerisr.S @@ -0,0 +1,34 @@ +/* timer_isr() + * + * This routine provides the ISR for the Z8036 timer on the MVME136 + * board. The timer is set up to generate an interrupt at maximum + * intervals. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + + BEGIN_CODE + + EXTERN (Ttimer_val) + + PUBLIC (timerisr) +SYM (timerisr): + addl $250, SYM (Ttimer_val) # another 250 microseconds + iret + +END_CODE +END diff --git a/c/src/lib/libbsp/i386/force386/timer/timerisr.s b/c/src/lib/libbsp/i386/force386/timer/timerisr.s deleted file mode 100644 index 3264248b05..0000000000 --- a/c/src/lib/libbsp/i386/force386/timer/timerisr.s +++ /dev/null @@ -1,34 +0,0 @@ -/* timer_isr() - * - * This routine provides the ISR for the Z8036 timer on the MVME136 - * board. The timer is set up to generate an interrupt at maximum - * intervals. - * - * Input parameters: NONE - * - * Output parameters: NONE - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" - - BEGIN_CODE - - EXTERN (Ttimer_val) - - PUBLIC (timerisr) -SYM (timerisr): - addl $250, SYM (Ttimer_val) # another 250 microseconds - iret - -END_CODE -END diff --git a/c/src/lib/libbsp/i386/force386/wrapup/Makefile.in b/c/src/lib/libbsp/i386/force386/wrapup/Makefile.in index 4dc4ea5208..aecc98b975 100644 --- a/c/src/lib/libbsp/i386/force386/wrapup/Makefile.in +++ b/c/src/lib/libbsp/i386/force386/wrapup/Makefile.in @@ -8,17 +8,22 @@ VPATH = @srcdir@ RTEMS_ROOT = @top_srcdir@ PROJECT_ROOT = @PROJECT_ROOT@ -BSP_PIECES=startup clock console shmsupp timer -GENERIC_PIECES=shmdr +BSP_PIECES=startup clock console timer +GENERIC_PIECES= + +include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg +include $(RTEMS_ROOT)/make/lib.cfg + +ifeq ($(HAS_MP),yes) +GENERIC_PIECES += shmdr +BSP_PIECES += shmsupp +endif # bummer; have to use $foreach since % pattern subst rules only replace 1x OBJS=$(foreach piece, $(BSP_PIECES), ../$(piece)/$(ARCH)/$(piece).rel) \ $(foreach piece, $(GENERIC_PIECES), ../../../$(piece)/$(ARCH)/$(piece).rel) LIB=$(ARCH)/libbsp.a -include $(RTEMS_ROOT)/make/custom/$(RTEMS_BSP).cfg -include $(RTEMS_ROOT)/make/lib.cfg - # # (OPTIONAL) Add local stuff here using += # diff --git a/c/src/lib/libbsp/i386/go32/timer/Makefile.in b/c/src/lib/libbsp/i386/go32/timer/Makefile.in index 2b32db0b00..939382f56f 100644 --- a/c/src/lib/libbsp/i386/go32/timer/Makefile.in +++ b/c/src/lib/libbsp/i386/go32/timer/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=timerisr -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/go32/timer/timerisr.S b/c/src/lib/libbsp/i386/go32/timer/timerisr.S new file mode 100644 index 0000000000..2e9ccf0dc7 --- /dev/null +++ b/c/src/lib/libbsp/i386/go32/timer/timerisr.S @@ -0,0 +1,41 @@ +/* timer_isr() + * + * This routine provides the ISR for the timer. The timer is set up + * to generate an interrupt at maximum intervals. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + + BEGIN_CODE + + EXTERN(_Ttimer_val) + + PUBLIC(timerisr) + +SYM (timerisr): + addl $1,_Ttimer_val # another tick + push edx + push eax + movw $0x20,dx + mov edx,eax + outb al,(dx) # touch interrupt controller + pop eax + pop edx + iret + +END_CODE +END diff --git a/c/src/lib/libbsp/i386/go32/timer/timerisr.s b/c/src/lib/libbsp/i386/go32/timer/timerisr.s deleted file mode 100644 index 2e9ccf0dc7..0000000000 --- a/c/src/lib/libbsp/i386/go32/timer/timerisr.s +++ /dev/null @@ -1,41 +0,0 @@ -/* timer_isr() - * - * This routine provides the ISR for the timer. The timer is set up - * to generate an interrupt at maximum intervals. - * - * Input parameters: NONE - * - * Output parameters: NONE - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" - - BEGIN_CODE - - EXTERN(_Ttimer_val) - - PUBLIC(timerisr) - -SYM (timerisr): - addl $1,_Ttimer_val # another tick - push edx - push eax - movw $0x20,dx - mov edx,eax - outb al,(dx) # touch interrupt controller - pop eax - pop edx - iret - -END_CODE -END diff --git a/c/src/lib/libbsp/i386/i386ex/clock/Makefile.in b/c/src/lib/libbsp/i386/i386ex/clock/Makefile.in index e40e10fb1a..fa1ee1bb31 100644 --- a/c/src/lib/libbsp/i386/i386ex/clock/Makefile.in +++ b/c/src/lib/libbsp/i386/i386ex/clock/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES= -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/i386ex/console/Makefile.in b/c/src/lib/libbsp/i386/i386ex/console/Makefile.in index e774529a2b..d1514c7109 100644 --- a/c/src/lib/libbsp/i386/i386ex/console/Makefile.in +++ b/c/src/lib/libbsp/i386/i386ex/console/Makefile.in @@ -19,10 +19,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES= -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/i386ex/start/Makefile.in b/c/src/lib/libbsp/i386/i386ex/start/Makefile.in index e5e5d1c9a0..2c6435a980 100644 --- a/c/src/lib/libbsp/i386/i386ex/start/Makefile.in +++ b/c/src/lib/libbsp/i386/i386ex/start/Makefile.in @@ -18,10 +18,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=start -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/i386ex/start/start.S b/c/src/lib/libbsp/i386/i386ex/start/start.S new file mode 100644 index 0000000000..543a300744 --- /dev/null +++ b/c/src/lib/libbsp/i386/i386ex/start/start.S @@ -0,0 +1,437 @@ +/* + * This file is the main boot and configuration file for the i386ex. It is + * solely responsible for initializing the internal register set to reflect + * the proper board configuration. This version is the "generic" i386ex + * startup: + * + * 1) 512K flask ROM @3f80000 + * 2) 1 Mb RAM @ 0x0 + * 3) Timer0 used as RTEMS clock ticker, 1 msec tick rate. + * 4) READY# is generated by CPU + * + * The file is a multi-section file, with sections as follows: + * 1) interrupt gates, in section "ints" + * 2) interrupt descriptor table, in section "idt" + * 3) global descriptor table, in section "gdt" + * 4) reset in section "reset" + * 5) and initial boot code in section " initial" + * + * Submitted by: + * + * Erik Ivanenko + * University of Toronto + * erik.ivanenko@utoronto.ca + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + + +changes: + SetExRegByte(ICW3S , 0x02 ) # MUST be 0x02 according to intel + SetExRegByte(ICW3M , 0x04 ) # IR2 is cascaded internally: was 0x02 => IR1 is cascaded + + */ + +#include "asm.h" +#include "macros.inc" +#include "80386ex.inc" + +/* + * NEW_GAS Needed for binutils 2.9.1.0.7 and higher + */ + + EXTERN (boot_card) /* exits to bspstart */ + EXTERN (stack_start) /* defined in startup/linkcmds */ + EXTERN (Clock_exit) + + PUBLIC (Interrupt_descriptor_table) + PUBLIC ( SYM(IDTR) ) + PUBLIC( SYM(_initInternalRegisters) ) + +BEGIN_DATA +SYM(IDTR): DESC3( SYM(Interrupt_descriptor_table), 0x07ff ); + +SYM(Interrupt_descriptor_table): /* Now in data section */ + .rept 256 + .word 0,0,0,0 + .endr + +END_DATA + +BEGIN_DATA + PUBLIC (_Global_descriptor_table) + +SYM(GDTR): DESC3( GDT_TABLE, 0x1f ); # one less than the size +SYM (_Global_descriptor_table): +SYM(GDT_TABLE): DESC2(0,0,0,0,0,0); +SYM(GDT_ALIAS): DESC2(32,0x1000,0x0,0x93,0,0x0); +SYM(GDT_CODE): DESC2(0xffff,0,0x0,0x9B,0xDF,0x00); +SYM(GDT_DATA): DESC2(0xffff,0,0x0,0x92,0xDF,0x00); # was CF +SYM(GDT_END): + +END_DATA + + +/* This section is the section that is used by the interrupt + descriptor table. It is used to provide the IDT with the + correct vector offsets. It is for symbol definition only. +*/ + + + .section .reset + + PUBLIC ( SYM(reset) ) +SYM(reset): + nop + cli + jmp SYM(_initInternalRegisters) /* different section in this file */ + .code32 /* in case this section moves */ + nop /* required by CHIP LAB to pad out size */ + nop + nop + nop + nop + + + + .section .initial + +/* + * Enable access to peripheral register at expanded I/O addresses + */ +SYM(_initInternalRegisters): + .code16 + movw $0x8000 , ax + outb al , $REMAPCFGH + xchg al , ah + outb al,$REMAPCFGL + outw ax, $REMAPCFG ; + + +/* + * Configure operation of the A20 Address Line + */ +SYM(A20): + movw $PORT92 , dx + + inb dx , al # clear A20 port reset + andb $0xfe , al # b0 Fast Reset(0)=disabled,(1)=reset triggered + orb $0x02 , al # Bit 1 Fast A20 = 0 (always 0) else enabled. + outb al , dx + +SYM(Watchdog): + movw $WDTSTATUS , dx # address the WDT status port + inb dx , al # get the WDT status + orb $0x01 , al # set the CLKDIS bit + outb al , dx # disable the clock to the WDT + +/* + * Initialize Refresh Control Unit for: + * Refresh Address = 0x0000 + + * Refresh gate between rows is 15.6 uSec + * Using a CLK2 frequency of 50Mhz ( 25Mhz CPU ) + * The refresh unit is enabled + * The refresh pin is not used. + */ + +SYM(InitRCU): + SetExRegWord( RFSCIR , 390) # refresh interval was 390, tried 312 + SetExRegWord( RFSBAD , 0x0) # base address + SetExRegWord( RFSADD , 0x0) # address register + SetExRegWord( RFSCON , 0x8000) # enable bit + +/* + * Initialize clock and power mgmt unit for: + * Clock Frequency = 50 Mhz + * Prescaled clock output = 1 Mhz + * Normal halt instructions + */ + +SYM(InitClk): + SetExRegByte( PWRCON, 0x0 ) + SetExRegWord( CLKPRS, 0x17) # 0x13 for 1.19318 MHz. 0x17 for 1MHz. + +/************************************************************** + * Initialize the Pin Configurations + *************************************************************/ + +/* + * Initialize I/O port 1 for: + * PIN 0 = 1, DCD0# to package pin + * PIN 1 = 1, RTS0# to package pin + * PIN 2 = 1, DTR0# to package pin + * PIN 3 = 1, DSR0# to package pin + * PIN 4 = 1, RI0# to package pin + * PIN 5 = 0, Outport (FLASH Vpp Enable, 0=Enable 1=Disable) + * PIN 6 = 0, Outport (P16_HOLD to 386ex option header JP7 pin 5) + * PIN 7 = 0, Outport (P17_HOLD to 386ex option header JP7 pin 3) + */ + +SYM(InitPort1): + SetExRegByte( P1LTC , 0xff ) + SetExRegByte( P1DIR , 0x0 ) + SetExRegByte( P1CFG , 0x1f) + +/* + * Initialize I/O port 2 for: + * PIN 0 = 0, Outport (P20_CS0# to 386ex option header JP7 pin 11) + * PIN 1 = 0, Outport (P21_CS1# to 386ex option header JP7 pin 9) + * PIN 2 = 1, CS2# (SMRAM) If not using CS2 can be configured as.? + * PIN 3 = 0, Outport ( no connect ) + * PIN 4 = 1, CS#4 (DRAM) + * PIN 5 = 1, RXD0 input. See not for I/0 port 1 pins 1-4 + * PIN 6 = 1, TXD0 output. + * PIN 7 = 1, CTS0# input. + */ + +SYM(InitPort2): + SetExRegByte( P2LTC , 0xff ) + SetExRegByte( P2DIR , 0x0 ) + SetExRegByte( P2CFG , 0xfe) + +/* + * Initialize I/O port 3 P3CFG + * PIN 0 = 1, TMROUT0 to package pin + * PIN 1 = 0, (TMROUT1 to 386ex option header JP7 pin 23) + * PIN 2 = 0, INT0 (IR1) disabled, (P3.2 out to JP7 pin 21) + * PIN 3 = 0, INT1 (IR5) disbled (P3.3 to option header JP7 pin 19) + * PIN 4 = 0, INT2 (IR6) disbled (P3.4 to option header JP7 pin 17) + * PIN 5 = 0, INT2 (IR7) disabled (P3.5 to 386ex header JP7 pin 15) + * PIN 6 = 0, Inport (Debugger Break P3.6/PWRD to package pin ) + * P3.6 selected + * PIN 7 = 0, COMCLK output disabled, 1.8432 Mhz OSC1 oscillator. + * ( Debbugger uses COMCLK as the clocking source ) + * P3.7 connected to package pin. + */ + +SYM(InitPort3): + SetExRegByte( P3LTC , 0xff ) + SetExRegByte( P3DIR , 0x41 ) + SetExRegByte( P3CFG , 0x09 ) # can check TMROUT0 +/* + * Initialize Peripheral Pin Configurations: + * PIN 0 = 1, RTS1# to package pin + * PIN 1 = 1, DTR1# to package pin + * PIN 2 = 1, TXD1 out to package pin + * PIN 3 = 0, EOP#/TC + * PIN 4 = 0, DACK0# + * PIN 5 = 1, Timer2 + * PIN 6 = 0, 0 => CS6# connected to package pin + * PIN 7 = 0, Don't care + */ + +SYM(InitPeriph): + SetExRegByte( PINCFG , 0x24) + +/* + * Initialize the Asynchronous Serial Ports: + * BIT 7 = 1, Internal SIO1 modem signals + * BIT 6 = 1, Internal SIO0 modem signals + * BIT 2 = 0, PSCLK for SSIO clock + * BIT 1 = 1, SERCLK for SIO1 clock + * BIT 0 = 1, SERCLK for SIO0 clock + */ + +SYM(InitSIO): + SetExRegByte( SIOCFG, 0xC3 ) # SIOn clocked internally + + SetExRegByte( LCR0, 0x80 ) # latch DLL0, DLH0 + SetExRegByte( DLL0, 0x51 ) # 0x51 sets to 9600 baud 0x7 -> 115,200 + SetExRegByte( DLH0, 0x00 ) # 0x145 is 2400 baud + SetExRegByte( LCR0, 0x03 ) # enable r/w buffers, IER0 accessible + # mode 8-n-1 + SetExRegByte( IER0, 0x00 ) # was 0x0f All interrupts detected + + SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 + SetExRegByte( DLL1, 0x51 ) # 0x51 set to 9600 baud, 0x7 = 115200 + SetExRegByte( DLH1, 0x00 ) # 0x145 is 2400 baud + SetExRegByte( LCR1, 0x03 ) # enable r/w buffers, IER1 accessible + # reg 8-n-1 + SetExRegByte( IER1, 0x00 ) # was 0x0f - All interrupts detected + +SYM(InitMCR): +/* + * Initialize Timer for: + * BIT 7 = 1, Timer clocks disabled + * BIT 6 = 0, Reserved + * BIT 5 = 1, TMRCLK2 instead of Vcc to Gate2 + * BIT 4 = 0, PSCLK to CLK2 + * BIT 3 = 1, TMRCLK1 instead of Vcc to Gate1 + * BIT 2 = 0, PSCLK to Gate1 + * BIT 1 = 0, Vcc to Gate0 + * BIT 0 = 0, PSCLK to Gate0 + */ + +SYM(InitTimer): + SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 + # and 2 are set to Vcc + + SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB + SetExRegByte(TMR0 , 0x00 ) # sfa + SetExRegByte(TMR0 , 0x00 ) # sfa + + + SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc + SetExRegByte(TMR1 , 0x00 ) # sfa + SetExRegByte(TMR1 , 0x00 ) # sfa + + SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc + SetExRegByte(TMR2 , 0x00 ) # + SetExRegByte(TMR2 , 0x00 ) # + + SetExRegByte(TMRCFG , 0x80 ) # Enable = 0x00 + +/* + * Initialize the DMACFG register for: + * BIT 7 = 1 , Disable DACK#1 + * BITs 6:4 = 100, TMROUT2 connected to DRQ1 + * BIT 3 = 1 , Disable DACK0# + * BIT 2:0 = 000, Pin is connected to DRQ0 + */ + + SetExRegByte(DMACFG , 0xC0 ) + SetExRegByte(DMACMD1, 0x00 ) # disable both DMA channels + SetExRegByte(DMAMOD1, 0x40 ) +/* + * Initialize the INTCFG register for: + * BIT 7 = 0, 8259 cascade disabled + * BIT 3 = 0, SLAVE IR6 connected to Vss + * BIT 2 = 0, SLAVE IR5 connected to Vss + * BIT 1 = 0, SLAVE IR1 connected to SSIOINT + * BIT 0 = 0, SLAVE IR0 connected to Vss + */ + +SYM(InitInt): + + cli # ! + + SetExRegByte(ICW1S , 0x11 ) # EDGE TRIGGERED + SetExRegByte(ICW2S , 0x28 ) # Slave base vector after Master + SetExRegByte(ICW3S , 0x02 ) # slave cascaded to IR2 on master + SetExRegByte(ICW4S , 0x01 ) # must be 0x01 + + SetExRegByte(ICW1M , 0x11 ) # edge triggered + SetExRegByte(ICW2M , 0x20 ) # base vector starts at byte 32 + SetExRegByte(ICW3M , 0x04) # IR2 is cascaded internally + SetExRegByte(ICW4M , 0x01 ) # idem + + SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. for IR5 and IR0 active use 0xde + SetExRegByte(INTCFG , 0x00 ) + + movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ + +SYM(SetCS4): + SetExRegWord(CS4ADL , 0x702) #Configure chip select 4 + SetExRegWord(CS4ADH , 0x00) + SetExRegWord(CS4MSKH, 0x03F) + SetExRegWord(CS4MSKL, 0xFC01) + +SYM(SetUCS1): + SetExRegWord(UCSADL , 0x0304) # 512K block starting at 0x80000 until 0x3f80000 + SetExRegWord(UCSADH , 0x03F8) + SetExRegWord(UCSMSKH, 0x03F7) + SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select + +/****************************************************** +* The GDT must be in RAM since it must be writeable, +* So, move the whole data section down. +********************************************************/ + + movw $ _ram_data_offset , di + movw $ _ram_data_segment, cx + mov cx , es + + movw $ _data_size , cx + movw $ _rom_data_segment, ax + movw $ _rom_data_offset , si + mov ax , ds + + repne + movsb + +/***************************** + * Load the Global Descriptor + * Table Register + ****************************/ + +#ifdef NEW_GAS + data32 + addr32 +#endif + lgdt SYM(GDTR) # location of GDT + + +SYM(SetUCS): + SetExRegWord(UCSADL, 0x0702) # now 512K starting at 0x3f80000. + SetExRegWord(UCSADH, 0x03f8) + SetExRegWord(UCSMSKH, 0x0007) + SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select + +/*************************** + * Switch to Protected Mode + ***************************/ + mov cr0, eax + orw $0x1, ax + mov eax, cr0 + +/************************** + * Flush prefetch queue, + * and load CS selector + *********************/ + + ljmpl $ GDT_CODE_PTR , $ SYM(_load_segment_registers) # sets the code selector + +/* + * Load the segment registers + */ +SYM(_load_segment_registers): + .code32 + pLOAD_SEGMENT( GDT_DATA_PTR, fs) + pLOAD_SEGMENT( GDT_DATA_PTR, gs) + pLOAD_SEGMENT( GDT_DATA_PTR, ss) + pLOAD_SEGMENT( GDT_DATA_PTR, ds) + pLOAD_SEGMENT( GDT_DATA_PTR, es) + +/* + * Set up the stack + */ + +SYM(lidtr): + lidt SYM(IDTR) + +SYM (_establish_stack): + movl $end, eax # stack starts right after bss + movl $stack_origin, esp # this is the high starting address + movl $stack_origin, ebp +/* + * Zero out the BSS segment + */ +SYM (zero_bss): + cld # make direction flag count up + movl $ SYM (end),ecx # find end of .bss + movl $ SYM (_bss_start),edi # edi = beginning of .bss + subl edi,ecx # ecx = size of .bss in bytes + shrl ecx # size of .bss in longs + shrl ecx + xorl eax,eax # value to clear out memory + repne # while ecx != 0 + stosl # clear a long in the bss + +/* + * Transfer control to User's Board Support Package + */ + pushl $0 # environp + pushl $0 # argv + pushl $0 # argc + call SYM(boot_card) + addl $12,esp + + cli # stops interrupts from being processed after hlt! + hlt # shutdown + +END + diff --git a/c/src/lib/libbsp/i386/i386ex/start/start.s b/c/src/lib/libbsp/i386/i386ex/start/start.s deleted file mode 100644 index 543a300744..0000000000 --- a/c/src/lib/libbsp/i386/i386ex/start/start.s +++ /dev/null @@ -1,437 +0,0 @@ -/* - * This file is the main boot and configuration file for the i386ex. It is - * solely responsible for initializing the internal register set to reflect - * the proper board configuration. This version is the "generic" i386ex - * startup: - * - * 1) 512K flask ROM @3f80000 - * 2) 1 Mb RAM @ 0x0 - * 3) Timer0 used as RTEMS clock ticker, 1 msec tick rate. - * 4) READY# is generated by CPU - * - * The file is a multi-section file, with sections as follows: - * 1) interrupt gates, in section "ints" - * 2) interrupt descriptor table, in section "idt" - * 3) global descriptor table, in section "gdt" - * 4) reset in section "reset" - * 5) and initial boot code in section " initial" - * - * Submitted by: - * - * Erik Ivanenko - * University of Toronto - * erik.ivanenko@utoronto.ca - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - - -changes: - SetExRegByte(ICW3S , 0x02 ) # MUST be 0x02 according to intel - SetExRegByte(ICW3M , 0x04 ) # IR2 is cascaded internally: was 0x02 => IR1 is cascaded - - */ - -#include "asm.h" -#include "macros.inc" -#include "80386ex.inc" - -/* - * NEW_GAS Needed for binutils 2.9.1.0.7 and higher - */ - - EXTERN (boot_card) /* exits to bspstart */ - EXTERN (stack_start) /* defined in startup/linkcmds */ - EXTERN (Clock_exit) - - PUBLIC (Interrupt_descriptor_table) - PUBLIC ( SYM(IDTR) ) - PUBLIC( SYM(_initInternalRegisters) ) - -BEGIN_DATA -SYM(IDTR): DESC3( SYM(Interrupt_descriptor_table), 0x07ff ); - -SYM(Interrupt_descriptor_table): /* Now in data section */ - .rept 256 - .word 0,0,0,0 - .endr - -END_DATA - -BEGIN_DATA - PUBLIC (_Global_descriptor_table) - -SYM(GDTR): DESC3( GDT_TABLE, 0x1f ); # one less than the size -SYM (_Global_descriptor_table): -SYM(GDT_TABLE): DESC2(0,0,0,0,0,0); -SYM(GDT_ALIAS): DESC2(32,0x1000,0x0,0x93,0,0x0); -SYM(GDT_CODE): DESC2(0xffff,0,0x0,0x9B,0xDF,0x00); -SYM(GDT_DATA): DESC2(0xffff,0,0x0,0x92,0xDF,0x00); # was CF -SYM(GDT_END): - -END_DATA - - -/* This section is the section that is used by the interrupt - descriptor table. It is used to provide the IDT with the - correct vector offsets. It is for symbol definition only. -*/ - - - .section .reset - - PUBLIC ( SYM(reset) ) -SYM(reset): - nop - cli - jmp SYM(_initInternalRegisters) /* different section in this file */ - .code32 /* in case this section moves */ - nop /* required by CHIP LAB to pad out size */ - nop - nop - nop - nop - - - - .section .initial - -/* - * Enable access to peripheral register at expanded I/O addresses - */ -SYM(_initInternalRegisters): - .code16 - movw $0x8000 , ax - outb al , $REMAPCFGH - xchg al , ah - outb al,$REMAPCFGL - outw ax, $REMAPCFG ; - - -/* - * Configure operation of the A20 Address Line - */ -SYM(A20): - movw $PORT92 , dx - - inb dx , al # clear A20 port reset - andb $0xfe , al # b0 Fast Reset(0)=disabled,(1)=reset triggered - orb $0x02 , al # Bit 1 Fast A20 = 0 (always 0) else enabled. - outb al , dx - -SYM(Watchdog): - movw $WDTSTATUS , dx # address the WDT status port - inb dx , al # get the WDT status - orb $0x01 , al # set the CLKDIS bit - outb al , dx # disable the clock to the WDT - -/* - * Initialize Refresh Control Unit for: - * Refresh Address = 0x0000 - - * Refresh gate between rows is 15.6 uSec - * Using a CLK2 frequency of 50Mhz ( 25Mhz CPU ) - * The refresh unit is enabled - * The refresh pin is not used. - */ - -SYM(InitRCU): - SetExRegWord( RFSCIR , 390) # refresh interval was 390, tried 312 - SetExRegWord( RFSBAD , 0x0) # base address - SetExRegWord( RFSADD , 0x0) # address register - SetExRegWord( RFSCON , 0x8000) # enable bit - -/* - * Initialize clock and power mgmt unit for: - * Clock Frequency = 50 Mhz - * Prescaled clock output = 1 Mhz - * Normal halt instructions - */ - -SYM(InitClk): - SetExRegByte( PWRCON, 0x0 ) - SetExRegWord( CLKPRS, 0x17) # 0x13 for 1.19318 MHz. 0x17 for 1MHz. - -/************************************************************** - * Initialize the Pin Configurations - *************************************************************/ - -/* - * Initialize I/O port 1 for: - * PIN 0 = 1, DCD0# to package pin - * PIN 1 = 1, RTS0# to package pin - * PIN 2 = 1, DTR0# to package pin - * PIN 3 = 1, DSR0# to package pin - * PIN 4 = 1, RI0# to package pin - * PIN 5 = 0, Outport (FLASH Vpp Enable, 0=Enable 1=Disable) - * PIN 6 = 0, Outport (P16_HOLD to 386ex option header JP7 pin 5) - * PIN 7 = 0, Outport (P17_HOLD to 386ex option header JP7 pin 3) - */ - -SYM(InitPort1): - SetExRegByte( P1LTC , 0xff ) - SetExRegByte( P1DIR , 0x0 ) - SetExRegByte( P1CFG , 0x1f) - -/* - * Initialize I/O port 2 for: - * PIN 0 = 0, Outport (P20_CS0# to 386ex option header JP7 pin 11) - * PIN 1 = 0, Outport (P21_CS1# to 386ex option header JP7 pin 9) - * PIN 2 = 1, CS2# (SMRAM) If not using CS2 can be configured as.? - * PIN 3 = 0, Outport ( no connect ) - * PIN 4 = 1, CS#4 (DRAM) - * PIN 5 = 1, RXD0 input. See not for I/0 port 1 pins 1-4 - * PIN 6 = 1, TXD0 output. - * PIN 7 = 1, CTS0# input. - */ - -SYM(InitPort2): - SetExRegByte( P2LTC , 0xff ) - SetExRegByte( P2DIR , 0x0 ) - SetExRegByte( P2CFG , 0xfe) - -/* - * Initialize I/O port 3 P3CFG - * PIN 0 = 1, TMROUT0 to package pin - * PIN 1 = 0, (TMROUT1 to 386ex option header JP7 pin 23) - * PIN 2 = 0, INT0 (IR1) disabled, (P3.2 out to JP7 pin 21) - * PIN 3 = 0, INT1 (IR5) disbled (P3.3 to option header JP7 pin 19) - * PIN 4 = 0, INT2 (IR6) disbled (P3.4 to option header JP7 pin 17) - * PIN 5 = 0, INT2 (IR7) disabled (P3.5 to 386ex header JP7 pin 15) - * PIN 6 = 0, Inport (Debugger Break P3.6/PWRD to package pin ) - * P3.6 selected - * PIN 7 = 0, COMCLK output disabled, 1.8432 Mhz OSC1 oscillator. - * ( Debbugger uses COMCLK as the clocking source ) - * P3.7 connected to package pin. - */ - -SYM(InitPort3): - SetExRegByte( P3LTC , 0xff ) - SetExRegByte( P3DIR , 0x41 ) - SetExRegByte( P3CFG , 0x09 ) # can check TMROUT0 -/* - * Initialize Peripheral Pin Configurations: - * PIN 0 = 1, RTS1# to package pin - * PIN 1 = 1, DTR1# to package pin - * PIN 2 = 1, TXD1 out to package pin - * PIN 3 = 0, EOP#/TC - * PIN 4 = 0, DACK0# - * PIN 5 = 1, Timer2 - * PIN 6 = 0, 0 => CS6# connected to package pin - * PIN 7 = 0, Don't care - */ - -SYM(InitPeriph): - SetExRegByte( PINCFG , 0x24) - -/* - * Initialize the Asynchronous Serial Ports: - * BIT 7 = 1, Internal SIO1 modem signals - * BIT 6 = 1, Internal SIO0 modem signals - * BIT 2 = 0, PSCLK for SSIO clock - * BIT 1 = 1, SERCLK for SIO1 clock - * BIT 0 = 1, SERCLK for SIO0 clock - */ - -SYM(InitSIO): - SetExRegByte( SIOCFG, 0xC3 ) # SIOn clocked internally - - SetExRegByte( LCR0, 0x80 ) # latch DLL0, DLH0 - SetExRegByte( DLL0, 0x51 ) # 0x51 sets to 9600 baud 0x7 -> 115,200 - SetExRegByte( DLH0, 0x00 ) # 0x145 is 2400 baud - SetExRegByte( LCR0, 0x03 ) # enable r/w buffers, IER0 accessible - # mode 8-n-1 - SetExRegByte( IER0, 0x00 ) # was 0x0f All interrupts detected - - SetExRegByte( LCR1, 0x80 ) # latch DLL0, DLH0 - SetExRegByte( DLL1, 0x51 ) # 0x51 set to 9600 baud, 0x7 = 115200 - SetExRegByte( DLH1, 0x00 ) # 0x145 is 2400 baud - SetExRegByte( LCR1, 0x03 ) # enable r/w buffers, IER1 accessible - # reg 8-n-1 - SetExRegByte( IER1, 0x00 ) # was 0x0f - All interrupts detected - -SYM(InitMCR): -/* - * Initialize Timer for: - * BIT 7 = 1, Timer clocks disabled - * BIT 6 = 0, Reserved - * BIT 5 = 1, TMRCLK2 instead of Vcc to Gate2 - * BIT 4 = 0, PSCLK to CLK2 - * BIT 3 = 1, TMRCLK1 instead of Vcc to Gate1 - * BIT 2 = 0, PSCLK to Gate1 - * BIT 1 = 0, Vcc to Gate0 - * BIT 0 = 0, PSCLK to Gate0 - */ - -SYM(InitTimer): - SetExRegByte(TMRCFG , 0x80 ) # All counters disabled, Gates 0,1 - # and 2 are set to Vcc - - SetExRegByte(TMRCON , 0x34 ) # prepare to write counter 0 LSB,MSB - SetExRegByte(TMR0 , 0x00 ) # sfa - SetExRegByte(TMR0 , 0x00 ) # sfa - - - SetExRegByte(TMRCON , 0x70 ) # mode 0 disables on Gate= Vcc - SetExRegByte(TMR1 , 0x00 ) # sfa - SetExRegByte(TMR1 , 0x00 ) # sfa - - SetExRegByte(TMRCON , 0xB0 ) # mode 0 disables on gate =Vcc - SetExRegByte(TMR2 , 0x00 ) # - SetExRegByte(TMR2 , 0x00 ) # - - SetExRegByte(TMRCFG , 0x80 ) # Enable = 0x00 - -/* - * Initialize the DMACFG register for: - * BIT 7 = 1 , Disable DACK#1 - * BITs 6:4 = 100, TMROUT2 connected to DRQ1 - * BIT 3 = 1 , Disable DACK0# - * BIT 2:0 = 000, Pin is connected to DRQ0 - */ - - SetExRegByte(DMACFG , 0xC0 ) - SetExRegByte(DMACMD1, 0x00 ) # disable both DMA channels - SetExRegByte(DMAMOD1, 0x40 ) -/* - * Initialize the INTCFG register for: - * BIT 7 = 0, 8259 cascade disabled - * BIT 3 = 0, SLAVE IR6 connected to Vss - * BIT 2 = 0, SLAVE IR5 connected to Vss - * BIT 1 = 0, SLAVE IR1 connected to SSIOINT - * BIT 0 = 0, SLAVE IR0 connected to Vss - */ - -SYM(InitInt): - - cli # ! - - SetExRegByte(ICW1S , 0x11 ) # EDGE TRIGGERED - SetExRegByte(ICW2S , 0x28 ) # Slave base vector after Master - SetExRegByte(ICW3S , 0x02 ) # slave cascaded to IR2 on master - SetExRegByte(ICW4S , 0x01 ) # must be 0x01 - - SetExRegByte(ICW1M , 0x11 ) # edge triggered - SetExRegByte(ICW2M , 0x20 ) # base vector starts at byte 32 - SetExRegByte(ICW3M , 0x04) # IR2 is cascaded internally - SetExRegByte(ICW4M , 0x01 ) # idem - - SetExRegByte(OCW1M , 0xde ) # IR0 only = 0xfe. for IR5 and IR0 active use 0xde - SetExRegByte(INTCFG , 0x00 ) - - movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ - -SYM(SetCS4): - SetExRegWord(CS4ADL , 0x702) #Configure chip select 4 - SetExRegWord(CS4ADH , 0x00) - SetExRegWord(CS4MSKH, 0x03F) - SetExRegWord(CS4MSKL, 0xFC01) - -SYM(SetUCS1): - SetExRegWord(UCSADL , 0x0304) # 512K block starting at 0x80000 until 0x3f80000 - SetExRegWord(UCSADH , 0x03F8) - SetExRegWord(UCSMSKH, 0x03F7) - SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select - -/****************************************************** -* The GDT must be in RAM since it must be writeable, -* So, move the whole data section down. -********************************************************/ - - movw $ _ram_data_offset , di - movw $ _ram_data_segment, cx - mov cx , es - - movw $ _data_size , cx - movw $ _rom_data_segment, ax - movw $ _rom_data_offset , si - mov ax , ds - - repne - movsb - -/***************************** - * Load the Global Descriptor - * Table Register - ****************************/ - -#ifdef NEW_GAS - data32 - addr32 -#endif - lgdt SYM(GDTR) # location of GDT - - -SYM(SetUCS): - SetExRegWord(UCSADL, 0x0702) # now 512K starting at 0x3f80000. - SetExRegWord(UCSADH, 0x03f8) - SetExRegWord(UCSMSKH, 0x0007) - SetExRegWord(UCSMSKL, 0xFC01) # configure upper chip select - -/*************************** - * Switch to Protected Mode - ***************************/ - mov cr0, eax - orw $0x1, ax - mov eax, cr0 - -/************************** - * Flush prefetch queue, - * and load CS selector - *********************/ - - ljmpl $ GDT_CODE_PTR , $ SYM(_load_segment_registers) # sets the code selector - -/* - * Load the segment registers - */ -SYM(_load_segment_registers): - .code32 - pLOAD_SEGMENT( GDT_DATA_PTR, fs) - pLOAD_SEGMENT( GDT_DATA_PTR, gs) - pLOAD_SEGMENT( GDT_DATA_PTR, ss) - pLOAD_SEGMENT( GDT_DATA_PTR, ds) - pLOAD_SEGMENT( GDT_DATA_PTR, es) - -/* - * Set up the stack - */ - -SYM(lidtr): - lidt SYM(IDTR) - -SYM (_establish_stack): - movl $end, eax # stack starts right after bss - movl $stack_origin, esp # this is the high starting address - movl $stack_origin, ebp -/* - * Zero out the BSS segment - */ -SYM (zero_bss): - cld # make direction flag count up - movl $ SYM (end),ecx # find end of .bss - movl $ SYM (_bss_start),edi # edi = beginning of .bss - subl edi,ecx # ecx = size of .bss in bytes - shrl ecx # size of .bss in longs - shrl ecx - xorl eax,eax # value to clear out memory - repne # while ecx != 0 - stosl # clear a long in the bss - -/* - * Transfer control to User's Board Support Package - */ - pushl $0 # environp - pushl $0 # argv - pushl $0 # argc - call SYM(boot_card) - addl $12,esp - - cli # stops interrupts from being processed after hlt! - hlt # shutdown - -END - diff --git a/c/src/lib/libbsp/i386/i386ex/startup/Makefile.in b/c/src/lib/libbsp/i386/i386ex/startup/Makefile.in index c12bd4662f..c16b99c71e 100644 --- a/c/src/lib/libbsp/i386/i386ex/startup/Makefile.in +++ b/c/src/lib/libbsp/i386/i386ex/startup/Makefile.in @@ -18,11 +18,11 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S # removed initcsu piece, ldsegs piece and flush S_PIECES=irq_asm -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(srcdir)/linkcmds $(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/i386ex/timer/Makefile.in b/c/src/lib/libbsp/i386/i386ex/timer/Makefile.in index 2b32db0b00..939382f56f 100644 --- a/c/src/lib/libbsp/i386/i386ex/timer/Makefile.in +++ b/c/src/lib/libbsp/i386/i386ex/timer/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=timerisr -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(CC_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(CC_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/i386ex/timer/timerisr.S b/c/src/lib/libbsp/i386/i386ex/timer/timerisr.S new file mode 100644 index 0000000000..53463e1e70 --- /dev/null +++ b/c/src/lib/libbsp/i386/i386ex/timer/timerisr.S @@ -0,0 +1,40 @@ +/* timer_isr() + * + * This routine provides the ISR for the Z8036 timer on the MVME136 + * board. The timer is set up to generate an interrupt at maximum + * intervals. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989-1998. + * On-Line Applications Research Corporation (OAR). + * Copyright assigned to U.S. Government, 1994. + * + * The license and distribution terms for this file may be + * found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" + + BEGIN_CODE + + EXTERN (Ttimer_val) + + PUBLIC (timerisr) +SYM (timerisr): + addl $250, SYM (Ttimer_val) # another 250 microseconds + pushl eax + movb 0xa0,al /* signal generic End Of Interrupt (EOI) to slave PIC */ + outb al, $0x20 + movb $0x20, al + outb al, $0x20 /* signal generic EOI to Master PIC */ + popl eax + iret + +END_CODE +END diff --git a/c/src/lib/libbsp/i386/i386ex/timer/timerisr.s b/c/src/lib/libbsp/i386/i386ex/timer/timerisr.s deleted file mode 100644 index 53463e1e70..0000000000 --- a/c/src/lib/libbsp/i386/i386ex/timer/timerisr.s +++ /dev/null @@ -1,40 +0,0 @@ -/* timer_isr() - * - * This routine provides the ISR for the Z8036 timer on the MVME136 - * board. The timer is set up to generate an interrupt at maximum - * intervals. - * - * Input parameters: NONE - * - * Output parameters: NONE - * - * COPYRIGHT (c) 1989-1998. - * On-Line Applications Research Corporation (OAR). - * Copyright assigned to U.S. Government, 1994. - * - * The license and distribution terms for this file may be - * found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" - - BEGIN_CODE - - EXTERN (Ttimer_val) - - PUBLIC (timerisr) -SYM (timerisr): - addl $250, SYM (Ttimer_val) # another 250 microseconds - pushl eax - movb 0xa0,al /* signal generic End Of Interrupt (EOI) to slave PIC */ - outb al, $0x20 - movb $0x20, al - outb al, $0x20 /* signal generic EOI to Master PIC */ - popl eax - iret - -END_CODE -END diff --git a/c/src/lib/libbsp/i386/pc386/console/Makefile.in b/c/src/lib/libbsp/i386/pc386/console/Makefile.in index fa09ab4c80..db76e36aff 100644 --- a/c/src/lib/libbsp/i386/pc386/console/Makefile.in +++ b/c/src/lib/libbsp/i386/pc386/console/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=videoAsm -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(H_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/pc386/console/videoAsm.S b/c/src/lib/libbsp/i386/pc386/console/videoAsm.S new file mode 100644 index 0000000000..a8f5cb3156 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/console/videoAsm.S @@ -0,0 +1,51 @@ +/* + * videoAsm.S - This file contains code for displaying cursor on the console + * + * Copyright (C) 1998 valette@crf.canon.fr + * + * This code is free software; you can redistribute it and/or + * modify it under the terms of the GNU Library General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This code is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Library General Public License for more details. + * + * You should have received a copy of the GNU Library General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + * + * $Id$ + */ + + .file "videoAsm.s" + +#include + + .text + .align 4 + .globl wr_cursor /* Move cursor position */ + +/* + * void wr_cursor(newPosition, ioBaseAddr) + */ + +wr_cursor: pushl %ecx + movl 8(%esp), %ecx /* Get new cursor position */ + movb $CC_CURSHIGH, %al /* Cursor high location */ + movl 12(%esp), %edx /* Get IO base address */ + outb (%dx) + incw %dx /* Program Data register */ + movb %ch, %al + outb (%dx) /* Update high location cursor */ + decw %dx /* Program Index Register */ + movb $CC_CURSLOW, %al /* Cursor low location */ + outb (%dx) + incw %dx /* Program Data Register */ + movb %cl, %al + outb (%dx) /* Update low location cursor */ + popl %ecx + ret + diff --git a/c/src/lib/libbsp/i386/pc386/console/videoAsm.s b/c/src/lib/libbsp/i386/pc386/console/videoAsm.s deleted file mode 100644 index a8f5cb3156..0000000000 --- a/c/src/lib/libbsp/i386/pc386/console/videoAsm.s +++ /dev/null @@ -1,51 +0,0 @@ -/* - * videoAsm.S - This file contains code for displaying cursor on the console - * - * Copyright (C) 1998 valette@crf.canon.fr - * - * This code is free software; you can redistribute it and/or - * modify it under the terms of the GNU Library General Public - * License as published by the Free Software Foundation; either - * version 2 of the License, or (at your option) any later version. - * - * This code is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - * Library General Public License for more details. - * - * You should have received a copy of the GNU Library General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - * - * $Id$ - */ - - .file "videoAsm.s" - -#include - - .text - .align 4 - .globl wr_cursor /* Move cursor position */ - -/* - * void wr_cursor(newPosition, ioBaseAddr) - */ - -wr_cursor: pushl %ecx - movl 8(%esp), %ecx /* Get new cursor position */ - movb $CC_CURSHIGH, %al /* Cursor high location */ - movl 12(%esp), %edx /* Get IO base address */ - outb (%dx) - incw %dx /* Program Data register */ - movb %ch, %al - outb (%dx) /* Update high location cursor */ - decw %dx /* Program Index Register */ - movb $CC_CURSLOW, %al /* Cursor low location */ - outb (%dx) - incw %dx /* Program Data Register */ - movb %cl, %al - outb (%dx) /* Update low location cursor */ - popl %ecx - ret - diff --git a/c/src/lib/libbsp/i386/pc386/start/start.S b/c/src/lib/libbsp/i386/pc386/start/start.S new file mode 100644 index 0000000000..323aa3d088 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/start/start.S @@ -0,0 +1,202 @@ +/*-------------------------------------------------------------------------+ +| start.s v1.1 - PC386 BSP - 1997/08/07 ++--------------------------------------------------------------------------+ +| This file contains the entry point for the application. +| The name of this entry point is compiler dependent. +| It jumps to the BSP which is responsible for performing all initialization. ++--------------------------------------------------------------------------+ +| (C) Copyright 1997 - +| - NavIST Group - Real-Time Distributed Systems and Industrial Automation +| +| http://pandora.ist.utl.pt +| +| Instituto Superior Tecnico * Lisboa * PORTUGAL ++--------------------------------------------------------------------------+ +| Modified the 20/05/1998 by valette@crf.canon.fr in order to give a working +| example of eraly stage debugging via the DEBUG_EARLY_START define. ++--------------------------------------------------------------------------+ +| Disclaimer: +| +| This file is provided "AS IS" without warranty of any kind, either +| expressed or implied. ++--------------------------------------------------------------------------+ +| This code is based on an earlier generation RTEMS i386 start.s and the +| following copyright applies: +| +| ************************************************************************** +| * COPYRIGHT (c) 1989-1998. +| * On-Line Applications Research Corporation (OAR). +| * Copyright assigned to U.S. Government, 1994. +| * +| * The license and distribution terms for this file may be +| * found in the file LICENSE in this distribution or at +| * http://www.OARcorp.com/rtems/license.html. +| ************************************************************************** +| +| $Id$ ++--------------------------------------------------------------------------*/ + +/* + * The most trivial start.s possible. It does not know anything + * about system it is running on, so it will jump to appropriate + * place in BSP specific place to do things it knows nothing about + */ + +#include "asm.h" + +/*----------------------------------------------------------------------------+ +| Size of heap and stack: ++----------------------------------------------------------------------------*/ + +.set STACK_SIZE, 0x1000 + +/*----------------------------------------------------------------------------+ +| CODE section ++----------------------------------------------------------------------------*/ + +BEGIN_CODE + + PUBLIC (start) # GNU default entry point + + EXTERN (boot_card) + EXTERN (_load_segments) + EXTERN (_return_to_monitor) + EXTERN (_IBMPC_initVideo) + EXTERN (debugPollingGetChar) + EXTERN (checkCPUtypeSetCr0) + + +/* + * In case this crashes on your machine and this is not due + * to video mode set by the loader, you may try to define + * the following variable: + */ +/* #define DEBUG_EARLY_START */ + +SYM (start): + /* + * When things are really, REALLY!, bad -- turn on the speaker and + * lock up. This shows whether or not we make it to a certain + * location. + */ +#if 0 + inb $0x61, al + orb $0x03, al + outb al, $0x61 # enable the speaker +speakl: jmp speakl # and SPIN!!! +#endif + + nop + cli # DISABLE INTERRUPTS!!! + cld +#ifdef DEBUG_EARLY_START + /* + * Must get video attribute to have a working printk. + * Note that the following code assume we already have + * valid segments and a stack. It should be true for + * any loader starting RTEMS in protected mode (or + * at least I hope so : -)). + */ + call _IBMPC_initVideo + /* + * try printk and a getchar in polling mode ASAP + */ + pushl $welcome_msg + call printk + addl $4, esp + + /* call debugPollingGetChar */ + +#endif + +/*----------------------------------------------------------------------------+ +| Load the segment registers (this is done by the board's BSP) and perform any +| other board specific initialization procedures, this piece of code +| does not know anything about +| +| NOTE: Upon return, gs will contain the segment descriptor for a segment which +| maps directly to all of physical memory. ++----------------------------------------------------------------------------*/ + + jmp SYM (_load_segments) # load board dependent segments + +/*----------------------------------------------------------------------------+ +| Set up the stack ++----------------------------------------------------------------------------*/ + + PUBLIC (_establish_stack) +SYM (_establish_stack): + + movl $_end, eax # eax = end of bss/start of heap + addl $STACK_SIZE, eax # make room for stack + andl $0xffffffc0, eax # align it on 16 byte boundary + movl eax, esp # set stack pointer + movl eax, ebp # set base pointer + +/*----------------------------------------------------------------------------+ +| Zero out the BSS segment ++----------------------------------------------------------------------------*/ + +SYM (zero_bss): + cld # make direction flag count up + movl $ SYM (_end), ecx # find end of .bss + movl $ SYM (_bss_start), edi # edi = beginning of .bss + subl edi, ecx # ecx = size of .bss in bytes + shrl ecx # size of .bss in longs + shrl ecx + xorl eax, eax # value to clear out memory + repne # while ecx != 0 + stosl # clear a long in the bss + +/*---------------------------------------------------------------------+ +| Check CPU type. Enable Cache and init coprocessor if needed. ++---------------------------------------------------------------------*/ + call checkCPUtypeSetCr0 +/*---------------------------------------------------------------------+ +| Transfer control to User's Board Support Package ++---------------------------------------------------------------------*/ + + pushl $0 # environp + pushl $0 # argv + pushl $0 # argc + call SYM (boot_card) + addl $12, esp + +/*---------------------------------------------------------------------+ +| Clean up - we do not know anything about it, so we will +| jump to BSP specific code to do cleanup ++---------------------------------------------------------------------*/ + + jmp SYM (_return_to_monitor) + +END_CODE + +BEGIN_DATA + + PUBLIC(_stack_size) +SYM(_stack_size): + .long STACK_SIZE + +#ifdef DEBUG_EARLY_START + + PUBLIC (welcome_msg) +SYM (welcome_msg) : + .string "Ready to debug RTEMS ?\nEnter \n" + + PUBLIC (hex_msg) +SYM (hex_msg) : + .string "0x%x\n" + + PUBLIC (made_it_msg) +SYM (made_it_msg) : + .string "made it to %d\n" + +#endif + +END_DATA + +END + + + + diff --git a/c/src/lib/libbsp/i386/pc386/start/start.s b/c/src/lib/libbsp/i386/pc386/start/start.s deleted file mode 100644 index 323aa3d088..0000000000 --- a/c/src/lib/libbsp/i386/pc386/start/start.s +++ /dev/null @@ -1,202 +0,0 @@ -/*-------------------------------------------------------------------------+ -| start.s v1.1 - PC386 BSP - 1997/08/07 -+--------------------------------------------------------------------------+ -| This file contains the entry point for the application. -| The name of this entry point is compiler dependent. -| It jumps to the BSP which is responsible for performing all initialization. -+--------------------------------------------------------------------------+ -| (C) Copyright 1997 - -| - NavIST Group - Real-Time Distributed Systems and Industrial Automation -| -| http://pandora.ist.utl.pt -| -| Instituto Superior Tecnico * Lisboa * PORTUGAL -+--------------------------------------------------------------------------+ -| Modified the 20/05/1998 by valette@crf.canon.fr in order to give a working -| example of eraly stage debugging via the DEBUG_EARLY_START define. -+--------------------------------------------------------------------------+ -| Disclaimer: -| -| This file is provided "AS IS" without warranty of any kind, either -| expressed or implied. -+--------------------------------------------------------------------------+ -| This code is based on an earlier generation RTEMS i386 start.s and the -| following copyright applies: -| -| ************************************************************************** -| * COPYRIGHT (c) 1989-1998. -| * On-Line Applications Research Corporation (OAR). -| * Copyright assigned to U.S. Government, 1994. -| * -| * The license and distribution terms for this file may be -| * found in the file LICENSE in this distribution or at -| * http://www.OARcorp.com/rtems/license.html. -| ************************************************************************** -| -| $Id$ -+--------------------------------------------------------------------------*/ - -/* - * The most trivial start.s possible. It does not know anything - * about system it is running on, so it will jump to appropriate - * place in BSP specific place to do things it knows nothing about - */ - -#include "asm.h" - -/*----------------------------------------------------------------------------+ -| Size of heap and stack: -+----------------------------------------------------------------------------*/ - -.set STACK_SIZE, 0x1000 - -/*----------------------------------------------------------------------------+ -| CODE section -+----------------------------------------------------------------------------*/ - -BEGIN_CODE - - PUBLIC (start) # GNU default entry point - - EXTERN (boot_card) - EXTERN (_load_segments) - EXTERN (_return_to_monitor) - EXTERN (_IBMPC_initVideo) - EXTERN (debugPollingGetChar) - EXTERN (checkCPUtypeSetCr0) - - -/* - * In case this crashes on your machine and this is not due - * to video mode set by the loader, you may try to define - * the following variable: - */ -/* #define DEBUG_EARLY_START */ - -SYM (start): - /* - * When things are really, REALLY!, bad -- turn on the speaker and - * lock up. This shows whether or not we make it to a certain - * location. - */ -#if 0 - inb $0x61, al - orb $0x03, al - outb al, $0x61 # enable the speaker -speakl: jmp speakl # and SPIN!!! -#endif - - nop - cli # DISABLE INTERRUPTS!!! - cld -#ifdef DEBUG_EARLY_START - /* - * Must get video attribute to have a working printk. - * Note that the following code assume we already have - * valid segments and a stack. It should be true for - * any loader starting RTEMS in protected mode (or - * at least I hope so : -)). - */ - call _IBMPC_initVideo - /* - * try printk and a getchar in polling mode ASAP - */ - pushl $welcome_msg - call printk - addl $4, esp - - /* call debugPollingGetChar */ - -#endif - -/*----------------------------------------------------------------------------+ -| Load the segment registers (this is done by the board's BSP) and perform any -| other board specific initialization procedures, this piece of code -| does not know anything about -| -| NOTE: Upon return, gs will contain the segment descriptor for a segment which -| maps directly to all of physical memory. -+----------------------------------------------------------------------------*/ - - jmp SYM (_load_segments) # load board dependent segments - -/*----------------------------------------------------------------------------+ -| Set up the stack -+----------------------------------------------------------------------------*/ - - PUBLIC (_establish_stack) -SYM (_establish_stack): - - movl $_end, eax # eax = end of bss/start of heap - addl $STACK_SIZE, eax # make room for stack - andl $0xffffffc0, eax # align it on 16 byte boundary - movl eax, esp # set stack pointer - movl eax, ebp # set base pointer - -/*----------------------------------------------------------------------------+ -| Zero out the BSS segment -+----------------------------------------------------------------------------*/ - -SYM (zero_bss): - cld # make direction flag count up - movl $ SYM (_end), ecx # find end of .bss - movl $ SYM (_bss_start), edi # edi = beginning of .bss - subl edi, ecx # ecx = size of .bss in bytes - shrl ecx # size of .bss in longs - shrl ecx - xorl eax, eax # value to clear out memory - repne # while ecx != 0 - stosl # clear a long in the bss - -/*---------------------------------------------------------------------+ -| Check CPU type. Enable Cache and init coprocessor if needed. -+---------------------------------------------------------------------*/ - call checkCPUtypeSetCr0 -/*---------------------------------------------------------------------+ -| Transfer control to User's Board Support Package -+---------------------------------------------------------------------*/ - - pushl $0 # environp - pushl $0 # argv - pushl $0 # argc - call SYM (boot_card) - addl $12, esp - -/*---------------------------------------------------------------------+ -| Clean up - we do not know anything about it, so we will -| jump to BSP specific code to do cleanup -+---------------------------------------------------------------------*/ - - jmp SYM (_return_to_monitor) - -END_CODE - -BEGIN_DATA - - PUBLIC(_stack_size) -SYM(_stack_size): - .long STACK_SIZE - -#ifdef DEBUG_EARLY_START - - PUBLIC (welcome_msg) -SYM (welcome_msg) : - .string "Ready to debug RTEMS ?\nEnter \n" - - PUBLIC (hex_msg) -SYM (hex_msg) : - .string "0x%x\n" - - PUBLIC (made_it_msg) -SYM (made_it_msg) : - .string "made it to %d\n" - -#endif - -END_DATA - -END - - - - diff --git a/c/src/lib/libbsp/i386/pc386/start/start16.S b/c/src/lib/libbsp/i386/pc386/start/start16.S new file mode 100644 index 0000000000..4b12408cd6 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/start/start16.S @@ -0,0 +1,183 @@ +/*-------------------------------------------------------------------------+ +| start16.s v1.0 - PC386 BSP - 1998/04/13 ++--------------------------------------------------------------------------+ +| This file contains the entry point for the application. +| The name of this entry point is compiler dependent. +| It jumps to the BSP which is responsible for performing all initialization. ++--------------------------------------------------------------------------+ +| (C) Copyright 1997 - +| - NavIST Group - Real-Time Distributed Systems and Industrial Automation +| +| http://pandora.ist.utl.pt +| +| Instituto Superior Tecnico * Lisboa * PORTUGAL ++--------------------------------------------------------------------------+ +| Disclaimer: +| +| This file is provided "AS IS" without warranty of any kind, either +| expressed or implied. ++--------------------------------------------------------------------------+ +| This code is partly based on (from the Linux source tree): +| video.S - Copyright (C) 1995, 1996 Martin Mares ++--------------------------------------------------------------------------*/ + + +/*----------------------------------------------------------------------------+ +| Constants ++----------------------------------------------------------------------------*/ + +.set PROT_CODE_SEG, 0x08 # offset of code segment descriptor into GDT +.set PROT_DATA_SEG, 0x10 # offset of code segment descriptor into GDT +.set CR0_PE, 1 # protected mode flag on CR0 register +.set HDRSTART, HEADERADDR # address of start of bin2boot header +.set HDROFF, 0x24 # offset into bin2boot header of start32 addr +.set STACKOFF, 0x200-0x10 # offset to load into %esp, from start of image + + /* #define NEW_GAS */ +/*----------------------------------------------------------------------------+ +| CODE section ++----------------------------------------------------------------------------*/ + +.text + + .globl _start16 # entry point + .globl start16 +start16: +_start16: + +.code16 + + cli # DISABLE INTERRUPTS!!! + + movw %cs, %ax # + movw %ax, %ds # set the rest of real mode registers + movw %ax, %es # + movw %ax, %ss # + +#if defined(RTEMS_VIDEO_80x50) + + /*---------------------------------------------------------------------+ + | Switch VGA video to 80 lines x 50 columns mode. Has to be done before + | turning protected mode on since it uses BIOS int 10h (video) services. + +---------------------------------------------------------------------*/ + + movw $0x0003, %ax # forced set + int $0x10 + movw $0x1112, %ax # use 8x8 font + xorb %bl, %bl + int $0x10 + movw $0x1201, %ax # turn off cursor emulation + movb $0x34, %bl + int $0x10 + movb $0x01, %ah # define cursor (scan lines 0 to 7) + movw $0x0007, %cx + int $0x10 + +#endif /* RTEMS_VIDEO_80x50 */ + + /*---------------------------------------------------------------------+ + | Bare PC machines boot in real mode! We have to turn protected mode on. + +---------------------------------------------------------------------*/ +#ifdef NEW_GAS + data32 + addr32 +#endif + lgdt gdtptr - start16 # load Global Descriptor Table + movl %cr0, %eax + orl $CR0_PE, %eax + movl %eax, %cr0 # turn on protected mode + +#ifdef NEW_GAS + ljmpl $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs +#else + ljmp $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs +#endif +.code32 +1: + /*---------------------------------------------------------------------+ + | load the other segment registers + +---------------------------------------------------------------------*/ + movl $PROT_DATA_SEG, %eax + movl %ax, %ds + movl %ax, %es + movl %ax, %ss + movl $start16 + STACKOFF, %esp # set up stack pointer + addl $start16 + STACKOFF, %ebp # set up stack pointer + + /*---------------------------------------------------------------------+ + | we have to enable A20 in order to access memory above 1MByte + +---------------------------------------------------------------------*/ + call empty_8042 + movb $0xD1, %al # command write + outb %al, $0x64 + call empty_8042 + movb $0xDF, %al # A20 on + outb %al, $0x60 + call empty_8042 + + movl %cs:HDRSTART + HDROFF, %eax # + pushl %eax # jump to start of 32 bit code + ret # + +/*----------------------------------------------------------------------------+ +| delay ++------------------------------------------------------------------------------ +| Delay is needed after doing I/O. We do it by writing to a non-existent port. ++----------------------------------------------------------------------------*/ + .globl _delay + .globl delay +delay: +_delay: + outb %al, $0xED # about 1uS delay + ret + +/*----------------------------------------------------------------------------+ +| empty_8042 ++------------------------------------------------------------------------------ +| This routine checks that the keyboard command queue is empty (after emptying +| the output buffers). +| No timeout is used - if this hangs there is something wrong with the machine, +| and we probably couldn't proceed anyway. ++----------------------------------------------------------------------------*/ + .globl _empty_8042 + .globl empty_8042 +empty_8042: +_empty_8042: + call delay + inb $0x64, %al # 8042 status port + testb $0x01, %al # output buffer? + jz no_output + call delay + in $0x60, %al # read it + jmp empty_8042 +no_output: + test $0x02, %al # is input buffer full? + jnz empty_8042 # yes - loop + ret + +/*----------------------------------------------------------------------------+ +| DATA section ++----------------------------------------------------------------------------*/ + +/************************** +* GLOBAL DESCRIPTOR TABLE * +**************************/ + + .p2align 4 +gdtptr: + /* we use the NULL descriptor to store the GDT pointer - a trick quite + nifty due to: Robert Collins (rcollins@x86.org) */ + .word gdtlen - 1 + .long gdtptr + .word 0x0000 + + /* code segment */ + .word 0xffff, 0 + .byte 0, 0x9f, 0xcf, 0 + + /* data segment */ + .word 0xffff, 0 + .byte 0, 0x93, 0xcf, 0 + + .set gdtlen, . - gdtptr # length of GDT + diff --git a/c/src/lib/libbsp/i386/pc386/start/start16.s b/c/src/lib/libbsp/i386/pc386/start/start16.s deleted file mode 100644 index 4b12408cd6..0000000000 --- a/c/src/lib/libbsp/i386/pc386/start/start16.s +++ /dev/null @@ -1,183 +0,0 @@ -/*-------------------------------------------------------------------------+ -| start16.s v1.0 - PC386 BSP - 1998/04/13 -+--------------------------------------------------------------------------+ -| This file contains the entry point for the application. -| The name of this entry point is compiler dependent. -| It jumps to the BSP which is responsible for performing all initialization. -+--------------------------------------------------------------------------+ -| (C) Copyright 1997 - -| - NavIST Group - Real-Time Distributed Systems and Industrial Automation -| -| http://pandora.ist.utl.pt -| -| Instituto Superior Tecnico * Lisboa * PORTUGAL -+--------------------------------------------------------------------------+ -| Disclaimer: -| -| This file is provided "AS IS" without warranty of any kind, either -| expressed or implied. -+--------------------------------------------------------------------------+ -| This code is partly based on (from the Linux source tree): -| video.S - Copyright (C) 1995, 1996 Martin Mares -+--------------------------------------------------------------------------*/ - - -/*----------------------------------------------------------------------------+ -| Constants -+----------------------------------------------------------------------------*/ - -.set PROT_CODE_SEG, 0x08 # offset of code segment descriptor into GDT -.set PROT_DATA_SEG, 0x10 # offset of code segment descriptor into GDT -.set CR0_PE, 1 # protected mode flag on CR0 register -.set HDRSTART, HEADERADDR # address of start of bin2boot header -.set HDROFF, 0x24 # offset into bin2boot header of start32 addr -.set STACKOFF, 0x200-0x10 # offset to load into %esp, from start of image - - /* #define NEW_GAS */ -/*----------------------------------------------------------------------------+ -| CODE section -+----------------------------------------------------------------------------*/ - -.text - - .globl _start16 # entry point - .globl start16 -start16: -_start16: - -.code16 - - cli # DISABLE INTERRUPTS!!! - - movw %cs, %ax # - movw %ax, %ds # set the rest of real mode registers - movw %ax, %es # - movw %ax, %ss # - -#if defined(RTEMS_VIDEO_80x50) - - /*---------------------------------------------------------------------+ - | Switch VGA video to 80 lines x 50 columns mode. Has to be done before - | turning protected mode on since it uses BIOS int 10h (video) services. - +---------------------------------------------------------------------*/ - - movw $0x0003, %ax # forced set - int $0x10 - movw $0x1112, %ax # use 8x8 font - xorb %bl, %bl - int $0x10 - movw $0x1201, %ax # turn off cursor emulation - movb $0x34, %bl - int $0x10 - movb $0x01, %ah # define cursor (scan lines 0 to 7) - movw $0x0007, %cx - int $0x10 - -#endif /* RTEMS_VIDEO_80x50 */ - - /*---------------------------------------------------------------------+ - | Bare PC machines boot in real mode! We have to turn protected mode on. - +---------------------------------------------------------------------*/ -#ifdef NEW_GAS - data32 - addr32 -#endif - lgdt gdtptr - start16 # load Global Descriptor Table - movl %cr0, %eax - orl $CR0_PE, %eax - movl %eax, %cr0 # turn on protected mode - -#ifdef NEW_GAS - ljmpl $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs -#else - ljmp $PROT_CODE_SEG, $1f # flush prefetch queue, and reload %cs -#endif -.code32 -1: - /*---------------------------------------------------------------------+ - | load the other segment registers - +---------------------------------------------------------------------*/ - movl $PROT_DATA_SEG, %eax - movl %ax, %ds - movl %ax, %es - movl %ax, %ss - movl $start16 + STACKOFF, %esp # set up stack pointer - addl $start16 + STACKOFF, %ebp # set up stack pointer - - /*---------------------------------------------------------------------+ - | we have to enable A20 in order to access memory above 1MByte - +---------------------------------------------------------------------*/ - call empty_8042 - movb $0xD1, %al # command write - outb %al, $0x64 - call empty_8042 - movb $0xDF, %al # A20 on - outb %al, $0x60 - call empty_8042 - - movl %cs:HDRSTART + HDROFF, %eax # - pushl %eax # jump to start of 32 bit code - ret # - -/*----------------------------------------------------------------------------+ -| delay -+------------------------------------------------------------------------------ -| Delay is needed after doing I/O. We do it by writing to a non-existent port. -+----------------------------------------------------------------------------*/ - .globl _delay - .globl delay -delay: -_delay: - outb %al, $0xED # about 1uS delay - ret - -/*----------------------------------------------------------------------------+ -| empty_8042 -+------------------------------------------------------------------------------ -| This routine checks that the keyboard command queue is empty (after emptying -| the output buffers). -| No timeout is used - if this hangs there is something wrong with the machine, -| and we probably couldn't proceed anyway. -+----------------------------------------------------------------------------*/ - .globl _empty_8042 - .globl empty_8042 -empty_8042: -_empty_8042: - call delay - inb $0x64, %al # 8042 status port - testb $0x01, %al # output buffer? - jz no_output - call delay - in $0x60, %al # read it - jmp empty_8042 -no_output: - test $0x02, %al # is input buffer full? - jnz empty_8042 # yes - loop - ret - -/*----------------------------------------------------------------------------+ -| DATA section -+----------------------------------------------------------------------------*/ - -/************************** -* GLOBAL DESCRIPTOR TABLE * -**************************/ - - .p2align 4 -gdtptr: - /* we use the NULL descriptor to store the GDT pointer - a trick quite - nifty due to: Robert Collins (rcollins@x86.org) */ - .word gdtlen - 1 - .long gdtptr - .word 0x0000 - - /* code segment */ - .word 0xffff, 0 - .byte 0, 0x9f, 0xcf, 0 - - /* data segment */ - .word 0xffff, 0 - .byte 0, 0x93, 0xcf, 0 - - .set gdtlen, . - gdtptr # length of GDT - diff --git a/c/src/lib/libbsp/i386/pc386/startup/Makefile.in b/c/src/lib/libbsp/i386/pc386/startup/Makefile.in index c0da505e2d..6fb8f9cca7 100644 --- a/c/src/lib/libbsp/i386/pc386/startup/Makefile.in +++ b/c/src/lib/libbsp/i386/pc386/startup/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=ldsegs irq_asm -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(srcdir)/linkcmds $(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S new file mode 100644 index 0000000000..8805128e69 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.S @@ -0,0 +1,222 @@ +/*-------------------------------------------------------------------------+ +| ldsegs.s v1.1 - PC386 BSP - 1997/08/07 ++--------------------------------------------------------------------------+ +| This file assists the board independent startup code by loading the proper +| segment register values. The values loaded are board dependent. In addition +| it contains code to enable the A20 line and to reprogram the PIC to relocate +| the IRQ interrupt vectors to 0x20 -> 0x2f. +| NOTE: No stack has been established when this routine is invoked. +| It returns by jumping back to bspentry. ++--------------------------------------------------------------------------+ +| (C) Copyright 1997 - +| - NavIST Group - Real-Time Distributed Systems and Industrial Automation +| +| http://pandora.ist.utl.pt +| +| Instituto Superior Tecnico * Lisboa * PORTUGAL ++--------------------------------------------------------------------------+ +| Disclaimer: +| +| This file is provided "AS IS" without warranty of any kind, either +| expressed or implied. ++--------------------------------------------------------------------------+ +| This code is base on: +| ldsegs.s,v 1.4 1996/04/20 16:48:30 joel Exp - go32 BSP +| With the following copyright notice: +| ************************************************************************** +| * COPYRIGHT (c) 1989-1998. +| * On-Line Applications Research Corporation (OAR). +| * Copyright assigned to U.S. Government, 1994. +| * +| * The license and distribution terms for this file may be +| * found in found in the file LICENSE in this distribution or at +| * http://www.OARcorp.com/rtems/license.html. +| ************************************************************************** +| +| $Id$ +| +| Also based on (from the Linux source tree): +| setup.S - Copyright (C) 1991, 1992 Linus Torvalds ++--------------------------------------------------------------------------*/ + + +#include "asm.h" + +/*----------------------------------------------------------------------------+ +| CODE section ++----------------------------------------------------------------------------*/ +EXTERN (rtems_i8259_masks) + +BEGIN_CODE + + EXTERN (_establish_stack) + EXTERN (Timer_exit) + EXTERN (clockOff) + + .p2align 4 +/*----------------------------------------------------------------------------+ +| delay ++------------------------------------------------------------------------------ +| Delay is needed after doing I/O. We do it by writing to a non-existent port. ++----------------------------------------------------------------------------*/ +SYM(delay): + outb al, $0xED # about 1uS delay + ret + +/*-------------------------------------------------------------------------+ +| Function: _load_segments +| Description: Current environment is standard PC booted by grub. +| So, there is no value in saving current GDT and IDT +| settings we have to set it up ourseves. (Naturally +| it will be not so in case we are booted by some +| boot monitor, however, then it will be different +| BSP). After that we have to load board segment registers +| with apropriate values + reprogram PIC. +| Global Variables: None. +| Arguments: None. +| Returns: Nothing. ++--------------------------------------------------------------------------*/ + .p2align 4 + + PUBLIC (_load_segments) +SYM (_load_segments): + + lgdt SYM(gdtdesc) + lidt SYM(idtdesc) + + /* Load CS, flush prefetched queue */ + ljmp $0x8, $next_step + +next_step: + /* Load segment registers */ + movw $0x10, ax + movw ax, ss + movw ax, ds + movw ax, es + movw ax, fs + movw ax, gs + +/*---------------------------------------------------------------------+ +| Now we have to reprogram the interrupts :-(. We put them right after +| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they +| won't mess up anything. Sadly IBM really messed this up with the +| original PC, and they haven't been able to rectify it afterwards. Thus +| the bios puts interrupts at 0x08-0x0f, which is used for the internal +| hardware interrupts as well. We just have to reprogram the 8259's, and +| it isn't fun. ++---------------------------------------------------------------------*/ + + movb $0x11, al /* initialization sequence */ + outb al, $0x20 /* send it to 8259A-1 */ + call SYM(delay) + outb al, $0xA0 /* and to 8259A-2 */ + call SYM(delay) + + movb $0x20, al /* start of hardware int's (0x20) */ + outb al, $0x21 + call SYM(delay) + movb $0x28, al /* start of hardware int's 2 (0x28) */ + outb al, $0xA1 + call SYM(delay) + + movb $0x04, al /* 8259-1 is master */ + outb al, $0x21 + call SYM(delay) + movb $0x02, al /* 8259-2 is slave */ + outb al, $0xA1 + call SYM(delay) + + movb $0x01, al /* 8086 mode for both */ + outb al, $0x21 + call SYM(delay) + outb al, $0xA1 + call SYM(delay) + + movb $0xFF, al /* mask off all interrupts for now */ + outb al, $0xA1 + call SYM(delay) + movb $0xFB, al /* mask all irq's but irq2 which */ + outb al, $0x21 /* is cascaded */ + call SYM(delay) + + movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ + + jmp SYM (_establish_stack) # return to the bsp entry code + +/*-------------------------------------------------------------------------+ +| Function: _return_to_monitor +| Description: Return to board's monitor (we have none so simply restart). +| Global Variables: None. +| Arguments: None. +| Returns: Nothing. ++--------------------------------------------------------------------------*/ + + .p2align 4 + + PUBLIC (_return_to_monitor) +SYM (_return_to_monitor): + + call SYM (Timer_exit) + call SYM (Clock_exit) + jmp SYM (start) + +/*-------------------------------------------------------------------------+ +| Function: _default_int_handler +| Description: default interrupt handler +| Global Variables: None. +| Arguments: None. +| Returns: Nothing. ++--------------------------------------------------------------------------*/ + .p2align 4 + +/*---------------------------------------------------------------------------+ +| GDT itself ++--------------------------------------------------------------------------*/ + + .p2align 4 + + PUBLIC (_Global_descriptor_table) +SYM (_Global_descriptor_table): + + /* NULL segment */ + .word 0, 0 + .byte 0, 0, 0, 0 + + /* code segment */ + .word 0xffff, 0 + .byte 0, 0x9e, 0xcf, 0 + + /* data segment */ + .word 0xffff, 0 + .byte 0, 0x92, 0xcf, 0 + + +/*---------------------------------------------------------------------------+ +| Descriptor of GDT ++--------------------------------------------------------------------------*/ +SYM (gdtdesc): + .word (3*8 - 1) + .long SYM (_Global_descriptor_table) + + +/*---------------------------------------------------------------------------+ +| IDT itself ++---------------------------------------------------------------------------*/ + .p2align 4 + + PUBLIC(Interrupt_descriptor_table) +SYM(Interrupt_descriptor_table): + .rept 256 + .word 0,0,0,0 + .endr + +/*---------------------------------------------------------------------------+ +| Descriptor of IDT ++--------------------------------------------------------------------------*/ +SYM(idtdesc): + .word (256*8 - 1) + .long SYM (Interrupt_descriptor_table) + +END_CODE + +END diff --git a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s b/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s deleted file mode 100644 index 8805128e69..0000000000 --- a/c/src/lib/libbsp/i386/pc386/startup/ldsegs.s +++ /dev/null @@ -1,222 +0,0 @@ -/*-------------------------------------------------------------------------+ -| ldsegs.s v1.1 - PC386 BSP - 1997/08/07 -+--------------------------------------------------------------------------+ -| This file assists the board independent startup code by loading the proper -| segment register values. The values loaded are board dependent. In addition -| it contains code to enable the A20 line and to reprogram the PIC to relocate -| the IRQ interrupt vectors to 0x20 -> 0x2f. -| NOTE: No stack has been established when this routine is invoked. -| It returns by jumping back to bspentry. -+--------------------------------------------------------------------------+ -| (C) Copyright 1997 - -| - NavIST Group - Real-Time Distributed Systems and Industrial Automation -| -| http://pandora.ist.utl.pt -| -| Instituto Superior Tecnico * Lisboa * PORTUGAL -+--------------------------------------------------------------------------+ -| Disclaimer: -| -| This file is provided "AS IS" without warranty of any kind, either -| expressed or implied. -+--------------------------------------------------------------------------+ -| This code is base on: -| ldsegs.s,v 1.4 1996/04/20 16:48:30 joel Exp - go32 BSP -| With the following copyright notice: -| ************************************************************************** -| * COPYRIGHT (c) 1989-1998. -| * On-Line Applications Research Corporation (OAR). -| * Copyright assigned to U.S. Government, 1994. -| * -| * The license and distribution terms for this file may be -| * found in found in the file LICENSE in this distribution or at -| * http://www.OARcorp.com/rtems/license.html. -| ************************************************************************** -| -| $Id$ -| -| Also based on (from the Linux source tree): -| setup.S - Copyright (C) 1991, 1992 Linus Torvalds -+--------------------------------------------------------------------------*/ - - -#include "asm.h" - -/*----------------------------------------------------------------------------+ -| CODE section -+----------------------------------------------------------------------------*/ -EXTERN (rtems_i8259_masks) - -BEGIN_CODE - - EXTERN (_establish_stack) - EXTERN (Timer_exit) - EXTERN (clockOff) - - .p2align 4 -/*----------------------------------------------------------------------------+ -| delay -+------------------------------------------------------------------------------ -| Delay is needed after doing I/O. We do it by writing to a non-existent port. -+----------------------------------------------------------------------------*/ -SYM(delay): - outb al, $0xED # about 1uS delay - ret - -/*-------------------------------------------------------------------------+ -| Function: _load_segments -| Description: Current environment is standard PC booted by grub. -| So, there is no value in saving current GDT and IDT -| settings we have to set it up ourseves. (Naturally -| it will be not so in case we are booted by some -| boot monitor, however, then it will be different -| BSP). After that we have to load board segment registers -| with apropriate values + reprogram PIC. -| Global Variables: None. -| Arguments: None. -| Returns: Nothing. -+--------------------------------------------------------------------------*/ - .p2align 4 - - PUBLIC (_load_segments) -SYM (_load_segments): - - lgdt SYM(gdtdesc) - lidt SYM(idtdesc) - - /* Load CS, flush prefetched queue */ - ljmp $0x8, $next_step - -next_step: - /* Load segment registers */ - movw $0x10, ax - movw ax, ss - movw ax, ds - movw ax, es - movw ax, fs - movw ax, gs - -/*---------------------------------------------------------------------+ -| Now we have to reprogram the interrupts :-(. We put them right after -| the intel-reserved hardware interrupts, at int 0x20-0x2F. There they -| won't mess up anything. Sadly IBM really messed this up with the -| original PC, and they haven't been able to rectify it afterwards. Thus -| the bios puts interrupts at 0x08-0x0f, which is used for the internal -| hardware interrupts as well. We just have to reprogram the 8259's, and -| it isn't fun. -+---------------------------------------------------------------------*/ - - movb $0x11, al /* initialization sequence */ - outb al, $0x20 /* send it to 8259A-1 */ - call SYM(delay) - outb al, $0xA0 /* and to 8259A-2 */ - call SYM(delay) - - movb $0x20, al /* start of hardware int's (0x20) */ - outb al, $0x21 - call SYM(delay) - movb $0x28, al /* start of hardware int's 2 (0x28) */ - outb al, $0xA1 - call SYM(delay) - - movb $0x04, al /* 8259-1 is master */ - outb al, $0x21 - call SYM(delay) - movb $0x02, al /* 8259-2 is slave */ - outb al, $0xA1 - call SYM(delay) - - movb $0x01, al /* 8086 mode for both */ - outb al, $0x21 - call SYM(delay) - outb al, $0xA1 - call SYM(delay) - - movb $0xFF, al /* mask off all interrupts for now */ - outb al, $0xA1 - call SYM(delay) - movb $0xFB, al /* mask all irq's but irq2 which */ - outb al, $0x21 /* is cascaded */ - call SYM(delay) - - movw $0xFFFB, SYM(i8259s_cache) /* set up same values in cache */ - - jmp SYM (_establish_stack) # return to the bsp entry code - -/*-------------------------------------------------------------------------+ -| Function: _return_to_monitor -| Description: Return to board's monitor (we have none so simply restart). -| Global Variables: None. -| Arguments: None. -| Returns: Nothing. -+--------------------------------------------------------------------------*/ - - .p2align 4 - - PUBLIC (_return_to_monitor) -SYM (_return_to_monitor): - - call SYM (Timer_exit) - call SYM (Clock_exit) - jmp SYM (start) - -/*-------------------------------------------------------------------------+ -| Function: _default_int_handler -| Description: default interrupt handler -| Global Variables: None. -| Arguments: None. -| Returns: Nothing. -+--------------------------------------------------------------------------*/ - .p2align 4 - -/*---------------------------------------------------------------------------+ -| GDT itself -+--------------------------------------------------------------------------*/ - - .p2align 4 - - PUBLIC (_Global_descriptor_table) -SYM (_Global_descriptor_table): - - /* NULL segment */ - .word 0, 0 - .byte 0, 0, 0, 0 - - /* code segment */ - .word 0xffff, 0 - .byte 0, 0x9e, 0xcf, 0 - - /* data segment */ - .word 0xffff, 0 - .byte 0, 0x92, 0xcf, 0 - - -/*---------------------------------------------------------------------------+ -| Descriptor of GDT -+--------------------------------------------------------------------------*/ -SYM (gdtdesc): - .word (3*8 - 1) - .long SYM (_Global_descriptor_table) - - -/*---------------------------------------------------------------------------+ -| IDT itself -+---------------------------------------------------------------------------*/ - .p2align 4 - - PUBLIC(Interrupt_descriptor_table) -SYM(Interrupt_descriptor_table): - .rept 256 - .word 0,0,0,0 - .endr - -/*---------------------------------------------------------------------------+ -| Descriptor of IDT -+--------------------------------------------------------------------------*/ -SYM(idtdesc): - .word (256*8 - 1) - .long SYM (Interrupt_descriptor_table) - -END_CODE - -END diff --git a/c/src/lib/libbsp/i386/pc386/timer/Makefile.in b/c/src/lib/libbsp/i386/pc386/timer/Makefile.in index 24809cbed8..21ca9675e7 100644 --- a/c/src/lib/libbsp/i386/pc386/timer/Makefile.in +++ b/c/src/lib/libbsp/i386/pc386/timer/Makefile.in @@ -17,10 +17,10 @@ C_O_FILES=$(C_PIECES:%=${ARCH}/%.o) H_FILES= -# Assembly source names, if any, go here -- minus the .s +# Assembly source names, if any, go here -- minus the .S S_PIECES=timerisr -S_FILES=$(S_PIECES:%=%.s) -S_O_FILES=$(S_FILES:%.s=${ARCH}/%.o) +S_FILES=$(S_PIECES:%=%.S) +S_O_FILES=$(S_FILES:%.S=${ARCH}/%.o) SRCS=$(C_FILES) $(H_FILES) $(S_FILES) OBJS=$(C_O_FILES) $(S_O_FILES) diff --git a/c/src/lib/libbsp/i386/pc386/timer/timerisr.S b/c/src/lib/libbsp/i386/pc386/timer/timerisr.S new file mode 100644 index 0000000000..f6670efdc1 --- /dev/null +++ b/c/src/lib/libbsp/i386/pc386/timer/timerisr.S @@ -0,0 +1,61 @@ +/*-------------------------------------------------------------------------+ +| timerisr.s v1.1 - PC386 BSP - 1997/08/07 ++--------------------------------------------------------------------------+ +| This file contains the PC386 timer interrupt handler. ++--------------------------------------------------------------------------+ +| (C) Copyright 1997 - +| - NavIST Group - Real-Time Distributed Systems and Industrial Automation +| +| http://pandora.ist.utl.pt +| +| Instituto Superior Tecnico * Lisboa * PORTUGAL ++--------------------------------------------------------------------------+ +| Disclaimer: +| +| This file is provided "AS IS" without warranty of any kind, either +| expressed or implied. ++--------------------------------------------------------------------------+ +| This code is base on: +| timerisr.s,v 1.5 1995/12/19 20:07:45 joel Exp - go32 BSP +| With the following copyright notice: +| ************************************************************************** +| * COPYRIGHT (c) 1989-1998. +| * On-Line Applications Research Corporation (OAR). +| * Copyright assigned to U.S. Government, 1994. +| * +| * The license and distribution terms for this file may be +| * found in found in the file LICENSE in this distribution or at +| * http://www.OARcorp.com/rtems/license.html. +| ************************************************************************** +| +| $Id$ ++--------------------------------------------------------------------------*/ + + +#include "asm.h" + +BEGIN_CODE + + EXTERN(Ttimer_val) + +/*-------------------------------------------------------------------------+ +| Function: rtems_isr timerisr(rtems_vector_number); +| Description: ISR for the timer. The timer is set up to generate an +| interrupt at maximum intervals. +| Global Variables: None. +| Arguments: standard - see RTEMS documentation. +| Returns: standard return value - see RTEMS documentation. ++--------------------------------------------------------------------------*/ + PUBLIC(timerisr) +SYM (timerisr): + incl Ttimer_val # another tick + pushl eax + movb $0x20, al + outb al, $0x20 # signal generic End Of Interrupt (EOI) to PIC + popl eax + iret + +END_CODE + +END + diff --git a/c/src/lib/libbsp/i386/pc386/timer/timerisr.s b/c/src/lib/libbsp/i386/pc386/timer/timerisr.s deleted file mode 100644 index f6670efdc1..0000000000 --- a/c/src/lib/libbsp/i386/pc386/timer/timerisr.s +++ /dev/null @@ -1,61 +0,0 @@ -/*-------------------------------------------------------------------------+ -| timerisr.s v1.1 - PC386 BSP - 1997/08/07 -+--------------------------------------------------------------------------+ -| This file contains the PC386 timer interrupt handler. -+--------------------------------------------------------------------------+ -| (C) Copyright 1997 - -| - NavIST Group - Real-Time Distributed Systems and Industrial Automation -| -| http://pandora.ist.utl.pt -| -| Instituto Superior Tecnico * Lisboa * PORTUGAL -+--------------------------------------------------------------------------+ -| Disclaimer: -| -| This file is provided "AS IS" without warranty of any kind, either -| expressed or implied. -+--------------------------------------------------------------------------+ -| This code is base on: -| timerisr.s,v 1.5 1995/12/19 20:07:45 joel Exp - go32 BSP -| With the following copyright notice: -| ************************************************************************** -| * COPYRIGHT (c) 1989-1998. -| * On-Line Applications Research Corporation (OAR). -| * Copyright assigned to U.S. Government, 1994. -| * -| * The license and distribution terms for this file may be -| * found in found in the file LICENSE in this distribution or at -| * http://www.OARcorp.com/rtems/license.html. -| ************************************************************************** -| -| $Id$ -+--------------------------------------------------------------------------*/ - - -#include "asm.h" - -BEGIN_CODE - - EXTERN(Ttimer_val) - -/*-------------------------------------------------------------------------+ -| Function: rtems_isr timerisr(rtems_vector_number); -| Description: ISR for the timer. The timer is set up to generate an -| interrupt at maximum intervals. -| Global Variables: None. -| Arguments: standard - see RTEMS documentation. -| Returns: standard return value - see RTEMS documentation. -+--------------------------------------------------------------------------*/ - PUBLIC(timerisr) -SYM (timerisr): - incl Ttimer_val # another tick - pushl eax - movb $0x20, al - outb al, $0x20 # signal generic End Of Interrupt (EOI) to PIC - popl eax - iret - -END_CODE - -END - diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.S b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S new file mode 100644 index 0000000000..4be08ed992 --- /dev/null +++ b/c/src/lib/libbsp/i386/shared/irq/irq_asm.S @@ -0,0 +1,250 @@ +/* irq.c + * + * This file contains the implementation of the function described in irq.h + * + * CopyRight (C) 1998 valette@crf.canon.fr + * + * The license and distribution terms for this file may be + * found in found in the file LICENSE in this distribution or at + * http://www.OARcorp.com/rtems/license.html. + * + * $Id$ + */ + +#include "asm.h" +#include + + BEGIN_CODE + +SYM (_ISR_Handler): + /* + * Before this was point is reached the vectors unique + * entry point did the following: + * + * 1. saved scratch registers registers eax edx ecx" + * 2. put the vector number in ecx. + * + * BEGINNING OF ESTABLISH SEGMENTS + * + * WARNING: If an interrupt can occur when the segments are + * not correct, then this is where we should establish + * the segments. In addition to establishing the + * segments, it may be necessary to establish a stack + * in the current data area on the outermost interrupt. + * + * NOTE: If the previous values of the segment registers are + * pushed, do not forget to adjust SAVED_REGS. + * + * NOTE: Make sure the exit code which restores these + * when this type of code is needed. + */ + + /***** ESTABLISH SEGMENTS CODE GOES HERE ******/ + + /* + * END OF ESTABLISH SEGMENTS + */ + + /* + * Now switch stacks if necessary + */ + + movw SYM (i8259s_cache), ax # move current i8259 interrupt mask in ax + pushl eax # push it on the stack + /* + * compute the new PIC mask: + * + * = | irq_mask_or_tbl[] + */ + movw SYM (irq_mask_or_tbl) (,ecx,2), dx + orw dx, ax + /* + * Install new computed value on the i8259 and update cache + * accordingly + */ + movw ax, SYM (i8259s_cache) + outb $PIC_MASTER_IMR_IO_PORT + movb ah, al + outb $PIC_SLAVE_IMR_IO_PORT + + /* + * acknowledge the interrupt + * + */ + movb $PIC_EOI, al + cmpl $7, ecx + jbe .master + outb $PIC_SLAVE_COMMAND_IO_PORT +.master: + outb $PIC_MASTER_COMMAND_IO_PORT + +.check_stack_switch: + pushl ebp + movl esp, ebp # ebp = previous stack pointer + cmpl $0, SYM (_ISR_Nest_level) # is this the outermost interrupt? + jne nested # No, then continue + movl SYM (_CPU_Interrupt_stack_high), esp + + /* + * We want to insure that the old stack pointer is on the + * stack we will be on at the end of the ISR when we restore it. + * By saving it on every interrupt, all we have to do is pop it + * near the end of every interrupt. + */ + +nested: + incl SYM (_ISR_Nest_level) # one nest level deeper + incl SYM (_Thread_Dispatch_disable_level) # disable multitasking + /* + * re-enable interrupts at processor level as the current + * interrupt source is now masked via i8259 + */ + sti + + /* + * ECX is preloaded with the vector number but it is a scratch register + * so we must save it again. + */ + + pushl ecx # push vector number + mov SYM (current_irq) (,ecx,4),eax + # eax = Users handler + call *eax # invoke user ISR + /* + * disable interrupts_again + */ + cli + popl ecx # ecx = vector number + /* + * restore stack + */ + movl ebp, esp + popl ebp + + /* + * restore the original i8259 masks + */ + popl eax + movw ax, SYM (i8259s_cache) + outb $PIC_MASTER_IMR_IO_PORT + movb ah, al + outb $PIC_SLAVE_IMR_IO_PORT + + + decl SYM (_ISR_Nest_level) # one less ISR nest level + # If interrupts are nested, + # then dispatching is disabled + + decl SYM (_Thread_Dispatch_disable_level) + # unnest multitasking + # Is dispatch disabled + jne .exit # Yes, then exit + + cmpl $0, SYM (_Context_Switch_necessary) + # Is task switch necessary? + jne .schedule # Yes, then call the scheduler + + cmpl $0, SYM (_ISR_Signals_to_thread_executing) + # signals sent to Run_thread + # while in interrupt handler? + je .exit # No, exit + + +.bframe: + movl $0, SYM (_ISR_Signals_to_thread_executing) + /* + * This code is the less critical path. In order to have a single + * Thread Context, we take the same frame than the one pushed on + * exceptions. This makes sense because Signal is a software + * exception. + */ + popl edx + popl ecx + popl eax + + pushl $0 # fake fault code + pushl $0 # fake exception number + + pusha + pushl esp + call _ThreadProcessSignalsFromIrq + addl $4, esp + popa + addl $8, esp + iret + +.schedule: + /* + * the scratch registers have already been saved and we are already + * back on the thread system stack. So we can call _Thread_Displatch + * directly + */ + call _Thread_Dispatch + /* + * fall through exit to restore complete contex (scratch registers + * eip, CS, Flags). + */ +.exit: + /* + * BEGINNING OF DE-ESTABLISH SEGMENTS + * + * NOTE: Make sure there is code here if code is added to + * load the segment registers. + * + */ + + /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/ + + /* + * END OF DE-ESTABLISH SEGMENTS + */ + popl edx + popl ecx + popl eax + iret + + +#define DISTINCT_INTERRUPT_ENTRY(_vector) \ + .p2align 4 ; \ + PUBLIC (rtems_irq_prologue_ ## _vector ) ; \ +SYM (rtems_irq_prologue_ ## _vector ): \ + pushl eax ; \ + pushl ecx ; \ + pushl edx ; \ + movl $ _vector, ecx ; \ + jmp SYM (_ISR_Handler) ; + +DISTINCT_INTERRUPT_ENTRY(0) +DISTINCT_INTERRUPT_ENTRY(1) +DISTINCT_INTERRUPT_ENTRY(2) +DISTINCT_INTERRUPT_ENTRY(3) +DISTINCT_INTERRUPT_ENTRY(4) +DISTINCT_INTERRUPT_ENTRY(5) +DISTINCT_INTERRUPT_ENTRY(6) +DISTINCT_INTERRUPT_ENTRY(7) +DISTINCT_INTERRUPT_ENTRY(8) +DISTINCT_INTERRUPT_ENTRY(9) +DISTINCT_INTERRUPT_ENTRY(10) +DISTINCT_INTERRUPT_ENTRY(11) +DISTINCT_INTERRUPT_ENTRY(12) +DISTINCT_INTERRUPT_ENTRY(13) +DISTINCT_INTERRUPT_ENTRY(14) +DISTINCT_INTERRUPT_ENTRY(15) + + /* + * routine used to initialize the IDT by default + */ + +PUBLIC (default_raw_idt_handler) +PUBLIC (raw_idt_notify) + +SYM (default_raw_idt_handler): + pusha + cld + call raw_idt_notify + popa + iret + +END_CODE + +END diff --git a/c/src/lib/libbsp/i386/shared/irq/irq_asm.s b/c/src/lib/libbsp/i386/shared/irq/irq_asm.s deleted file mode 100644 index 4be08ed992..0000000000 --- a/c/src/lib/libbsp/i386/shared/irq/irq_asm.s +++ /dev/null @@ -1,250 +0,0 @@ -/* irq.c - * - * This file contains the implementation of the function described in irq.h - * - * CopyRight (C) 1998 valette@crf.canon.fr - * - * The license and distribution terms for this file may be - * found in found in the file LICENSE in this distribution or at - * http://www.OARcorp.com/rtems/license.html. - * - * $Id$ - */ - -#include "asm.h" -#include - - BEGIN_CODE - -SYM (_ISR_Handler): - /* - * Before this was point is reached the vectors unique - * entry point did the following: - * - * 1. saved scratch registers registers eax edx ecx" - * 2. put the vector number in ecx. - * - * BEGINNING OF ESTABLISH SEGMENTS - * - * WARNING: If an interrupt can occur when the segments are - * not correct, then this is where we should establish - * the segments. In addition to establishing the - * segments, it may be necessary to establish a stack - * in the current data area on the outermost interrupt. - * - * NOTE: If the previous values of the segment registers are - * pushed, do not forget to adjust SAVED_REGS. - * - * NOTE: Make sure the exit code which restores these - * when this type of code is needed. - */ - - /***** ESTABLISH SEGMENTS CODE GOES HERE ******/ - - /* - * END OF ESTABLISH SEGMENTS - */ - - /* - * Now switch stacks if necessary - */ - - movw SYM (i8259s_cache), ax # move current i8259 interrupt mask in ax - pushl eax # push it on the stack - /* - * compute the new PIC mask: - * - * = | irq_mask_or_tbl[] - */ - movw SYM (irq_mask_or_tbl) (,ecx,2), dx - orw dx, ax - /* - * Install new computed value on the i8259 and update cache - * accordingly - */ - movw ax, SYM (i8259s_cache) - outb $PIC_MASTER_IMR_IO_PORT - movb ah, al - outb $PIC_SLAVE_IMR_IO_PORT - - /* - * acknowledge the interrupt - * - */ - movb $PIC_EOI, al - cmpl $7, ecx - jbe .master - outb $PIC_SLAVE_COMMAND_IO_PORT -.master: - outb $PIC_MASTER_COMMAND_IO_PORT - -.check_stack_switch: - pushl ebp - movl esp, ebp # ebp = previous stack pointer - cmpl $0, SYM (_ISR_Nest_level) # is this the outermost interrupt? - jne nested # No, then continue - movl SYM (_CPU_Interrupt_stack_high), esp - - /* - * We want to insure that the old stack pointer is on the - * stack we will be on at the end of the ISR when we restore it. - * By saving it on every interrupt, all we have to do is pop it - * near the end of every interrupt. - */ - -nested: - incl SYM (_ISR_Nest_level) # one nest level deeper - incl SYM (_Thread_Dispatch_disable_level) # disable multitasking - /* - * re-enable interrupts at processor level as the current - * interrupt source is now masked via i8259 - */ - sti - - /* - * ECX is preloaded with the vector number but it is a scratch register - * so we must save it again. - */ - - pushl ecx # push vector number - mov SYM (current_irq) (,ecx,4),eax - # eax = Users handler - call *eax # invoke user ISR - /* - * disable interrupts_again - */ - cli - popl ecx # ecx = vector number - /* - * restore stack - */ - movl ebp, esp - popl ebp - - /* - * restore the original i8259 masks - */ - popl eax - movw ax, SYM (i8259s_cache) - outb $PIC_MASTER_IMR_IO_PORT - movb ah, al - outb $PIC_SLAVE_IMR_IO_PORT - - - decl SYM (_ISR_Nest_level) # one less ISR nest level - # If interrupts are nested, - # then dispatching is disabled - - decl SYM (_Thread_Dispatch_disable_level) - # unnest multitasking - # Is dispatch disabled - jne .exit # Yes, then exit - - cmpl $0, SYM (_Context_Switch_necessary) - # Is task switch necessary? - jne .schedule # Yes, then call the scheduler - - cmpl $0, SYM (_ISR_Signals_to_thread_executing) - # signals sent to Run_thread - # while in interrupt handler? - je .exit # No, exit - - -.bframe: - movl $0, SYM (_ISR_Signals_to_thread_executing) - /* - * This code is the less critical path. In order to have a single - * Thread Context, we take the same frame than the one pushed on - * exceptions. This makes sense because Signal is a software - * exception. - */ - popl edx - popl ecx - popl eax - - pushl $0 # fake fault code - pushl $0 # fake exception number - - pusha - pushl esp - call _ThreadProcessSignalsFromIrq - addl $4, esp - popa - addl $8, esp - iret - -.schedule: - /* - * the scratch registers have already been saved and we are already - * back on the thread system stack. So we can call _Thread_Displatch - * directly - */ - call _Thread_Dispatch - /* - * fall through exit to restore complete contex (scratch registers - * eip, CS, Flags). - */ -.exit: - /* - * BEGINNING OF DE-ESTABLISH SEGMENTS - * - * NOTE: Make sure there is code here if code is added to - * load the segment registers. - * - */ - - /******* DE-ESTABLISH SEGMENTS CODE GOES HERE ********/ - - /* - * END OF DE-ESTABLISH SEGMENTS - */ - popl edx - popl ecx - popl eax - iret - - -#define DISTINCT_INTERRUPT_ENTRY(_vector) \ - .p2align 4 ; \ - PUBLIC (rtems_irq_prologue_ ## _vector ) ; \ -SYM (rtems_irq_prologue_ ## _vector ): \ - pushl eax ; \ - pushl ecx ; \ - pushl edx ; \ - movl $ _vector, ecx ; \ - jmp SYM (_ISR_Handler) ; - -DISTINCT_INTERRUPT_ENTRY(0) -DISTINCT_INTERRUPT_ENTRY(1) -DISTINCT_INTERRUPT_ENTRY(2) -DISTINCT_INTERRUPT_ENTRY(3) -DISTINCT_INTERRUPT_ENTRY(4) -DISTINCT_INTERRUPT_ENTRY(5) -DISTINCT_INTERRUPT_ENTRY(6) -DISTINCT_INTERRUPT_ENTRY(7) -DISTINCT_INTERRUPT_ENTRY(8) -DISTINCT_INTERRUPT_ENTRY(9) -DISTINCT_INTERRUPT_ENTRY(10) -DISTINCT_INTERRUPT_ENTRY(11) -DISTINCT_INTERRUPT_ENTRY(12) -DISTINCT_INTERRUPT_ENTRY(13) -DISTINCT_INTERRUPT_ENTRY(14) -DISTINCT_INTERRUPT_ENTRY(15) - - /* - * routine used to initialize the IDT by default - */ - -PUBLIC (default_raw_idt_handler) -PUBLIC (raw_idt_notify) - -SYM (default_raw_idt_handler): - pusha - cld - call raw_idt_notify - popa - iret - -END_CODE - -END -- cgit v1.2.3