From ac7d5ef06a6d6e8d84abbd1f0b82162725f98326 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Thu, 11 May 1995 17:39:37 +0000 Subject: Initial revision --- c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README | 9 +++ .../lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c | 30 ++++++++ c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c | 84 ++++++++++++++++++++++ c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c | 64 +++++++++++++++++ c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c | 75 +++++++++++++++++++ c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c | 27 +++++++ 6 files changed, 289 insertions(+) create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c create mode 100644 c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c (limited to 'c/src/lib/libbsp/hppa1.1/simhppa/shmsupp') diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README new file mode 100644 index 0000000000..cf60698ca4 --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/README @@ -0,0 +1,9 @@ +# +# $Id$ +# + +This directory contains the SHM driver support files for the +HP PA-RISC simulator for the 72000 processor. + +WARNING: The interrupt support in this directory currently will + only work in a homogeneous system. diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c new file mode 100644 index 0000000000..0d67bba2a6 --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/addrconv.c @@ -0,0 +1,30 @@ +/* Shm_Convert_address + * + * No address range conversion is required. + * + * Input parameters: + * address - address to convert + * + * Output parameters: + * returns - converted address + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +void *Shm_Convert_address( + void *address +) +{ + return ( address ); +} diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c new file mode 100644 index 0000000000..e21e62f55d --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/getcfg.c @@ -0,0 +1,84 @@ +/* void Shm_Get_configuration( localnode, &shmcfg ) + * + * This routine initializes, if necessary, and returns a pointer + * to the Shared Memory Configuration Table for the HP PA-RISC + * simulator. + * + * INPUT PARAMETERS: + * localnode - local node number + * shmcfg - address of pointer to SHM Config Table + * + * OUTPUT PARAMETERS: + * *shmcfg - pointer to SHM Config Table + * + * NOTES: The MP interrupt used is the Runway bus' ability to directly + * address the control registers of up to four CPUs and cause + * interrupts on them. + * + * The following table illustrates the configuration limitations: + * + * BUS MAX + * MODE ENDIAN NODES + * ========= ====== ======= + * POLLED BIG 2+ + * INTERRUPT BIG 2..4 (on Runway) + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +#include "shm.h" + +#define INTERRUPT 0 /* can be interrupt or polling */ +#define POLLING 1 + +shm_config_table BSP_shm_cfgtbl; + +void Shm_Cause_interrupt_simhppa( + rtems_unsigned32 node +); + +void Shm_Get_configuration( + rtems_unsigned32 localnode, + shm_config_table **shmcfg +) +{ + BSP_shm_cfgtbl.base = (vol_u32 *) 0x44000000; + BSP_shm_cfgtbl.length = 16 * KILOBYTE; + BSP_shm_cfgtbl.format = SHM_BIG; + + BSP_shm_cfgtbl.cause_intr = Shm_Cause_interrupt_simhppa; + +#ifdef NEUTRAL_BIG + BSP_shm_cfgtbl.convert = NULL_CONVERT; +#else + BSP_shm_cfgtbl.convert = CPU_swap_u32; +#endif + +#if ( POLLING == 1 ) + BSP_shm_cfgtbl.poll_intr = POLLED_MODE; + BSP_shm_cfgtbl.Intr.address = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.value = NO_INTERRUPT; + BSP_shm_cfgtbl.Intr.length = NO_INTERRUPT; +#else + BSP_shm_cfgtbl.poll_intr = INTR_MODE; + BSP_shm_cfgtbl.Intr.address = + (vol_u32 *) (HPPA_RUNWAY_HPA( localnode - 1) + + HPPA_RUNWAY_REG_IO_EIR_OFFSET); + BSP_shm_cfgtbl.Intr.value = HPPA_INTERRUPT_EXTERNAL_MPCI; + BSP_shm_cfgtbl.Intr.length = LONG; +#endif + + *shmcfg = &BSP_shm_cfgtbl; +} + diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c new file mode 100644 index 0000000000..6af0c6ace6 --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/intr.c @@ -0,0 +1,64 @@ +/* void Shm_Cause_interrupt_simhppa( node ) + * + * This routine is the shared memory driver routine which + * generates interrupts to other CPUs. + * + * Input parameters: + * node - destination of this packet (0 = broadcast) + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include "stdio.h" + +#include +#include "shm.h" + +void Shm_Cause_interrupt_simhppa( + rtems_unsigned32 node +) +{ + Shm_Interrupt_information *intr; + rtems_unsigned8 *u8; + rtems_unsigned16 *u16; + rtems_unsigned32 *u32; + rtems_unsigned32 value; + + intr = &Shm_Interrupt_table[node]; + value = intr->value; + + switch ( intr->length ) { + case NO_INTERRUPT: + break; + case BYTE: + u8 = (rtems_unsigned8 *)intr->address; + fprintf( + stderr, + "Shm_Cause_interrupt_simhppa: Writes of unsigned8 not supported!!!\n" + ); + rtems_shutdown_executive( 0 ); + break; + case WORD: + u16 = (rtems_unsigned16 *)intr->address; + fprintf( + stderr, + "Shm_Cause_interrupt_simhppa: Writes of unsigned8 not supported!!!\n" + ); + rtems_shutdown_executive( 0 ); + break; + case LONG: + u32 = (rtems_unsigned32 *)intr->address; + HPPA_ASM_STWAS( value, 0, u32 ); + break; + } +} diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c new file mode 100644 index 0000000000..724758b8b8 --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/lock.c @@ -0,0 +1,75 @@ +/* Shared Memory Lock Routines + * + * This shared memory locked queue support routine need to be + * able to lock the specified locked queue. Interrupts are + * disabled while the queue is locked to prevent preemption + * and deadlock when two tasks poll for the same lock. + * previous level. + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +/* + * Shm_Initialize_lock + * + * Initialize the lock for the specified locked queue. + */ + +void Shm_Initialize_lock( + Shm_Locked_queue_Control *lq_cb +) +{ + lq_cb->lock = LQ_UNLOCKED; +} + +/* Shm_Lock( &lq_cb ) + * + * This shared memory locked queue support routine locks the + * specified locked queue. It disables interrupts to prevent + * a deadlock condition. + */ + +void Shm_Lock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + vol_u32 *lockptr = &lq_cb->lock; + rtems_unsigned32 lock_value; + + rtems_interrupt_disable( isr_level ); + + Shm_isrstat = isr_level; + + do { + HPPA_ASM_LDCWS( 0, 0, lockptr, lock_value ); + } while (lock_value == SHM_LOCK_VALUE); +} + +/* + * Shm_Unlock + * + * Unlock the lock for the specified locked queue. + */ + +void Shm_Unlock( + Shm_Locked_queue_Control *lq_cb +) +{ + rtems_unsigned32 isr_level; + + lq_cb->lock = SHM_UNLOCK_VALUE; + isr_level = Shm_isrstat; + rtems_interrupt_enable( isr_level ); +} diff --git a/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c new file mode 100644 index 0000000000..29e897d781 --- /dev/null +++ b/c/src/lib/libbsp/hppa1.1/simhppa/shmsupp/mpisr.c @@ -0,0 +1,27 @@ +/* Shm_setvec + * + * This driver routine sets the SHM interrupt vector to point to the + * driver's SHM interrupt service routine. + * + * Input parameters: NONE + * + * Output parameters: NONE + * + * COPYRIGHT (c) 1989, 1990, 1991, 1992, 1993, 1994. + * On-Line Applications Research Corporation (OAR). + * All rights assigned to U.S. Government, 1994. + * + * This material may be reproduced by or for the U.S. Government pursuant + * to the copyright license under the clause at DFARS 252.227-7013. This + * notice must appear in all copies of this file and its derivatives. + * + * $Id$ + */ + +#include +#include + +void Shm_setvec( void ) +{ + set_vector( Shm_isr, HPPA_INTERRUPT_EXTERNAL_MPCI, 1 ); +} -- cgit v1.2.3