From 8eacefcc8b6411ea7c32199b09578590b6926e05 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 29 Feb 2000 16:35:45 +0000 Subject: BSP now compiles and links with CAVSL board information. This includes linkcmds updated, simio references removed, and switch to libchip for serial ports from simio. Added a MEMORY_MAP file to capture information about the various addresses on this board. In addition, many of the beta patches are now included. --- c/src/lib/libbsp/c4x/c4xsim/README | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'c/src/lib/libbsp/c4x/c4xsim/README') diff --git a/c/src/lib/libbsp/c4x/c4xsim/README b/c/src/lib/libbsp/c4x/c4xsim/README index 8bb3beda0d..4bb72fe8d9 100644 --- a/c/src/lib/libbsp/c4x/c4xsim/README +++ b/c/src/lib/libbsp/c4x/c4xsim/README @@ -5,7 +5,7 @@ BSP NAME: c4xsim BOARD: Simulator in GDB BUS: N/A -CPU FAMILY: ppc +CPU FAMILY: C3X/C4X CPU: C32 and others COPROCESSORS: N/A MODE: 32 bit mode @@ -14,7 +14,7 @@ DEBUG MONITOR: gdb simulator PERIPHERALS =========== -TIMERS: PPC internal Timebase register +TIMERS: Internal Timer RESOLUTION: ??? SERIAL PORTS: simulated via REAL-TIME CLOCK: ??? -- cgit v1.2.3