From 8fd465e67e5db00839e7b3a717a816d57b46f198 Mon Sep 17 00:00:00 2001 From: Chris Johns Date: Fri, 25 Nov 2016 09:45:35 +1100 Subject: arm/zynq: Wait for the UART TX FIFO to empty on reset. --- c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h') diff --git a/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h b/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h index bb0ff56598..07c883af87 100644 --- a/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h +++ b/c/src/lib/libbsp/arm/xilinx-zynq/include/zynq-uart.h @@ -35,6 +35,11 @@ extern "C" { extern const console_fns zynq_uart_fns; +/** + * Flush TX FIFO and wait until it is empty. Used in bsp_reset. + */ +void zynq_uart_reset_tx_flush(int minor); + #ifdef __cplusplus } #endif /* __cplusplus */ -- cgit v1.2.3