From 6128a4aa5e791ed4e0a655bfd346a52d92da7883 Mon Sep 17 00:00:00 2001 From: Ralf Corsepius Date: Wed, 21 Apr 2004 10:43:04 +0000 Subject: Remove stray white spaces. --- c/src/lib/libbsp/arm/vegaplus/include/bsp.h | 12 ++-- c/src/lib/libbsp/arm/vegaplus/include/registers.h | 28 ++++----- c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S | 22 +++---- c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c | 4 +- c/src/lib/libbsp/arm/vegaplus/irq/irq.c | 16 ++--- c/src/lib/libbsp/arm/vegaplus/irq/irq.h | 12 ++-- c/src/lib/libbsp/arm/vegaplus/start/start.S | 76 +++++++++++------------ c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c | 22 +++---- c/src/lib/libbsp/arm/vegaplus/startup/exit.c | 2 +- 9 files changed, 97 insertions(+), 97 deletions(-) (limited to 'c/src/lib/libbsp/arm/vegaplus') diff --git a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h index 119c7c133c..761b5f3604 100644 --- a/c/src/lib/libbsp/arm/vegaplus/include/bsp.h +++ b/c/src/lib/libbsp/arm/vegaplus/include/bsp.h @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| bsp.h - ARM BSP +| bsp.h - ARM BSP +--------------------------------------------------------------------------+ | This include file contains definitions related to the ARM BSP. +--------------------------------------------------------------------------+ @@ -10,7 +10,7 @@ | The license and distribution terms for this file may be | found in found in the file LICENSE in this distribution or at | http://www.rtems.com/license/LICENSE. -| +| | $Id$ +--------------------------------------------------------------------------*/ @@ -28,7 +28,7 @@ extern "C" { #include #include #include - + /* * Define the interrupt mechanism for Time Test 27 * @@ -38,11 +38,11 @@ extern "C" { #define MUST_WAIT_FOR_INTERRUPT 0 -#define Install_tm27_vector( handler ) +#define Install_tm27_vector( handler ) -#define Cause_tm27_intr() +#define Cause_tm27_intr() -#define Clear_tm27_intr() +#define Clear_tm27_intr() #define Lower_tm27_intr() diff --git a/c/src/lib/libbsp/arm/vegaplus/include/registers.h b/c/src/lib/libbsp/arm/vegaplus/include/registers.h index 2c11582194..2a153fd8d9 100644 --- a/c/src/lib/libbsp/arm/vegaplus/include/registers.h +++ b/c/src/lib/libbsp/arm/vegaplus/include/registers.h @@ -12,15 +12,15 @@ #ifndef __LMREGS_H__ -#define __LMREGS_H__ +#define __LMREGS_H__ /* - * VARIABLE DECLARATION + * VARIABLE DECLARATION ****************************************************************************** */ /* register area size */ -#define LM_REG_AREA_SIZ (0x4000/4) +#define LM_REG_AREA_SIZ (0x4000/4) /*** Register mapping : defined by indexes in an array ***/ /*** NOTE : only 1 register every 4 byte address location (+ some holes) */ @@ -216,7 +216,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define RINGCNTL ((MISC_BASE+0x90)/4) #define RINGFREQ ((MISC_BASE+0x94)/4) #define RSCNTL ((MISC_BASE+0xA0)/4) -/*#ifndef PRODUCT_VERSION*/ +/*#ifndef PRODUCT_VERSION*/ #define RSRXD ((MISC_BASE+0xA4)/4) #define RSTXD ((MISC_BASE+0xA8)/4) /*#endif*/ @@ -235,7 +235,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define CLKCNTL ((MISC_BASE+0xF4)/4) #define OSCCOR ((MISC_BASE+0xF8)/4) -/* PRODUCT_VERSION */ +/* PRODUCT_VERSION */ /* Added 30/08/99 : New Control register for UART control */ #define UART_BASE 0x3000 #define RSRBR ((UART_BASE+0x00)/4) @@ -248,7 +248,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ #define RSDLL ((UART_BASE+0x00)/4) #define RSDLH ((UART_BASE+0x04)/4) #define RSCNT ((UART_BASE+0x20)/4) -/*PRODUCT_VERSION*/ +/*PRODUCT_VERSION*/ /** THUMB and INTERFACES BLOCK 0x3400 - 0x4FFF */ @@ -830,12 +830,12 @@ extern volatile unsigned long *Regs; /* Chip registers */ /* DCC register */ -/* bit ENABLE=0x80 already defined */ +/* bit ENABLE=0x80 already defined */ #define DCC_ENABLE 0x80 /* TIMERCNTL[0:1] register */ -/* bit ENABLE=0x80 already defined */ +/* bit ENABLE=0x80 already defined */ #define TIMER_ENABLE 0x80 #define RELOAD 0x0040 #define MSK_FREQ 0x0003 /* mask on FREQ field */ @@ -882,7 +882,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ /****************************************************************************** - * Memory Mapping definition + * Memory Mapping definition ****************************************************************************** */ @@ -901,7 +901,7 @@ extern volatile unsigned long *Regs; /* Chip registers */ /****************************************************************************** - * Slot Control bloc + * Slot Control bloc ****************************************************************************** */ @@ -915,7 +915,7 @@ typedef volatile struct /* normal Slot Control Block */ unsigned char CNTL0; unsigned char CNTL1; unsigned char CNTL2; - unsigned char STAT0; + unsigned char STAT0; unsigned char STAT1; unsigned char STAT2; unsigned char CRYPT; @@ -1051,7 +1051,7 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */ #define ZFIELD 0x01 /* AMSG parameter */ -#define PP_FP 0x80 +#define PP_FP 0x80 #define CT 0x40 #define NT 0x20 /* NT/CTSEND mapped on same bit */ #define CTSEND 0x20 @@ -1071,8 +1071,8 @@ typedef LM_SCB *LM_SCB_P; /* pointer to Slot Control Block */ -/* - * Some macros to mask the VEGA+ interrupt sources +/* + * Some macros to mask the VEGA+ interrupt sources ****************************************************************************** */ diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S index 7d31234c53..6cca55980b 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S +++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_asm.S @@ -14,16 +14,16 @@ #define __asm__ #include - -/* - * Function to obtain, execute an IT handler and acknowledge the IT + +/* + * Function to obtain, execute an IT handler and acknowledge the IT */ .globl ExecuteITHandler - -ExecuteITHandler : + +ExecuteITHandler : ldr r0, =INTPHAI3 /* read the vector number */ - ldr r0, [r0] + ldr r0, [r0] ldr r0, [r0] /* extract the IT handler @ */ /* @@ -52,14 +52,14 @@ IRQ_return: msr cpsr, r0 mov pc, lr - -/* - * Function to acknowledge the IT controller + +/* + * Function to acknowledge the IT controller */ .globl AckControler -#if 0 -AckControler: +#if 0 +AckControler: ldr r0, =INTEOI3 mov r1, #EOI str r1, [r0] diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c index 4a220e1462..7807d89181 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c +++ b/c/src/lib/libbsp/arm/vegaplus/irq/bsp_irq_init.c @@ -21,7 +21,7 @@ void BSP_rtems_irq_mngt_init() { /* Initialize the vector table address in internal RAM */ Regs[INTTAB] = VECTOR_TABLE; - + /* Initialize the GLOBAL INT CONTROL register */ Regs[INTGCNTL] = 0x00; @@ -33,7 +33,7 @@ void BSP_rtems_irq_mngt_init() { /* Ack pending interrupt */ while ( ( Regs[INTSTAT] & 0xF433 ) != 0 ) { - Regs[INTACK] = 0xFFFF; + Regs[INTACK] = 0xFFFF; Regs[INTEOI] = EOI; } } diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c index 453ccf3d95..55c1590bdf 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.c +++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.c @@ -40,7 +40,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -51,7 +51,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) if (*(HdlTable + irq->name) != default_int_handler) { return 0; } - + _CPU_ISR_Disable(level); /* @@ -60,7 +60,7 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) *(HdlTable + irq->name) = irq->hdl; /* - * initialize the control register for the concerned interrupt + * initialize the control register for the concerned interrupt */ Regs[(INTCNTL0 + irq->name)] = (long)(irq->irqTrigger) | (long)(irq->irqLevel) ; @@ -68,17 +68,17 @@ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data* irq) * ack pending interrupt */ Regs[INTACK] |= (long)(1 << irq->name); - + /* * unmask at INT controler level level */ Regs[INTMASK] &= ~(long)(1 << irq->name); - + /* * Enable interrupt on device */ irq->on(irq); - + _CPU_ISR_Enable(level); return 1; @@ -88,7 +88,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) { rtems_irq_hdl *HdlTable; rtems_interrupt_level level; - + if (!isValidInterrupt(irq->name)) { return 0; } @@ -115,7 +115,7 @@ int BSP_remove_rtems_irq_handler (const rtems_irq_connect_data* irq) * restore the default irq value */ *(HdlTable + irq->name) = default_int_handler; - + _CPU_ISR_Enable(level); return 1; diff --git a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h index 116f528640..5857792ebe 100644 --- a/c/src/lib/libbsp/arm/vegaplus/irq/irq.h +++ b/c/src/lib/libbsp/arm/vegaplus/irq/irq.h @@ -22,7 +22,7 @@ extern "C" { /* * Include some preprocessor value also used by assember code */ - + #include extern void default_int_handler(); @@ -62,11 +62,11 @@ typedef enum { #define MASKIRQ 0x80 #define MASKFIQ 0x40 - + #define END_OF_INT 0x80 #define VECTOR_TABLE 0x40 - + /* * Type definition for RTEMS managed interrupts */ @@ -96,9 +96,9 @@ typedef struct __rtems_irq_connect_data__ { * It is usually called immediately AFTER connecting the interrupt handler. * RTEMS may well need such a function when restoring normal interrupt * processing after a debug session. - * + * */ - rtems_irq_enable on; + rtems_irq_enable on; /* * function for disabling interrupts at device level (ONLY!). * The code will disable it at i8259s level. RATIONALE : anyway @@ -168,7 +168,7 @@ void BSP_rtems_irq_mngt_init(); * 4) perform rescheduling when necessary, * 5) restore the C scratch registers... * 6) restore initial execution flow - * + * */ int BSP_install_rtems_irq_handler (const rtems_irq_connect_data*); diff --git a/c/src/lib/libbsp/arm/vegaplus/start/start.S b/c/src/lib/libbsp/arm/vegaplus/start/start.S index e811d1cac8..6c3c2ab141 100644 --- a/c/src/lib/libbsp/arm/vegaplus/start/start.S +++ b/c/src/lib/libbsp/arm/vegaplus/start/start.S @@ -9,7 +9,7 @@ * http://www.rtems.com/license/LICENSE. * */ - + /* Register definition */ .equ CNTL_BASE_ADR, 0xF3000 /* Base address of registers */ @@ -22,7 +22,7 @@ .equ CSCNTL1_2, 0x0C28 /* Offset of CS0CNTL */ .equ CNTL_CLK_ADR, 0xF2000 /* Base address of registers */ .equ CLKCNTL, 0x08F4 /* Offset of CS0CNTL */ -.equ INTHPAI, 0x0800 +.equ INTHPAI, 0x0800 .equ INTEOI, 0x0808 .equ EOI, 0x80 @@ -47,37 +47,37 @@ .equ MARK_STACK, 0 /*Fill every stack with a pattern for debug (0 or 1)*/ - + /*----------------------------------------------------------------------------- * Definitions ----------------------------------------------------------------------------*/ .equ PID_RAM_Limit, 0x1800 /* stack size definition */ -.equ FIQ_StackSize, 0x400 /* FIQ stack size */ -.equ IRQ_StackSize, 0xE00 /* IRQ stack size */ -.equ SVC_StackSize, 0x200 /* SVC stack size */ -.equ ABORT_StackSize, 0x100 /* ABORT stack size */ -.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */ +.equ FIQ_StackSize, 0x400 /* FIQ stack size */ +.equ IRQ_StackSize, 0xE00 /* IRQ stack size */ +.equ SVC_StackSize, 0x200 /* SVC stack size */ +.equ ABORT_StackSize, 0x100 /* ABORT stack size */ +.equ UNDEF_StackSize, 0x100 /* UNDEF stack size */ /* sack size address */ -.equ Stack_Limit, PID_RAM_Limit +.equ Stack_Limit, PID_RAM_Limit .equ SVC_Stack, Stack_Limit -.equ ABORT_Stack, Stack_Limit - SVC_StackSize -.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize -.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize -.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize +.equ ABORT_Stack, Stack_Limit - SVC_StackSize +.equ UNDEF_Stack, ABORT_Stack - ABORT_StackSize +.equ IRQ_Stack, UNDEF_Stack - UNDEF_StackSize +.equ FIQ_Stack, IRQ_Stack - IRQ_StackSize .equ END_FIQ, FIQ_Stack - FIQ_StackSize .text .globl _start -/* +/* * This "strange" code is used to switch the memory access - * from 8 bits to 16 bits, because the vega plus accesses + * from 8 bits to 16 bits, because the vega plus accesses * the memory via 8 bits at reset time */ - + _start: .long 0x00300010 /*LDR r3,0x18*/ .long 0x00E5009F @@ -106,7 +106,7 @@ _start: .code 32 /* --- Initialise external bus*/ -Real_start: +Real_start: MOV r0,#CNTL_BASE_ADR /*Load timing configuration of CS0*/ @@ -116,7 +116,7 @@ Real_start: STR r1, [r0,#CSCNTL1_0] /* Load timing configuration and access mode of CS1 - NOTE : Important for macro REGION_INIT of Region_init.s + NOTE : Important for macro REGION_INIT of Region_init.s if initialisation of data in external RAM */ LDR r1, =0x2200 STR r1, [r0,#CSCNTL0_1] @@ -128,7 +128,7 @@ Real_start: STR r1, [r0,#CSCNTL0_2] LDR r1, =0xA2 STR r1, [r0,#CSCNTL1_2] - + MOV r0,#CNTL_CLK_ADR /* Load clock mode 55 MHz */ @@ -140,7 +140,7 @@ Real_start: LDR r1, =0x400000 /* execution address of region */ LDR r2, =_edata /* copy execution address into r2 */ -copy: +copy: CMP r1, r2 /* loop whilst r1 < r2 */ LDRLO r3, [r0], #4 STRLO r3, [r1], #4 @@ -149,15 +149,15 @@ copy: /* zero the bss */ LDR r1, =__bss_end__ /* get end of ZI region */ LDR r0, =__bss_start__ /* load base address of ZI region */ -zi_init: +zi_init: MOV r2, #0 CMP r0, r1 /* loop whilst r0 < r1 */ STRLOT r2, [r0], #4 - BLO zi_init + BLO zi_init + - /* Load basic ARM7 interrupt table */ -VectorInit: +VectorInit: MOV R8, #0 ADR R9, Vector_Init_Block LDMIA R9!, {R0-R7} /* Copy the Vectors (8 words) */ @@ -169,10 +169,10 @@ VectorInit: /******************************************************* standard exception vectors table - *** Must be located at address 0 -********************************************************/ + *** Must be located at address 0 +********************************************************/ -Vector_Init_Block: +Vector_Init_Block: LDR PC, Reset_Addr LDR PC, Undefined_Addr LDR PC, SWI_Addr @@ -183,36 +183,36 @@ Vector_Init_Block: LDR PC, FIQ_Addr .globl Reset_Addr -Reset_Addr: .long _start +Reset_Addr: .long _start Undefined_Addr: .long Undefined_Handler SWI_Addr: .long SWI_Handler Prefetch_Addr: .long Prefetch_Handler Abort_Addr: .long Abort_Handler - .long 0 + .long 0 IRQ_Addr: .long IRQ_Handler FIQ_Addr: .long FIQ_Handler - + /* The following handlers do not do anything useful */ .globl Undefined_Handler -Undefined_Handler: +Undefined_Handler: B Undefined_Handler .globl SWI_Handler -SWI_Handler: - B SWI_Handler +SWI_Handler: + B SWI_Handler .globl Prefetch_Handler -Prefetch_Handler: +Prefetch_Handler: B Prefetch_Handler .globl Abort_Handler -Abort_Handler: +Abort_Handler: B Abort_Handler .globl IRQ_Handler -IRQ_Handler: +IRQ_Handler: B IRQ_Handler .globl FIQ_Handler -FIQ_Handler: +FIQ_Handler: B FIQ_Handler -init2 : +init2 : /* --- Initialise stack pointer registers Set up the ABORT stack pointer last and stay in SVC mode */ MOV r0, #(Mode_ABORT | I_Bit | F_Bit) /* No interrupts */ diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c index fdeb345b53..3af8289599 100644 --- a/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/vegaplus/startup/bspstart.c @@ -1,7 +1,7 @@ /*-------------------------------------------------------------------------+ | This file contains the ARM BSP startup package. It includes application, | board, and monitor specific initialization and configuration. The generic CPU -| dependent initialization has been performed before this routine is invoked. +| dependent initialization has been performed before this routine is invoked. +--------------------------------------------------------------------------+ | | Copyright (c) 2000 Canon Research Centre France SA. @@ -26,11 +26,11 @@ volatile unsigned long *Regs = (unsigned long*)0xF0000; /* Chip registers */ extern uint32_t _end; /* End of BSS. Defined in 'linkcmds'. */ -/* - * Size of heap if it is 0 it will be dynamically defined by memory size, - * otherwise the value should be changed by binary patch +/* + * Size of heap if it is 0 it will be dynamically defined by memory size, + * otherwise the value should be changed by binary patch */ -uint32_t _heap_size = 0; +uint32_t _heap_size = 0; /* Size of stack used during initialization. Defined in 'start.s'. */ extern uint32_t _stack_size; @@ -63,7 +63,7 @@ void bsp_postdriver_hook(void); | since drivers are not yet initialized. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_pretasking_hook(void) { @@ -72,9 +72,9 @@ void bsp_pretasking_hook(void) { _heap_size = 0x420000 - rtemsFreeMemStart; } - + bsp_libc_init((void *)rtemsFreeMemStart, _heap_size, 0); - + rtemsFreeMemStart += _heap_size; /* HEAP_SIZE in KBytes */ @@ -85,14 +85,14 @@ void bsp_pretasking_hook(void) #endif /* RTEMS_DEBUG */ } /* bsp_pretasking_hook */ - + /*-------------------------------------------------------------------------+ | Function: bsp_start | Description: Called before main is invoked. | Global Variables: None. | Arguments: None. -| Returns: Nothing. +| Returns: Nothing. +--------------------------------------------------------------------------*/ void bsp_start_default( void ) { @@ -112,7 +112,7 @@ void bsp_start_default( void ) /* Place RTEMS workspace at beginning of free memory. */ BSP_Configuration.work_space_start = (void *)rtemsFreeMemStart; - + rtemsFreeMemStart += BSP_Configuration.work_space_size; /* diff --git a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c index 447a34301e..a99faeb9ba 100644 --- a/c/src/lib/libbsp/arm/vegaplus/startup/exit.c +++ b/c/src/lib/libbsp/arm/vegaplus/startup/exit.c @@ -1,5 +1,5 @@ /*-------------------------------------------------------------------------+ -| exit.c - ARM BSP +| exit.c - ARM BSP +--------------------------------------------------------------------------+ | Routines to shutdown and reboot the BSP. +--------------------------------------------------------------------------+ -- cgit v1.2.3