From 50440c065e247899ee739d56cb1392c259289031 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Wed, 19 Nov 2014 15:30:24 +0100 Subject: bsps/arm: Enable L2C for Cortex-A9 MPCore BSPs --- c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) (limited to 'c/src/lib/libbsp/arm/shared') diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c index 6f4af46343..f755621c9d 100644 --- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c +++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-smp.c @@ -19,6 +19,7 @@ #include #include +#include static void bsp_inter_processor_interrupt(void *arg) { @@ -27,16 +28,10 @@ static void bsp_inter_processor_interrupt(void *arg) uint32_t _CPU_SMP_Initialize(void) { - return arm_gic_irq_processor_count(); -} - -bool _CPU_SMP_Start_processor(uint32_t cpu_index) -{ - (void) cpu_index; + uint32_t hardware_count = arm_gic_irq_processor_count(); + uint32_t linker_count = (uint32_t) bsp_processor_count; - /* Nothing to do */ - - return true; + return hardware_count <= linker_count ? hardware_count : linker_count; } void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) @@ -52,6 +47,11 @@ void _CPU_SMP_Finalize_initialization(uint32_t cpu_count) NULL ); assert(sc == RTEMS_SUCCESSFUL); + +#if defined(BSP_DATA_CACHE_ENABLED) || defined(BSP_INSTRUCTION_CACHE_ENABLED) + /* Enable unified L2 cache */ + rtems_cache_enable_data(); +#endif } } -- cgit v1.2.3