From 4a6cc2a4b35e2cb069cb273b7e098366c7bae059 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 8 Nov 2011 10:39:46 +0000 Subject: 2011-11-08 Sebastian Huber * include/lpc17xx.h: New file. * Makefile.am, preinstall.am: Reflect change above. Update due to API changes. * configure.ac, console/console-config.c, include/bsp.h, include/io.h, include/irq.h, include/lcd.h, include/lpc-clock-config.h, include/lpc24xx.h, include/start-config.h, irq/irq-dispatch.c, irq/irq.c, misc/bspidle.c, misc/io.c, misc/lcd.c, misc/restart.c, misc/system-clocks.c, ssp/ssp.c, startup/bspreset.c, startup/bspstart.c, startup/bspstarthooks.c, startup/start-config-emc-dynamic.c, startup/start-config-emc-static.c, startup/start-config-pinsel.c: Basic support for LPC17XX. New memory configurations for W9825G2JB75I, IS42S32800B, and SST39VF3201. --- c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c | 17 +- c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c | 4 +- .../lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c | 255 ++++++++++----------- .../arm/lpc24xx/startup/start-config-emc-dynamic.c | 150 +++++++++++- .../arm/lpc24xx/startup/start-config-emc-static.c | 38 ++- .../arm/lpc24xx/startup/start-config-pinsel.c | 66 ++++-- 6 files changed, 361 insertions(+), 169 deletions(-) (limited to 'c/src/lib/libbsp/arm/lpc24xx/startup') diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c index f38ce1a46c..601ad69b13 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspreset.c @@ -22,19 +22,22 @@ #include #include +#include -void bsp_reset(void) +BSP_START_TEXT_SECTION __attribute__((flatten)) void bsp_reset(void) { rtems_interrupt_level level; rtems_interrupt_disable(level); - /* Trigger watchdog reset */ - WDCLKSEL = 0; - WDTC = 0xff; - WDMOD = 0x3; - WDFEED = 0xaa; - WDFEED = 0x55; + #ifdef ARM_MULTILIB_ARCH_V4 + /* Trigger watchdog reset */ + WDCLKSEL = 0; + WDTC = 0xff; + WDMOD = 0x3; + WDFEED = 0xaa; + WDFEED = 0x55; + #endif while (true) { /* Do nothing */ diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c index 6644032bca..9132208cb3 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstart.c @@ -71,7 +71,7 @@ static void initialize_console(void) LPC24XX_PIN_TERMINAL }; - lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_CCLK); + lpc24xx_module_enable(LPC24XX_MODULE_UART_0, LPC24XX_MODULE_PCLK_DEFAULT); lpc24xx_pin_config(&pins [0], LPC24XX_PIN_SET_FUNCTION); BSP_CONSOLE_UART_INIT(lpc24xx_cclk() / 16 / LPC24XX_UART_BAUD); #endif @@ -80,7 +80,7 @@ static void initialize_console(void) void bsp_start(void) { /* Initialize Timer 1 */ - lpc24xx_module_enable(LPC24XX_MODULE_TIMER_1, LPC24XX_MODULE_CCLK); + lpc24xx_module_enable(LPC24XX_MODULE_TIMER_1, LPC24XX_MODULE_PCLK_DEFAULT); /* Initialize standard timer */ lpc24xx_timer_initialize(); diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c index a1397817ea..5e0034924e 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/bspstarthooks.c @@ -22,14 +22,16 @@ #include +#include + #include +#include #include -#include #include #include #include -static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(unsigned ticks) +static BSP_START_TEXT_SECTION void lpc24xx_cpu_delay(unsigned ticks) { unsigned i = 0; @@ -41,21 +43,20 @@ static void BSP_START_TEXT_SECTION lpc24xx_cpu_delay(unsigned ticks) } } -static void BSP_START_TEXT_SECTION lpc24xx_udelay(unsigned us) +static BSP_START_TEXT_SECTION void lpc24xx_udelay(unsigned us) { lpc24xx_cpu_delay(us * (LPC24XX_CCLK / 1000000)); } -static void BSP_START_TEXT_SECTION lpc24xx_init_emc_pinsel(void) +static BSP_START_TEXT_SECTION void lpc24xx_init_pinsel(void) { - bsp_start_memcpy( - (int *) &PINSEL5, - (const int *) &lpc24xx_start_config_pinsel_5_9, - lpc24xx_start_config_pinsel_5_9_size + lpc24xx_pin_config( + &lpc24xx_start_config_pinsel [0], + LPC24XX_PIN_SET_FUNCTION ); } -static void BSP_START_TEXT_SECTION lpc24xx_init_emc_static(void) +static BSP_START_TEXT_SECTION void lpc24xx_init_emc_static(void) { size_t i = 0; size_t chip_count = lpc24xx_start_config_emc_static_chip_count; @@ -79,13 +80,7 @@ static void BSP_START_TEXT_SECTION lpc24xx_init_emc_static(void) } } -static void BSP_START_TEXT_SECTION lpc24xx_init_emc_memory_map(void) -{ - /* Use normal memory map */ - EMC_CTRL &= ~0x2U; -} - -static void BSP_START_TEXT_SECTION lpc24xx_init_emc_dynamic(void) +static BSP_START_TEXT_SECTION void lpc24xx_init_emc_dynamic(void) { size_t chip_count = lpc24xx_start_config_emc_dynamic_chip_count; @@ -159,12 +154,26 @@ static void BSP_START_TEXT_SECTION lpc24xx_init_emc_dynamic(void) chip_select->config = config | EMC_DYN_CFG_B; } - emc->dynamiccontrol = dynamiccontrol; + emc->dynamiccontrol = 0; } } } -static void BSP_START_TEXT_SECTION lpc24xx_pll_config( +static BSP_START_TEXT_SECTION void lpc24xx_init_main_oscillator(void) +{ + #ifdef ARM_MULTILIB_ARCH_V4 + if ((SCS & 0x40) == 0) { + SCS |= 0x20; + while ((SCS & 0x40) == 0) { + /* Wait */ + } + } + #endif +} + +#ifdef ARM_MULTILIB_ARCH_V4 + +static BSP_START_TEXT_SECTION void lpc24xx_pll_config( uint32_t val ) { @@ -187,7 +196,7 @@ static void BSP_START_TEXT_SECTION lpc24xx_pll_config( * @param cclksel Selects the divide value for creating the CPU clock (CCLK) * from the PLL output. */ -static void BSP_START_TEXT_SECTION lpc24xx_set_pll( +static BSP_START_TEXT_SECTION void lpc24xx_set_pll( unsigned clksrc, unsigned nsel, unsigned msel, @@ -243,151 +252,133 @@ static void BSP_START_TEXT_SECTION lpc24xx_set_pll( lpc24xx_pll_config(PLLCON_PLLE | PLLCON_PLLC); } -static void BSP_START_TEXT_SECTION lpc24xx_init_pll(void) -{ - /* Enable main oscillator */ - if ((SCS & 0x40) == 0) { - SCS |= 0x20; - while ((SCS & 0x40) == 0) { - /* Wait */ - } - } +#endif /* ARM_MULTILIB_ARCH_V4 */ - /* Set PLL */ - #if LPC24XX_OSCILLATOR_MAIN == 12000000U - #if LPC24XX_CCLK == 72000000U - lpc24xx_set_pll(1, 0, 11, 3); - #elif LPC24XX_CCLK == 51612800U - lpc24xx_set_pll(1, 30, 399, 5); - #else - #error "unexpected CCLK" - #endif - #elif LPC24XX_OSCILLATOR_MAIN == 3686400U - #if LPC24XX_CCLK == 58982400U - lpc24xx_set_pll(1, 0, 47, 5); +static BSP_START_TEXT_SECTION void lpc24xx_init_pll(void) +{ + #ifdef ARM_MULTILIB_ARCH_V4 + #if LPC24XX_OSCILLATOR_MAIN == 12000000U + #if LPC24XX_CCLK == 72000000U + lpc24xx_set_pll(1, 0, 11, 3); + #elif LPC24XX_CCLK == 51612800U + lpc24xx_set_pll(1, 30, 399, 5); + #else + #error "unexpected CCLK" + #endif + #elif LPC24XX_OSCILLATOR_MAIN == 3686400U + #if LPC24XX_CCLK == 58982400U + lpc24xx_set_pll(1, 0, 47, 5); + #else + #error "unexpected CCLK" + #endif #else - #error "unexpected CCLK" + #error "unexpected main oscillator frequency" #endif - #else - #error "unexpected main oscillator frequency" #endif } -static void BSP_START_TEXT_SECTION lpc24xx_clear_bss(void) +static BSP_START_TEXT_SECTION void lpc24xx_init_memory_map(void) { - const int *end = (const int *) bsp_section_bss_end; - int *out = (int *) bsp_section_bss_begin; + #ifdef ARM_MULTILIB_ARCH_V4 + /* Re-map interrupt vectors to internal RAM */ + MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2); + #endif - /* Clear BSS */ - while (out != end) { - *out = 0; - ++out; - } + /* Use normal memory map */ + EMC_CTRL &= ~0x2U; } -void BSP_START_TEXT_SECTION bsp_start_hook_0(void) +static BSP_START_TEXT_SECTION void lpc24xx_init_memory_accelerator(void) { - lpc24xx_init_pll(); - lpc24xx_init_emc_pinsel(); - lpc24xx_init_emc_static(); -} + #ifdef ARM_MULTILIB_ARCH_V4 + /* Fully enable memory accelerator module functions (MAM) */ + MAMCR = 0; + #if LPC24XX_CCLK <= 20000000U + MAMTIM = 0x1; + #elif LPC24XX_CCLK <= 40000000U + MAMTIM = 0x2; + #elif LPC24XX_CCLK <= 60000000U + MAMTIM = 0x3; + #else + MAMTIM = 0x4; + #endif + MAMCR = 0x2; -void BSP_START_TEXT_SECTION bsp_start_hook_1(void) -{ - /* Re-map interrupt vectors to internal RAM */ - MEMMAP = SET_MEMMAP_MAP(MEMMAP, 2); - - /* Fully enable memory accelerator module functions (MAM) */ - MAMCR = 0; - #if LPC24XX_CCLK <= 20000000U - MAMTIM = 0x1; - #elif LPC24XX_CCLK <= 40000000U - MAMTIM = 0x2; - #elif LPC24XX_CCLK <= 60000000U - MAMTIM = 0x3; - #else - MAMTIM = 0x4; + /* Enable fast IO for ports 0 and 1 */ + SCS |= 0x1; #endif - MAMCR = 0x2; - - /* Enable fast IO for ports 0 and 1 */ - SCS |= 0x1; - - /* Set fast IO */ - FIO0DIR = 0; - FIO1DIR = 0; - FIO2DIR = 0; - FIO3DIR = 0; - FIO4DIR = 0; - FIO0CLR = 0xffffffff; - FIO1CLR = 0xffffffff; - FIO2CLR = 0xffffffff; - FIO3CLR = 0xffffffff; - FIO4CLR = 0xffffffff; - - lpc24xx_init_emc_memory_map(); - lpc24xx_init_emc_dynamic(); +} +static BSP_START_TEXT_SECTION void lpc24xx_stop_gpdma(void) +{ #ifdef LPC24XX_STOP_GPDMA - if ((PCONP & PCONP_GPDMA) != 0) { + #ifdef ARM_MULTILIB_ARCH_V4 + bool has_power = (PCONP & PCONP_GPDMA) != 0; + #endif + + if (has_power) { GPDMA_CONFIG = 0; - PCONP &= ~PCONP_GPDMA; + + #ifdef ARM_MULTILIB_ARCH_V4 + PCONP &= ~PCONP_GPDMA; + #endif } #endif +} +static BSP_START_TEXT_SECTION void lpc24xx_stop_ethernet(void) +{ #ifdef LPC24XX_STOP_ETHERNET - if ((PCONP & PCONP_ETHERNET) != 0) { + #ifdef ARM_MULTILIB_ARCH_V4 + bool has_power = (PCONP & PCONP_ETHERNET) != 0; + #endif + + if (has_power) { MAC_COMMAND = 0x38; MAC_MAC1 = 0xcf00; MAC_MAC1 = 0; - PCONP &= ~PCONP_ETHERNET; + + #ifdef ARM_MULTILIB_ARCH_V4 + PCONP &= ~PCONP_ETHERNET; + #endif } #endif +} +static BSP_START_TEXT_SECTION void lpc24xx_stop_usb(void) +{ #ifdef LPC24XX_STOP_USB - if ((PCONP & PCONP_USB) != 0) { + #ifdef ARM_MULTILIB_ARCH_V4 + bool has_power = (PCONP & PCONP_USB) != 0; + #endif + + if (has_power) { OTG_CLK_CTRL = 0; - PCONP &= ~PCONP_USB; + + #ifdef ARM_MULTILIB_ARCH_V4 + PCONP &= ~PCONP_USB; + #endif } #endif +} - /* Copy .text section */ - bsp_start_memcpy( - (int *) bsp_section_text_begin, - (const int *) bsp_section_text_load_begin, - (size_t) bsp_section_text_size - ); - - /* Copy .rodata section */ - bsp_start_memcpy( - (int *) bsp_section_rodata_begin, - (const int *) bsp_section_rodata_load_begin, - (size_t) bsp_section_rodata_size - ); - - /* Copy .data section */ - bsp_start_memcpy( - (int *) bsp_section_data_begin, - (const int *) bsp_section_data_load_begin, - (size_t) bsp_section_data_size - ); - - /* Copy .fast_text section */ - bsp_start_memcpy( - (int *) bsp_section_fast_text_begin, - (const int *) bsp_section_fast_text_load_begin, - (size_t) bsp_section_fast_text_size - ); - - /* Copy .fast_data section */ - bsp_start_memcpy( - (int *) bsp_section_fast_data_begin, - (const int *) bsp_section_fast_data_load_begin, - (size_t) bsp_section_fast_data_size - ); +BSP_START_TEXT_SECTION void bsp_start_hook_0(void) +{ + lpc24xx_init_main_oscillator(); + lpc24xx_init_pll(); + lpc24xx_init_pinsel(); + lpc24xx_init_emc_static(); +} - /* Clear .bss section */ - lpc24xx_clear_bss(); +BSP_START_TEXT_SECTION void bsp_start_hook_1(void) +{ + lpc24xx_init_memory_map(); + lpc24xx_init_memory_accelerator(); + lpc24xx_init_emc_dynamic(); + lpc24xx_stop_gpdma(); + lpc24xx_stop_ethernet(); + lpc24xx_stop_usb(); + bsp_start_copy_sections(); /* At this point we can use objects outside the .start section */ } diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c index 2d27e8c2fb..6a062c9309 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-dynamic.c @@ -25,9 +25,9 @@ #include #include -const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config +BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_config lpc24xx_start_config_emc_dynamic [] = { -#if defined(LPC24XX_EMC_MICRON) +#if defined(LPC24XX_EMC_MT48LC4M16A2) /* Dynamic Memory 0: Micron M T48LC 4M16 A2 P 75 IT */ { /* Auto-refresh command every 15.6 us */ @@ -69,6 +69,48 @@ const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config /* Load mode register to active or refresh command period 2 tCK */ .tmrd = 1 } +#elif defined(LPC24XX_EMC_W9825G2JB75I) + /* Dynamic Memory 0: Winbond W9825G2JB75I at 51612800Hz (tCK = 19.4ns) */ + { + /* (n * 16) clock cycles -> 15.5us <= 15.6 us */ + .refresh = 50, + + /* Use command delayed strategy */ + .readconfig = 1, + + /* (n + 1) clock cycles -> 38.8ns >= 20ns */ + .trp = 1, + + /* (n + 1) clock cycles -> 58.1ns >= 45ns */ + .tras = 2, + + /* (n + 1) clock cycles -> 77.5ns >= 75ns (tXSR) */ + .tsrex = 3, + + /* (n + 1) clock cycles -> 38.8ns >= 20ns (tRCD) */ + .tapr = 1, + + /* n clock cycles -> 77.5ns >= tWR + tRP -> 2 * tCK + 20ns */ + .tdal = 4, + + /* (n + 1) clock cycles == 2 * tCK */ + .twr = 1, + + /* (n + 1) clock cycles = 77.5ns >= 65ns */ + .trc = 3, + + /* (n + 1) clock cycles = 77.5ns >= 65ns (tRC) */ + .trfc = 3, + + /* (n + 1) clock cycles = 77.5ns >= 75ns */ + .txsr = 3, + + /* (n + 1) clock cycles == 2 * tCK */ + .trrd = 1, + + /* (n + 1) clock cycles == 2 * tCK (tRSC)*/ + .tmrd = 1 + } #elif defined(LPC24XX_EMC_K4S561632E) { .refresh = 35, @@ -85,24 +127,103 @@ const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_config .trrd = 3, .tmrd = 2 } +#elif defined(LPC24XX_EMC_IS42S32800B) + #if LPC24XX_EMCCLK == 72000000U + { + /* tCK = 13.888ns at 72MHz */ + + /* (n * 16) clock cycles -> 15.556us <= 15.6us */ + .refresh = 70, + + .readconfig = 1, + + /* (n + 1) clock cycles -> 27.8ns >= 20ns */ + .trp = 1, + + /* (n + 1) clock cycles -> 55.5ns >= 45ns */ + .tras = 3, + + /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */ + .tsrex = 5, + + /* (n + 1) clock cycles -> 41.7ns >= FIXME */ + .tapr = 2, + + /* n clock cycles -> 55.5ns >= tWR + tRP = 47.8ns */ + .tdal = 4, + + /* (n + 1) clock cycles == 2 * tCK */ + .twr = 1, + + /* (n + 1) clock cycles -> 83.3ns >= 70ns */ + .trc = 5, + + /* (n + 1) clock cycles -> 83.3ns >= 70ns */ + .trfc = 5, + + /* (n + 1) clock cycles -> 69.4ns >= 70ns (tRC) */ + .txsr = 5, + + /* (n + 1) clock cycles -> 27.8ns >= 14ns */ + .trrd = 1, + + /* (n + 1) clock cycles == 2 * tCK */ + .tmrd = 1, + + /* FIXME */ + .emcdlyctl = 0x1112 + } + #elif LPC24XX_EMCCLK == 60000000U + { + .refresh = 0x3a, + .readconfig = 1, + .trp = 1, + .tras = 3, + .tsrex = 5, + .tapr = 2, + .tdal = 3, + .twr = 1, + .trc = 4, + .trfc = 4, + .txsr = 5, + .trrd = 1, + .tmrd = 1, + .emcdlyctl = 0x1112 + } + #else + #error "unexpected EMCCLK" + #endif #endif }; -const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config +BSP_START_DATA_SECTION const lpc24xx_emc_dynamic_chip_config lpc24xx_start_config_emc_dynamic_chip [] = { -#if defined(LPC24XX_EMC_MICRON) +#if defined(LPC24XX_EMC_MT48LC4M16A2) { .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0, /* * Use SDRAM, 0 0 001 01 address mapping, disabled buffer, unprotected - * writes. + * writes. 4 banks, 12 row lines, 8 column lines. */ .config = 0x280, .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0), .mode = 0xa0000000 | (0x23 << (1 + 2 + 8)) } +#elif defined(LPC24XX_EMC_W9825G2JB75I) + { + .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0, + + /* 32-bit data bus, 4 banks, 12 row lines, 9 column lines, RBC */ + .config = 0x4280, + + /* RAS based on tRCD = 20ns */ + .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0), + + /* CAS 2, burst length 8, */ + .mode = 0xa0000000 | (0x23 << (2 + 2 + 9)) + } #elif defined(LPC24XX_EMC_K4S561632E) { .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0, @@ -110,10 +231,27 @@ const BSP_START_DATA_SECTION lpc24xx_emc_dynamic_chip_config .rascas = EMC_DYN_RASCAS_RAS(3) | EMC_DYN_RASCAS_CAS(3, 0), .mode = 0xa0000000 | (0x33 << 12) } +#elif defined(LPC24XX_EMC_IS42S32800B) + { + .chip_select = (volatile lpc_emc_dynamic *) &EMC_DYN_CFG0, + + /* 256MBit, 8Mx32, 4 banks, row = 12, column = 9, RBC */ + .config = 0x4480, + + #if LPC24XX_EMCCLK == 72000000U + .rascas = EMC_DYN_RASCAS_RAS(3) | EMC_DYN_RASCAS_CAS(3, 0), + .mode = 0xa0000000 | (0x32 << (2 + 2 + 9)) + #elif LPC24XX_EMCCLK == 60000000U + .rascas = EMC_DYN_RASCAS_RAS(2) | EMC_DYN_RASCAS_CAS(2, 0), + .mode = 0xa0000000 | (0x22 << (2 + 2 + 9)) + #else + #error "unexpected EMCCLK" + #endif + } #endif }; -const BSP_START_DATA_SECTION size_t +BSP_START_DATA_SECTION const size_t lpc24xx_start_config_emc_dynamic_chip_count = sizeof(lpc24xx_start_config_emc_dynamic_chip) / sizeof(lpc24xx_start_config_emc_dynamic_chip [0]); diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c index 2efcacd3ba..c0c541038d 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-emc-static.c @@ -25,9 +25,9 @@ #include #include -const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config +BSP_START_DATA_SECTION const lpc24xx_emc_static_chip_config lpc24xx_start_config_emc_static_chip [] = { -#ifdef LPC24XX_EMC_NUMONYX +#if defined(LPC24XX_EMC_NUMONYX_M29W160E) /* * Static Memory 1: Numonyx M29W160EB * @@ -66,10 +66,40 @@ const BSP_START_DATA_SECTION lpc24xx_emc_static_chip_config .waitrun = 0xf } } -#endif /* LPC24XX_EMC_NUMONYX */ +#elif defined(LPC24XX_EMC_SST39VF3201) + /* Static Memory 1: SST SST39VF3201 at 51612800Hz (tCK = 19.4ns) */ + { + .chip_select = (volatile lpc_emc_static *) EMC_STA_BASE_0, + .config = { + /* + * 16 bit, page mode disabled, active LOW chip select, extended wait + * disabled, writes not protected, byte lane state LOW/LOW. + */ + .config = 0x81, + + /* (n + 1) clock cycles -> 19.4ns >= 0ns (tCS, tAS) */ + .waitwen = 0, + + /* (n + 1) clock cycles -> 19.4ns >= 0ns (tOES) */ + .waitoen = 0, + + /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */ + .waitrd = 2, + + /* (n + 1) clock cycles -> 77.5ns >= 70ns (tRC) */ + .waitpage = 2, + + /* (n + 2) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */ + .waitwr = 0, + + /* (n + 1) clock cycles -> 38.8ns >= 20ns (tCHZ, TOHZ) */ + .waitrun = 1 + } + } +#endif }; -const BSP_START_DATA_SECTION size_t +BSP_START_DATA_SECTION const size_t lpc24xx_start_config_emc_static_chip_count = sizeof(lpc24xx_start_config_emc_static_chip) / sizeof(lpc24xx_start_config_emc_static_chip [0]); diff --git a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c index 7cb3c33925..96e17c56d0 100644 --- a/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c +++ b/c/src/lib/libbsp/arm/lpc24xx/startup/start-config-pinsel.c @@ -24,23 +24,53 @@ #include -const BSP_START_DATA_SECTION uint32_t lpc24xx_start_config_pinsel_5_9 [] = { -#if defined(LPC24XX_EMC_MICRON) \ - || defined(LPC24XX_EMC_K4S561632E) \ - || defined(LPC24XX_EMC_NUMONYX) - 0x05010115, - 0x55555555, - 0x0, - #ifdef LPC24XX_EMC_K4S561632E - 0x15555555, - 0x0a040000 - #else - 0x55555555, - 0x40050155 - #endif +BSP_START_DATA_SECTION const lpc24xx_pin_range + lpc24xx_start_config_pinsel [] = { +#if defined(LPC24XX_EMC_MT48LC4M16A2) \ + && defined(LPC24XX_EMC_NUMONYX_M29W160E) + LPC24XX_PIN_EMC_A_0_20, + LPC24XX_PIN_EMC_D_0_15, + LPC24XX_PIN_EMC_RAS, + LPC24XX_PIN_EMC_CAS, + LPC24XX_PIN_EMC_WE, + LPC24XX_PIN_EMC_DYCS_0, + LPC24XX_PIN_EMC_CLK_0, + LPC24XX_PIN_EMC_CKE_0, + LPC24XX_PIN_EMC_DQM_0, + LPC24XX_PIN_EMC_DQM_1, + LPC24XX_PIN_EMC_OE, + LPC24XX_PIN_EMC_CS_1, #endif +#if defined(LPC24XX_EMC_W9825G2JB75I) \ + && defined(LPC24XX_EMC_SST39VF3201) + LPC24XX_PIN_EMC_A_0_22, + LPC24XX_PIN_EMC_D_0_31, + LPC24XX_PIN_EMC_RAS, + LPC24XX_PIN_EMC_CAS, + LPC24XX_PIN_EMC_WE, + LPC24XX_PIN_EMC_DYCS_0, + LPC24XX_PIN_EMC_CLK_0, + LPC24XX_PIN_EMC_CKE_0, + LPC24XX_PIN_EMC_DQM_0, + LPC24XX_PIN_EMC_DQM_1, + LPC24XX_PIN_EMC_DQM_2, + LPC24XX_PIN_EMC_DQM_3, + LPC24XX_PIN_EMC_OE, + LPC24XX_PIN_EMC_CS_0, +#endif +#if defined(LPC24XX_EMC_IS42S32800B) + LPC24XX_PIN_EMC_A_0_14, + LPC24XX_PIN_EMC_D_0_31, + LPC24XX_PIN_EMC_RAS, + LPC24XX_PIN_EMC_CAS, + LPC24XX_PIN_EMC_WE, + LPC24XX_PIN_EMC_DYCS_0, + LPC24XX_PIN_EMC_CLK_0, + LPC24XX_PIN_EMC_CKE_0, + LPC24XX_PIN_EMC_DQM_0, + LPC24XX_PIN_EMC_DQM_1, + LPC24XX_PIN_EMC_DQM_2, + LPC24XX_PIN_EMC_DQM_3, +#endif + LPC24XX_PIN_TERMINAL }; - -const BSP_START_DATA_SECTION size_t - lpc24xx_start_config_pinsel_5_9_size = - sizeof(lpc24xx_start_config_pinsel_5_9); -- cgit v1.2.3