From 0c47440c6a8bc6bab476bf787fb784490377a326 Mon Sep 17 00:00:00 2001 From: Karel Gardas Date: Thu, 29 Aug 2013 22:20:03 +0200 Subject: bsp/lm4f120: new BSP to support TI LM4F120 XL LaunchPad board --- c/src/lib/libbsp/arm/lm3s69xx/include/lm3s69xx.h | 15 ++++++++++++++- c/src/lib/libbsp/arm/lm3s69xx/include/syscon.h | 1 + 2 files changed, 15 insertions(+), 1 deletion(-) (limited to 'c/src/lib/libbsp/arm/lm3s69xx/include') diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/lm3s69xx.h b/c/src/lib/libbsp/arm/lm3s69xx/include/lm3s69xx.h index 74026248ad..2b38d936cb 100644 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/lm3s69xx.h +++ b/c/src/lib/libbsp/arm/lm3s69xx/include/lm3s69xx.h @@ -32,10 +32,12 @@ #define LM3S69XX_GPIO_D_BASE 0x4005b000 #define LM3S69XX_GPIO_E_BASE 0x4005c000 #define LM3S69XX_GPIO_F_BASE 0x4005d000 +#if LM3S69XX_NUM_GPIO_BLOCKS > 6 #define LM3S69XX_GPIO_G_BASE 0x4005e000 #if LM3S69XX_NUM_GPIO_BLOCKS > 7 #define LM3S69XX_GPIO_H_BASE 0x4005f000 #endif +#endif #define LM3S69XX_GPIO(port) ((volatile lm3s69xx_gpio *)(LM3S69XX_GPIO_A_BASE + (port) * 0x1000)) #else /* LM3S69XX_USE_AHB_FOR_GPIO */ @@ -45,10 +47,12 @@ #define LM3S69XX_GPIO_D_BASE 0x40007000 #define LM3S69XX_GPIO_E_BASE 0x40024000 #define LM3S69XX_GPIO_F_BASE 0x40025000 +#if LM3S69XX_NUM_GPIO_BLOCKS > 6 #define LM3S69XX_GPIO_G_BASE 0x40026000 #if LM3S69XX_NUM_GPIO_BLOCKS > 7 #define LM3S69XX_GPIO_H_BASE 0x40027000 #endif +#endif #define LM3S69XX_GPIO(port) ((volatile lm3s69xx_gpio *)(((port) < 4) ? \ (LM3S69XX_GPIO_A_BASE + (port) * 0x1000) : \ @@ -58,6 +62,12 @@ #define LM3S69XX_SSI_0_BASE 0x40008000 #if LM3S69XX_NUM_SSI_BLOCKS > 1 #define LM3S69XX_SSI_1_BASE 0x40009000 +#if LM3S69XX_NUM_SSI_BLOCKS > 2 +#define LM3S69XX_SSI_2_BASE 0x4000A000 +#if LM3S69XX_NUM_SSI_BLOCKS > 3 +#define LM3S69XX_SSI_3_BASE 0x4000B000 +#endif +#endif #endif #define LM3S69XX_SYSCON ((volatile lm3s69xx_syscon *)LM3S69XX_SYSCON_BASE) @@ -194,8 +204,11 @@ typedef struct { uint32_t gpiohbctl; #define SYSCONRCC2_USERCC2 BSP_BIT32(31) +#define SYSCONRCC2_DIV400 BSP_BIT32(30) #define SYSCONRCC2_SYSDIV2(val) BSP_FLD32(val, 23, 28) -#define SYSCONRCC2_SYSDIV2_MSK(val) BSP_MSK32(23, 28) +#define SYSCONRCC2_SYSDIV2_MSK BSP_MSK32(23, 28) +#define SYSCONRCC2_SYSDIV2EXT(val) BSP_FLD32(val, 22, 28) +#define SYSCONRCC2_SYSDIV2EXT_MSK BSP_MSK32(22, 28) #define SYSCONRCC2_USBPWRDN BSP_BIT32(14) #define SYSCONRCC2_PWRDN2 BSP_BIT32(13) #define SYSCONRCC2_BYPASS2 BSP_BIT32(11) diff --git a/c/src/lib/libbsp/arm/lm3s69xx/include/syscon.h b/c/src/lib/libbsp/arm/lm3s69xx/include/syscon.h index 0f3dc3b0cf..78af4a757e 100644 --- a/c/src/lib/libbsp/arm/lm3s69xx/include/syscon.h +++ b/c/src/lib/libbsp/arm/lm3s69xx/include/syscon.h @@ -18,6 +18,7 @@ void lm3s69xx_syscon_enable_uart_clock(unsigned int port, bool enable); void lm3s69xx_syscon_enable_ssi_clock(unsigned int port, bool enable); void lm3s69xx_syscon_enable_pwm_clock(bool enable); void lm3s69xx_syscon_set_pwmdiv(unsigned int div); +void lm3s69xx_syscon_delay_3x_clocks(unsigned long x_count); #ifdef __cplusplus } -- cgit v1.2.3