From cbc433c7a25dbe19414f70edc64f9de1f630a117 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 25 Nov 2014 08:40:20 +0100 Subject: bsps/arm: Add .nocache section This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area(). --- c/src/lib/libbsp/arm/gp32/startup/linkcmds | 2 ++ 1 file changed, 2 insertions(+) (limited to 'c/src/lib/libbsp/arm/gp32') diff --git a/c/src/lib/libbsp/arm/gp32/startup/linkcmds b/c/src/lib/libbsp/arm/gp32/startup/linkcmds index d705a2b862..6fcbe1a7e4 100644 --- a/c/src/lib/libbsp/arm/gp32/startup/linkcmds +++ b/c/src/lib/libbsp/arm/gp32/startup/linkcmds @@ -18,6 +18,8 @@ REGION_ALIAS ("REGION_FAST_DATA_LOAD", SDRAM); REGION_ALIAS ("REGION_BSS", SDRAM); REGION_ALIAS ("REGION_WORK", SDRAM); REGION_ALIAS ("REGION_STACK", SDRAM); +REGION_ALIAS ("REGION_NOCACHE", SDRAM); +REGION_ALIAS ("REGION_NOCACHE_LOAD", SDRAM); _ttbl_base = ORIGIN (SDRAM_MMU); -- cgit v1.2.3