From cbc433c7a25dbe19414f70edc64f9de1f630a117 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Tue, 25 Nov 2014 08:40:20 +0100 Subject: bsps/arm: Add .nocache section This section can be use to provide a cache coherent memory area via rtems_cache_coherent_add_area(). --- c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c') diff --git a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c index 98b4ac833b..9d56e5c8f5 100644 --- a/c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c +++ b/c/src/lib/libbsp/arm/altera-cyclone-v/startup/mmu-config.c @@ -14,16 +14,9 @@ #include -LINKER_SYMBOL(bsp_section_nocache_end); -LINKER_SYMBOL(bsp_section_nocache_begin); - const arm_cp15_start_section_config arm_cp15_start_mmu_config_table[] = { ARMV7_CP15_START_DEFAULT_SECTIONS, - { - .begin = (uint32_t) bsp_section_nocache_begin, - .end = (uint32_t) bsp_section_nocache_end, - .flags = ARMV7_MMU_DATA_READ_WRITE - }, { /* Periphery area */ + { /* Periphery area */ .begin = 0xFC000000U, .end = 0x00000000U, .flags = ARMV7_MMU_DEVICE -- cgit v1.2.3