From 5a064dca14ba83898ec91aaf791fb004248a46ef Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Tue, 18 May 1999 17:41:16 +0000 Subject: Patch from Daniel Kelley : I found a small buglet in the mips64orion _CPU_ISR_Set_level; the original was wiping out the level argument, and then comparing the current interrupt level with some random value of v0. See patch below. --- c/src/exec/score/cpu/mips/cpu_asm.S | 8 ++++---- c/src/exec/score/cpu/mips64orion/cpu_asm.S | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) (limited to 'c/src/exec/score/cpu') diff --git a/c/src/exec/score/cpu/mips/cpu_asm.S b/c/src/exec/score/cpu/mips/cpu_asm.S index 7dcb8fbda7..125b4d58d4 100644 --- a/c/src/exec/score/cpu/mips/cpu_asm.S +++ b/c/src/exec/score/cpu/mips/cpu_asm.S @@ -153,12 +153,12 @@ ENDFRAME(_CPU_ISR_Get_level) FRAME(_CPU_ISR_Set_level,sp,0,ra) nop - mfc0 a0,C0_SR + mfc0 v0,C0_SR nop - andi a0,SR_EXL - beqz a0,_CPU_ISR_Set_1 /* normalize a0 */ + andi v0,SR_EXL + beqz v0,_CPU_ISR_Set_1 /* normalize v0 */ nop - li a0,1 + li v0,1 _CPU_ISR_Set_1: beq v0,a0,_CPU_ISR_Set_exit /* if (current_level != new_level ) */ nop diff --git a/c/src/exec/score/cpu/mips64orion/cpu_asm.S b/c/src/exec/score/cpu/mips64orion/cpu_asm.S index 7dcb8fbda7..125b4d58d4 100644 --- a/c/src/exec/score/cpu/mips64orion/cpu_asm.S +++ b/c/src/exec/score/cpu/mips64orion/cpu_asm.S @@ -153,12 +153,12 @@ ENDFRAME(_CPU_ISR_Get_level) FRAME(_CPU_ISR_Set_level,sp,0,ra) nop - mfc0 a0,C0_SR + mfc0 v0,C0_SR nop - andi a0,SR_EXL - beqz a0,_CPU_ISR_Set_1 /* normalize a0 */ + andi v0,SR_EXL + beqz v0,_CPU_ISR_Set_1 /* normalize v0 */ nop - li a0,1 + li v0,1 _CPU_ISR_Set_1: beq v0,a0,_CPU_ISR_Set_exit /* if (current_level != new_level ) */ nop -- cgit v1.2.3