From afd63b7656ae2b8bbef771aa0d470cc5f7c30070 Mon Sep 17 00:00:00 2001
From: Joel Sherrill <joel.sherrill@OARcorp.com>
Date: Tue, 13 Jun 2000 22:57:19 +0000
Subject: Added crude i960ka support.

---
 c/src/exec/score/cpu/i960/cpu.c              | 12 +++++++----
 c/src/exec/score/cpu/i960/cpu_asm.S          |  2 ++
 c/src/exec/score/cpu/i960/rtems/score/i960.h | 30 ++++++++++++++++++++++++++--
 3 files changed, 38 insertions(+), 6 deletions(-)

(limited to 'c/src/exec/score/cpu/i960')

diff --git a/c/src/exec/score/cpu/i960/cpu.c b/c/src/exec/score/cpu/i960/cpu.c
index b33d8e1b03..009e0d3ca4 100644
--- a/c/src/exec/score/cpu/i960/cpu.c
+++ b/c/src/exec/score/cpu/i960/cpu.c
@@ -17,6 +17,8 @@
 
 #if defined(__i960CA__) || defined(__i960_CA__) || defined(__i960CA)
 #elif defined(__i960RP__)
+#elif defined(__i960KA__)
+
 #else
 #warning "***  ENTIRE FILE IMPLEMENTED & TESTED FOR CA & RP ONLY  ***"
 #warning "*** THIS FILE WILL NOT COMPILE ON ANOTHER FAMILY MEMBER ***"
@@ -71,6 +73,8 @@ unsigned32 _CPU_ISR_Get_level( void )
 #elif defined(__i960RP__)
 #define i960_vector_caching_enabled( _prcb ) \
    ((*((unsigned int *) ICON_ADDR)) & 0x2000)
+#elif defined(__i960KA__)
+#define i960_vector_caching_enabled( _prcb ) 0
 #endif
 
 void _CPU_ISR_install_raw_handler(
@@ -143,8 +147,7 @@ void _CPU_ISR_install_vector(
                   : "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
                   : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
  }
-#else
-#if defined(__i960RP__) || defined(__i960_RP__) || defined(__i960RP)
+#elif defined(__i960RP__) || defined(__i960_RP__) || defined(__i960RP)
 #define soft_reset( prcb ) \
  { register i960_PRCB *_prcb = (prcb); \
    register unsigned32  *_next=0; \
@@ -155,7 +158,8 @@ void _CPU_ISR_install_vector(
                   : "=d" (_cmd), "=d" (_next), "=d" (_prcb) \
                   : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
  }
-#endif
+#elif defined(__i960KA__)
+#define soft_reset( prcb )
 #endif
 
 void _CPU_Install_interrupt_stack( void )
@@ -173,7 +177,7 @@ void _CPU_Install_interrupt_stack( void )
 
   _CPU_ISR_Disable( level );
 
-    prcb->intr_stack = _CPU_Interrupt_stack_low;
+  prcb->intr_stack = _CPU_Interrupt_stack_low;
 
 #if defined(__i960CA__) || defined(__i960_CA__) || defined(__i960CA)
     soft_reset( prcb );
diff --git a/c/src/exec/score/cpu/i960/cpu_asm.S b/c/src/exec/score/cpu/i960/cpu_asm.S
index e990b7a799..88b07a5b45 100644
--- a/c/src/exec/score/cpu/i960/cpu_asm.S
+++ b/c/src/exec/score/cpu/i960/cpu_asm.S
@@ -218,6 +218,7 @@ __ISR_Dispatch:
         ret
 
 
+#if !defined(__i960KA__)
 /*PAGE
  *
  *  void __i960_soft_reset_asm
@@ -242,3 +243,4 @@ __i960_reset_done:
 		mov			r5, pfp
 		mov			r6, sp
 		ret
+#endif
diff --git a/c/src/exec/score/cpu/i960/rtems/score/i960.h b/c/src/exec/score/cpu/i960/rtems/score/i960.h
index 644bd18a0b..de7b635869 100644
--- a/c/src/exec/score/cpu/i960/rtems/score/i960.h
+++ b/c/src/exec/score/cpu/i960/rtems/score/i960.h
@@ -49,6 +49,9 @@ extern "C" {
 #define CPU_MODEL_NAME  "i960ca"
 #define __RTEMS_I960CA__
 
+#elif defined(__i960KA__)
+#define CPU_MODEL_NAME  "i960ka"
+
 #elif defined(__i960HA__) || defined(__i960_HA__) || defined(__i960HA)
 
 #define CPU_MODEL_NAME  "i960ha"
@@ -304,6 +307,26 @@ typedef struct {
 typedef i960rp_control_table i960_control_table;
 typedef i960rp_PRCB i960_PRCB;
 
+#elif defined(__i960KA__)
+
+/* i960KA control structures */
+
+/* Intel i960KA Control Table */
+
+typedef struct {
+int pad0;
+}   i960ka_control_table;
+
+/* Intel i960KA Processor Control Block */
+
+typedef struct {
+  void           **intr_tbl;      /* interrupt table base address */
+  unsigned int    *intr_stack;    /* interrupt stack pointer */
+}   i960ka_PRCB;
+
+typedef i960ka_control_table i960_control_table;
+typedef i960ka_PRCB i960_PRCB;
+
 #else
 #error "invalid processor selection!"
 #endif
@@ -312,10 +335,12 @@ typedef i960rp_PRCB i960_PRCB;
  *  Miscellaneous Support Routines
  */
 
+#if !defined(__i960KA__)
 #define i960_reload_ctl_group( group ) \
  { register int _cmd = ((group)|0x400) ; \
    asm volatile( "sysctl %0,%0,%0" : "=d" (_cmd) : "0" (_cmd) ); \
  }
+#endif
 
 #define i960_atomic_modify( mask, addr, prev ) \
  { register unsigned int  _mask = (mask); \
@@ -368,10 +393,12 @@ typedef i960rp_PRCB i960_PRCB;
     (_level) = ((_level) & 0x1f0000) >> 16; \
   } while ( 0 )
 
+#if !defined(__i960KA__)
 #define i960_cause_intr( intr ) \
  { register int _intr = (intr); \
    asm volatile( "sysctl %0,%0,%0" : "=d" (_intr) : "0" (_intr) ); \
  }
+#endif
 
 /*
  *  Interrupt Masking Routines
@@ -468,7 +495,6 @@ static inline unsigned int i960_get_fp()
  */
 
 #if defined(I960_SOFT_RESET_COMMAND)
-
 #define i960_soft_reset( prcb ) \
  { register i960_PRCB    *_prcb = (prcb); \
    register unsigned int *_next=0; \
@@ -480,7 +506,7 @@ static inline unsigned int i960_get_fp()
                   : "0"  (_cmd), "1"  (_next), "2"  (_prcb) ); \
  }
 
-#else
+#elif !defined(__i960KA__)
 #warning "I960_SOFT_RESET_COMMAND is not defined"
 #endif
 
-- 
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