From 4f0b287a4aa0d948d61f5c2ef1915c4db24f30e9 Mon Sep 17 00:00:00 2001 From: Joel Sherrill Date: Wed, 17 Jul 2002 17:14:31 +0000 Subject: 2002-07-17 Jay Monkman * rtems/score/cpu_asm.h: Enhanced to include register offsets. * Makefile.am: Install rtems/score/cpu_asm.h. * cpu.c: Significantly enhanced including the implementation of _CPU_ISR_Get_level. * cpu_asm.S: Improved behavior of context switch and interrupt dispatching. * rtems/score/arm.h: Improved the CPU model name determination. * rtems/score/cpu.h: Improved interrupt disable/enable functions. --- c/src/exec/score/cpu/arm/cpu.c | 187 ++++++++++++++++++++++++++++------------- 1 file changed, 130 insertions(+), 57 deletions(-) (limited to 'c/src/exec/score/cpu/arm/cpu.c') diff --git a/c/src/exec/score/cpu/arm/cpu.c b/c/src/exec/score/cpu/arm/cpu.c index ec2a8f5e5c..3ae3f5828a 100644 --- a/c/src/exec/score/cpu/arm/cpu.c +++ b/c/src/exec/score/cpu/arm/cpu.c @@ -5,6 +5,9 @@ * COPYRIGHT (c) 2000 Canon Research Centre France SA. * Emmanuel Raguet, mailto:raguet@crf.canon.fr * + * Copyright (c) 2002 Advent Networks, Inc + * Jay Monkman + * * The license and distribution terms for this file may be * found in the file LICENSE in this distribution or at * http://www.OARcorp.com/rtems/license.html. @@ -25,30 +28,32 @@ * * INPUT PARAMETERS: * cpu_table - CPU table to initialize - * thread_dispatch - address of disptaching routine + * thread_dispatch - address of ISR disptaching routine (unused) + * */ - void _CPU_Initialize( rtems_cpu_table *cpu_table, void (*thread_dispatch) /* ignored on this CPU */ ) { - _CPU_Table = *cpu_table; + _CPU_Table = *cpu_table; } -/*PAGE +/* * - * _CPU_ISR_Get_level + * _CPU_ISR_Get_level - returns the current interrupt level */ unsigned32 _CPU_ISR_Get_level( void ) { - /* - * This routine returns the current interrupt level. - */ - - return 0; + unsigned32 reg; + + asm volatile ("mrs %0, cpsr \n" \ + "and %0, %0, #0xc0 \n" \ + : "=r" (reg)); + + return reg; } /* @@ -59,28 +64,48 @@ unsigned32 _CPU_ISR_Get_level( void ) * * Input parameters: * vector - interrupt vector number - * old_handler - former ISR for this vector number * new_handler - replacement ISR for this vector number + * old_handler - pointer to store former ISR for this vector number + * + * FIXME: This vector scheme should be changed to allow FIQ to be + * handled better. I'd like to be able to put VectorTable + * elsewhere - JTM + * * * Output parameters: NONE * */ - void _CPU_ISR_install_vector( unsigned32 vector, proc_ptr new_handler, proc_ptr *old_handler ) { - /* pointer on the redirection table in RAM */ - long *VectorTable = (long *)(MAX_EXCEPTIONS * 4); - - if (old_handler != NULL) - old_handler = *(proc_ptr *)(VectorTable + vector); - *(VectorTable + vector) = (long)new_handler ; + /* pointer on the redirection table in RAM */ + long *VectorTable = (long *)(MAX_EXCEPTIONS * 4); + + if (old_handler != NULL) { + old_handler = *(proc_ptr *)(VectorTable + vector); + } + + *(VectorTable + vector) = (long)new_handler ; } +void _CPU_Context_Initialize( + Context_Control *the_context, + unsigned32 *stack_base, + unsigned32 size, + unsigned32 new_level, + void *entry_point, + boolean is_fp +) +{ + the_context->register_sp = ((unsigned32)(stack_base)) + (size) ; + the_context->register_pc = (entry_point); + the_context->register_cpsr = (new_level | 0x13); +} + /*PAGE * * _CPU_Install_interrupt_stack @@ -88,6 +113,32 @@ void _CPU_ISR_install_vector( void _CPU_Install_interrupt_stack( void ) { +/* FIXME: do something here */ +#if 0 + extern unsigned long _fiq_stack; + extern unsigned long _fiq_stack_size; + extern unsigned long _irq_stack; + extern unsigned long _irq_stack_size; + extern unsigned long _abt_stack; + extern unsigned long _abt_stack_size; + unsigned long *ptr; + int i; + + ptr = &_fiq_stack; + for (i = 0; i < ((int)&_fiq_stack_size/4); i++) { + ptr[i] = 0x13131313; + } + + ptr = &_irq_stack; + for (i = 0; i < ((int)&_irq_stack_size/4); i++) { + ptr[i] = 0xf0f0f0f0; + } + + ptr = &_abt_stack; + for (i = 0; i < ((int)&_abt_stack_size/4); i++) { + ptr[i] = 0x55555555; + } +#endif } /*PAGE @@ -110,60 +161,82 @@ void _CPU_Install_interrupt_stack( void ) void _CPU_Thread_Idle_body( void ) { - while(1); + while(1); /* FIXME: finish this */ /* insert your "halt" instruction here */ ; } void _defaultExcHandler (CPU_Exception_frame *ctx) { - printk("----------------------------------------------------------\n"); - printk("Exception %d caught at PC %x by thread %d\n", - ctx->register_pc, ctx->register_lr - 4, - _Thread_Executing->Object.id); - printk("----------------------------------------------------------\n"); - printk("Processor execution context at time of the fault was :\n"); - printk("----------------------------------------------------------\n"); - printk(" r0 = %x r1 = %x r2 = %x r3 = %x\n", - ctx->register_r0, ctx->register_r1, ctx->register_r2, ctx->register_r3); - printk(" r4 = %x r5 = %x r6 = %x r7 = %x\n", - ctx->register_r4, ctx->register_r5, ctx->register_r6, ctx->register_r7); - printk(" r8 = %x r9 = %x r10 = %x\n", - ctx->register_r8, ctx->register_r9, ctx->register_r10); - printk(" fp = %x ip = %x sp = %x pc = %x\n", - ctx->register_fp, ctx->register_ip, ctx->register_sp, ctx->register_lr - 4); - printk("----------------------------------------------------------\n"); - - if (_ISR_Nest_level > 0) { - /* - * In this case we shall not delete the task interrupted as - * it has nothing to do with the fault. We cannot return either - * because the eip points to the faulty instruction so... - */ - printk("Exception while executing ISR!!!. System locked\n"); - while(1); - } - else { - printk(" ************ FAULTY THREAD WILL BE DELETED **************\n"); - rtems_task_delete(_Thread_Executing->Object.id); - } + printk("\n\r"); + printk("----------------------------------------------------------\n\r"); + printk("Exception 0x%x caught at PC 0x%x by thread %d\n", + ctx->register_pc, ctx->register_lr - 4, + _Thread_Executing->Object.id); + printk("----------------------------------------------------------\n\r"); + printk("Processor execution context at time of the fault was :\n\r"); + printk("----------------------------------------------------------\n\r"); + printk(" r0 = %8x r1 = %8x r2 = %8x r3 = %8x\n\r", + ctx->register_r0, ctx->register_r1, + ctx->register_r2, ctx->register_r3); + printk(" r4 = %8x r5 = %8x r6 = %8x r7 = %8x\n\r", + ctx->register_r4, ctx->register_r5, + ctx->register_r6, ctx->register_r7); + printk(" r8 = %8x r9 = %8x r10 = %8x\n\r", + ctx->register_r8, ctx->register_r9, ctx->register_r10); + printk(" fp = %8x ip = %8x sp = %8x pc = %8x\n\r", + ctx->register_fp, ctx->register_ip, + ctx->register_sp, ctx->register_lr - 4); + printk("----------------------------------------------------------\n\r"); + + if (_ISR_Nest_level > 0) { + /* + * In this case we shall not delete the task interrupted as + * it has nothing to do with the fault. We cannot return either + * because the eip points to the faulty instruction so... + */ + printk("Exception while executing ISR!!!. System locked\n\r"); + while(1); + } + else { + printk("*********** FAULTY THREAD WILL BE DELETED **************\n\r"); + rtems_task_delete(_Thread_Executing->Object.id); + } } cpuExcHandlerType _currentExcHandler = _defaultExcHandler; extern void _Exception_Handler_Undef_Swi(); extern void _Exception_Handler_Abort(); - +/* FIXME: put comments here */ void rtems_exception_init_mngt() { - ISR_Level level; + ISR_Level level; _CPU_ISR_Disable(level); - _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, _Exception_Handler_Undef_Swi, NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, _Exception_Handler_Abort , NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, _Exception_Handler_Abort , NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, _Exception_Handler_Abort , NULL); - _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, _Exception_Handler_Abort , NULL); + _CPU_ISR_install_vector(ARM_EXCEPTION_UNDEF, + _Exception_Handler_Undef_Swi, + NULL); + + _CPU_ISR_install_vector(ARM_EXCEPTION_SWI, + _Exception_Handler_Undef_Swi, + NULL); + + _CPU_ISR_install_vector(ARM_EXCEPTION_PREF_ABORT, + _Exception_Handler_Abort, + NULL); + + _CPU_ISR_install_vector(ARM_EXCEPTION_DATA_ABORT, + _Exception_Handler_Abort, + NULL); + + _CPU_ISR_install_vector(ARM_EXCEPTION_FIQ, + _Exception_Handler_Abort, + NULL); + + _CPU_ISR_install_vector(ARM_EXCEPTION_IRQ, + _Exception_Handler_Abort, + NULL); + _CPU_ISR_Enable(level); } -- cgit v1.2.3