From 3e4fa73935ca25e7941de72bf4285e229e5fe8b1 Mon Sep 17 00:00:00 2001 From: Chris Johns Date: Mon, 24 Apr 2023 08:23:14 +1000 Subject: bsps/powerpc: Fix warnings with PPC_SPECIAL_PURPOSE_REGISTER --- bsps/powerpc/gen83xx/start/bsprestart.c | 2 +- bsps/powerpc/gen83xx/start/cpuinit.c | 2 +- bsps/powerpc/mpc55xxevb/start/bspstart.c | 2 +- bsps/powerpc/mpc55xxevb/start/flash_support.c | 10 +++++----- bsps/powerpc/qoriq/irq/irq.c | 2 +- bsps/powerpc/qoriq/start/mmu.c | 7 ++++--- 6 files changed, 13 insertions(+), 12 deletions(-) (limited to 'bsps') diff --git a/bsps/powerpc/gen83xx/start/bsprestart.c b/bsps/powerpc/gen83xx/start/bsprestart.c index dec25e8c13..ab0c994ea0 100644 --- a/bsps/powerpc/gen83xx/start/bsprestart.c +++ b/bsps/powerpc/gen83xx/start/bsprestart.c @@ -46,7 +46,7 @@ void bsp_restart(void *addr) rtems_interrupt_disable(level); (void) level; /* avoid set but not used warning */ - hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + PPC_SPECIAL_PURPOSE_REGISTER(HID0, hid0); if ((hid0 & HID0_DCE) != 0) { rtems_cache_flush_multiple_data_lines(mem_begin, mem_size); diff --git a/bsps/powerpc/gen83xx/start/cpuinit.c b/bsps/powerpc/gen83xx/start/cpuinit.c index 1e867bb323..feeda59766 100644 --- a/bsps/powerpc/gen83xx/start/cpuinit.c +++ b/bsps/powerpc/gen83xx/start/cpuinit.c @@ -93,7 +93,7 @@ void cpu_init( void) clear_mmu_regs(); /* Clear caches */ - hid0 = PPC_SPECIAL_PURPOSE_REGISTER(HID0); + PPC_SPECIAL_PURPOSE_REGISTER(HID0, hid0); if ((hid0 & (HID0_ICE | HID0_DCE)) == 0) { hid0 &= ~(HID0_ILOCK | HID0_DLOCK | HID0_ICE | HID0_DCE); PPC_SET_SPECIAL_PURPOSE_REGISTER(HID0, hid0); diff --git a/bsps/powerpc/mpc55xxevb/start/bspstart.c b/bsps/powerpc/mpc55xxevb/start/bspstart.c index 4c4bd87462..a24d3a394a 100644 --- a/bsps/powerpc/mpc55xxevb/start/bspstart.c +++ b/bsps/powerpc/mpc55xxevb/start/bspstart.c @@ -69,7 +69,7 @@ static void null_pointer_protection(void) PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mmu.MAS0.R); __asm__ volatile ("tlbre"); - mmu.MAS1.R = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R); mmu.MAS1.B.VALID = 0; PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mmu.MAS1.R); __asm__ volatile ("tlbwe"); diff --git a/bsps/powerpc/mpc55xxevb/start/flash_support.c b/bsps/powerpc/mpc55xxevb/start/flash_support.c index c7382ca4d4..a6dfe119e5 100644 --- a/bsps/powerpc/mpc55xxevb/start/flash_support.c +++ b/bsps/powerpc/mpc55xxevb/start/flash_support.c @@ -297,9 +297,9 @@ addr_map( rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS0, mas0); asm volatile("tlbre"); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); if (mas1 & 0x80000000) { @@ -671,7 +671,7 @@ mpc55xx_flash_writable(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); rtems_interrupt_enable(level); return ((mas3 & 0x0000000C) == 0x0000000C) ? 1 : 0; @@ -689,7 +689,7 @@ mpc55xx_flash_address(void) rtems_interrupt_disable(level); PPC_SET_SPECIAL_PURPOSE_REGISTER( FSL_EIS_MAS0, 0x10010000); asm volatile("tlbre"); - mas2 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS2, mas2); rtems_interrupt_enable(level); return mas2 & 0xFFFFF000; diff --git a/bsps/powerpc/qoriq/irq/irq.c b/bsps/powerpc/qoriq/irq/irq.c index 6f7f6a1378..dcc213e7ed 100644 --- a/bsps/powerpc/qoriq/irq/irq.c +++ b/bsps/powerpc/qoriq/irq/irq.c @@ -180,7 +180,7 @@ void bsp_interrupt_dispatch(uintptr_t exception_number) * This works only if the "has-external-proxy" property is present in the * "epapr,hv-pic" device tree node. */ - vector = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_EPR); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_EPR, vector); if (vector != SPURIOUS) { uint32_t msr; diff --git a/bsps/powerpc/qoriq/start/mmu.c b/bsps/powerpc/qoriq/start/mmu.c index acd481fe12..14a147681d 100644 --- a/bsps/powerpc/qoriq/start/mmu.c +++ b/bsps/powerpc/qoriq/start/mmu.c @@ -367,10 +367,11 @@ void qoriq_mmu_change_perm(uint32_t test, uint32_t set, uint32_t clear) ppc_tlbre(); ppc_synchronize_instructions(); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); if ((mas1 & FSL_EIS_MAS1_V) != 0) { uint32_t mask = 0x3ff; - uint32_t mas3 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3); + uint32_t mas3; + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS3, mas3); if ((mas3 & mask) == test) { mas3 &= ~(clear & mask); @@ -398,7 +399,7 @@ int qoriq_mmu_find_free_tlb1_entry(void) ppc_tlbre(); ppc_synchronize_instructions(); - mas1 = PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1); + PPC_SPECIAL_PURPOSE_REGISTER(FSL_EIS_MAS1, mas1); if ((mas1 & FSL_EIS_MAS1_V) == 0) { return i; } -- cgit v1.2.3