From 37059626acbf02f8747c533758c077783320a0e8 Mon Sep 17 00:00:00 2001 From: Gedare Bloom Date: Thu, 10 Jun 2021 17:03:03 -0600 Subject: aarch64/xilinx-versal: new BSPs for qemu and vck190 --- bsps/aarch64/xilinx-versal/console/console.c | 134 ++++++++++++ .../xilinx-versal/dev/serial/versal-uart-polled.c | 228 +++++++++++++++++++++ bsps/aarch64/xilinx-versal/include/bsp.h | 81 ++++++++ bsps/aarch64/xilinx-versal/include/bsp/irq.h | 70 +++++++ .../include/dev/serial/versal-uart-regs.h | 141 +++++++++++++ .../xilinx-versal/include/dev/serial/versal-uart.h | 90 ++++++++ bsps/aarch64/xilinx-versal/include/tm27.h | 45 ++++ bsps/aarch64/xilinx-versal/start/bspstart.c | 48 +++++ bsps/aarch64/xilinx-versal/start/bspstarthooks.c | 51 +++++ bsps/aarch64/xilinx-versal/start/bspstartmmu.c | 77 +++++++ 10 files changed, 965 insertions(+) create mode 100644 bsps/aarch64/xilinx-versal/console/console.c create mode 100644 bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c create mode 100644 bsps/aarch64/xilinx-versal/include/bsp.h create mode 100644 bsps/aarch64/xilinx-versal/include/bsp/irq.h create mode 100644 bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h create mode 100644 bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h create mode 100644 bsps/aarch64/xilinx-versal/include/tm27.h create mode 100644 bsps/aarch64/xilinx-versal/start/bspstart.c create mode 100644 bsps/aarch64/xilinx-versal/start/bspstarthooks.c create mode 100644 bsps/aarch64/xilinx-versal/start/bspstartmmu.c (limited to 'bsps') diff --git a/bsps/aarch64/xilinx-versal/console/console.c b/bsps/aarch64/xilinx-versal/console/console.c new file mode 100644 index 0000000000..e7f752f1a7 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/console/console.c @@ -0,0 +1,134 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This source file contains this BSP's console configuration. + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +#include +#include + +#include + +static versal_uart_context versal_uart_instances[2] = { + { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Versal UART 0" ), + .regs = (volatile struct versal_uart *) 0xff000000, + .irq = VERSAL_IRQ_UART_0 + }, { + .base = RTEMS_TERMIOS_DEVICE_CONTEXT_INITIALIZER( "Versal UART 1" ), + .regs = (volatile struct versal_uart *) 0xff010000, + .irq = VERSAL_IRQ_UART_1 + } +}; + +rtems_status_code console_initialize( + rtems_device_major_number major, + rtems_device_minor_number minor, + void *arg +) +{ + size_t i; + + rtems_termios_initialize(); + + for (i = 0; i < RTEMS_ARRAY_SIZE(versal_uart_instances); ++i) { + char uart[] = "/dev/ttySX"; + + uart[sizeof(uart) - 2] = (char) ('0' + i); + rtems_termios_device_install( + &uart[0], + &versal_uart_handler, + NULL, + &versal_uart_instances[i].base + ); + + if (i == BSP_CONSOLE_MINOR) { + link(&uart[0], CONSOLE_DEVICE_NAME); + } + } + + return RTEMS_SUCCESSFUL; +} + +void versal_debug_console_flush(void) +{ + versal_uart_reset_tx_flush(&versal_uart_instances[BSP_CONSOLE_MINOR].base); +} + +static void versal_debug_console_out(char c) +{ + rtems_termios_device_context *base = + &versal_uart_instances[BSP_CONSOLE_MINOR].base; + + versal_uart_write_polled(base, c); +} + +static void versal_debug_console_init(void) +{ + rtems_termios_device_context *base = + &versal_uart_instances[BSP_CONSOLE_MINOR].base; + + (void) versal_uart_initialize(base); + BSP_output_char = versal_debug_console_out; +} + +static void versal_debug_console_early_init(char c) +{ + rtems_termios_device_context *base = + &versal_uart_instances[BSP_CONSOLE_MINOR].base; + + (void) versal_uart_initialize(base); + BSP_output_char = versal_debug_console_out; + versal_debug_console_out(c); +} + +static int versal_debug_console_in(void) +{ + rtems_termios_device_context *base = + &versal_uart_instances[BSP_CONSOLE_MINOR].base; + + return versal_uart_read_polled(base); +} + +BSP_output_char_function_type BSP_output_char = versal_debug_console_early_init; + +BSP_polling_getchar_function_type BSP_poll_char = versal_debug_console_in; + +RTEMS_SYSINIT_ITEM( + versal_debug_console_init, + RTEMS_SYSINIT_BSP_START, + RTEMS_SYSINIT_ORDER_LAST_BUT_5 +); diff --git a/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c new file mode 100644 index 0000000000..be46c99efd --- /dev/null +++ b/bsps/aarch64/xilinx-versal/dev/serial/versal-uart-polled.c @@ -0,0 +1,228 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +#include + +static inline volatile versal_uart *versal_uart_get_regs( + rtems_termios_device_context *base +) +{ + versal_uart_context *ctx = (versal_uart_context *) base; + return ctx->regs; +} + +/* + * Make weak and let the user override. + */ +uint32_t versal_uart_input_clock(void) __attribute__ ((weak)); + +uint32_t versal_uart_input_clock(void) +{ + return VERSAL_CLOCK_UART; +} + +int32_t versal_cal_baud_rate( + uint32_t baudrate, + uint32_t maxerror, + uint32_t *ibdiv, + uint32_t *fbdiv +) +{ + uint32_t calcbaudrate; + uint32_t bauderror; + uint32_t percenterror; + uint32_t fbdivrnd; + uint32_t inputclk = versal_uart_input_clock(); + + /* + * The baud rate cannot be larger than the UART clock / 16. + */ + if ((baudrate * 16) > inputclk) { + return -1; + } + + /* + * The UART clock cannot be larger than 16*65535*baudrate. + * Could maybe use an estimate (inputclk / 2**16) to save a division. + * This invariant gets checked below, by ensuring ibdiv < 2**16. + */ + + /* + * The UART clock cannot be more than 5/3 times faster than the LPD_LSBUS_CLK + * - TODO? + */ + + /* + * The baud rate divisor is a 16-bit integer and 6-bit fractional part. + * It is equal to the UART clock / (16 * baudrate). + */ + *ibdiv = inputclk / 16 / baudrate; + if ( *ibdiv > 1<<16 ) { + return -1; + } + + /* + * Find the fractional part. This can overflow with 32-bit arithmetic if + * inputclk > 536870911, so use 64-bit. Unfortunately, this means we have + * two 64-bit divisions here. + */ + fbdivrnd = ((((uint64_t)inputclk / 16) << 7) / baudrate) & 0x1; + *fbdiv = (((((uint64_t)inputclk / 16) << 6) / baudrate) & 0x3F) + fbdivrnd; + + /* + * calculate the baudrate and check if the error is too large. + */ + calcbaudrate = (((uint64_t)inputclk / 16) << 6) / ((*ibdiv << 6) | *fbdiv); + + if (baudrate > calcbaudrate) { + bauderror = baudrate - calcbaudrate; + } else { + bauderror = calcbaudrate - baudrate; + } + + percenterror = (bauderror * 100) / baudrate; + + if (maxerror < percenterror) { + return -1; + } + + return 0; +} + +int versal_uart_initialize(rtems_termios_device_context *base) +{ + volatile versal_uart *regs = versal_uart_get_regs(base); + uint32_t maxerr = 3; + uint32_t ibauddiv = 0; + uint32_t fbauddiv = 0; + int rv; + + versal_uart_reset_tx_flush(base); + + rv = versal_cal_baud_rate( + VERSAL_UART_DEFAULT_BAUD, + maxerr, + &ibauddiv, + &fbauddiv + ); + + if ( rv < 0 ) { + return rv; + } + + /* Line control: 8-bit word length, no parity, no FIFO, 1 stop bit */ + regs->uartlcr_h = VERSAL_UARTLCR_H_WLEN( VERSAL_UARTLCR_H_WLEN_8 ); + + /* Control: receive, transmit, uart enable, no CTS, no RTS, no loopback */ + regs->uartcr = VERSAL_UARTCR_RXE + | VERSAL_UARTCR_TXE + | VERSAL_UARTCR_UARTEN; + + regs->uartibrd = VERSAL_UARTIBRD_BAUD_DIVINT(ibauddiv); + regs->uartfbrd = VERSAL_UARTFBRD_BAUD_DIVFRAC(fbauddiv); + + return 0; +} + +static bool versal_uart_first_open( + struct rtems_termios_tty *tty, + rtems_termios_device_context *base, + struct termios *term, + rtems_libio_open_close_args_t *args +) +{ + int rc = versal_uart_initialize(base); + if ( rc < 0 ) { + return false; + } + + rtems_termios_set_initial_baud(tty, VERSAL_UART_DEFAULT_BAUD); + + return true; +} + +int versal_uart_read_polled(rtems_termios_device_context *base) +{ + volatile versal_uart *regs = versal_uart_get_regs(base); + + if ((regs->uartfr & VERSAL_UARTFR_RXFE) != 0) { + return -1; + } else { + return VERSAL_UARTDR_DATA_GET(regs->uartdr); + } +} + +void versal_uart_write_polled( + rtems_termios_device_context *base, + char c +) +{ + volatile versal_uart *regs = versal_uart_get_regs(base); + + while ((regs->uartfr & VERSAL_UARTFR_TXFF) != 0) { + /* Wait while full */ + } + + regs->uartdr = VERSAL_UARTDR_DATA(c); +} + +void versal_uart_reset_tx_flush(rtems_termios_device_context *base) +{ + volatile versal_uart *regs = versal_uart_get_regs(base); + int c = 4; + + while (c-- > 0) + versal_uart_write_polled(base, '\r'); + + while ((regs->uartfr & VERSAL_UARTFR_TXFE) == 0) { + /* Wait for empty */ + } +} + +static void versal_uart_write_support( + rtems_termios_device_context *base, + const char *s, + size_t n +) +{ + size_t i; + + for (i = 0; i < n; i++) { + versal_uart_write_polled(base, s[i]); + } +} + +const rtems_termios_device_handler versal_uart_handler = { + .first_open = versal_uart_first_open, + .write = versal_uart_write_support, + .poll_read = versal_uart_read_polled, + .mode = TERMIOS_POLLED +}; + diff --git a/bsps/aarch64/xilinx-versal/include/bsp.h b/bsps/aarch64/xilinx-versal/include/bsp.h new file mode 100644 index 0000000000..2017e10ade --- /dev/null +++ b/bsps/aarch64/xilinx-versal/include/bsp.h @@ -0,0 +1,81 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This header file provides the core BSP definitions + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_AARCH64_XILINX_VERSAL_BSP_H +#define LIBBSP_AARCH64_XILINX_VERSAL_BSP_H + +/** + * @addtogroup RTEMSBSPsAArch64 + * + * @{ + */ + +#include + +#ifndef ASM + +#include +#include + +#include + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define BSP_ARM_GIC_CPUIF_BASE 0xf9040000 +#define BSP_ARM_GIC_DIST_BASE 0xf9000000 +#define BSP_ARM_GIC_REDIST_BASE 0xf9080000 + +#define BSP_RESET_SMC + +/** + * @brief Versal specific set up of the MMU. + * + * Provide in the application to override the defaults in the BSP. + */ +BSP_START_TEXT_SECTION void versal_setup_mmu_and_cache(void); + +void versal_debug_console_flush(void); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +/** @} */ + +#endif /* LIBBSP_AARCH64_XILINX_VERSAL_BSP_H */ diff --git a/bsps/aarch64/xilinx-versal/include/bsp/irq.h b/bsps/aarch64/xilinx-versal/include/bsp/irq.h new file mode 100644 index 0000000000..ec39b727d9 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/include/bsp/irq.h @@ -0,0 +1,70 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This header file provides the BSP's IRQ definitions. + */ + +/* + * Copyright (C) Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H +#define LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H + +#ifndef ASM + +#include +#include + +#include + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#define BSP_INTERRUPT_VECTOR_COUNT 1024 + +/* Interrupts vectors */ +#define BSP_TIMER_VIRT_PPI 27 +#define BSP_TIMER_PHYS_NS_PPI 30 +#define VERSAL_IRQ_UART_0 50 +#define VERSAL_IRQ_UART_1 51 +#define VERSAL_IRQ_ETHERNET_0 88 +#define VERSAL_IRQ_ETHERNET_0_WAKEUP 89 +#define VERSAL_IRQ_ETHERNET_1 90 +#define VERSAL_IRQ_ETHERNET_1_WAKEUP 91 + +/** @} */ + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* ASM */ + +#endif /* LIBBSP_AARCH64_XILINX_VERSAL_IRQ_H */ diff --git a/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h new file mode 100644 index 0000000000..59db8f950a --- /dev/null +++ b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart-regs.h @@ -0,0 +1,141 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup versal_uart_regs + * + * @brief Xilinx Versal UART register definitions. + * + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +/** + * @defgroup versal_uart_regs Xilinx Versal UART Register Definitions + * @ingroup versal + * @brief Xilinx Versal UART Register Definitions + * @{ + */ + +#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H +#define LIBBSP_ARM_XILINX_VERSAL_UART_REGS_H + +#include + +#define VERSAL_UART_FIFO_DEPTH 64 + +typedef struct versal_uart { + uint32_t uartdr; +#define VERSAL_UARTDR_OE BSP_BIT32(11) +#define VERSAL_UARTDR_BE BSP_BIT32(10) +#define VERSAL_UARTDR_PE BSP_BIT32(9) +#define VERSAL_UARTDR_FE BSP_BIT32(8) +#define VERSAL_UARTDR_DATA(val) BSP_FLD32(val, 0, 7) +#define VERSAL_UARTDR_DATA_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define VERSAL_UARTDR_DATA_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t uartrsr_uartecr; +#define VERSAL_UARTRSR_UARTECR_OE BSP_BIT32(3) +#define VERSAL_UARTRSR_UARTECR_BE BSP_BIT32(2) +#define VERSAL_UARTRSR_UARTECR_PE BSP_BIT32(1) +#define VERSAL_UARTRSR_UARTECR_FE BSP_BIT32(0) + uint32_t reserved_08[4]; + uint32_t uartfr; +#define VERSAL_UARTFR_RI BSP_BIT32(8) +#define VERSAL_UARTFR_TXFE BSP_BIT32(7) +#define VERSAL_UARTFR_RXFF BSP_BIT32(6) +#define VERSAL_UARTFR_TXFF BSP_BIT32(5) +#define VERSAL_UARTFR_RXFE BSP_BIT32(4) +#define VERSAL_UARTFR_BUSY BSP_BIT32(3) +#define VERSAL_UARTFR_DCD BSP_BIT32(2) +#define VERSAL_UARTFR_DSR BSP_BIT32(1) +#define VERSAL_UARTFR_CTS BSP_BIT32(0) + uint32_t reserved_1c; + uint32_t uartilpr; +#define VERSAL_UARTILPR_ILPDVSR(val) BSP_FLD32(val, 0, 7) +#define VERSAL_UARTILPR_ILPDVSR_GET(reg) BSP_FLD32GET(reg, 0, 7) +#define VERSAL_UARTILPR_ILPDVSR_SET(reg, val) BSP_FLD32SET(reg, val, 0, 7) + uint32_t uartibrd; +#define VERSAL_UARTIBRD_BAUD_DIVINT(val) BSP_FLD32(val, 0, 15) +#define VERSAL_UARTIBRD_BAUD_DIVINT_GET(reg) BSP_FLD32GET(reg, 0, 15) +#define VERSAL_UARTIBRD_BAUD_DIVINT_SET(reg, val) BSP_FLD32SET(reg, val, 0, 15) + uint32_t uartfbrd; +#define VERSAL_UARTFBRD_BAUD_DIVFRAC(val) BSP_FLD32(val, 0, 5) +#define VERSAL_UARTFBRD_BAUD_DIVFRAC_GET(reg) BSP_FLD32GET(reg, 0, 5) +#define VERSAL_UARTFBRD_BAUD_DIVFRAC_SET(reg, val) BSP_FLD32SET(reg, val, 0, 5) + uint32_t uartlcr_h; +#define VERSAL_UARTLCR_H_SPS BSP_BIT32(7) +#define VERSAL_UARTLCR_H_WLEN(val) BSP_FLD32(val, 5, 6) +#define VERSAL_UARTLCR_H_WLEN_GET(reg) BSP_FLD32GET(reg, 5, 6) +#define VERSAL_UARTLCR_H_WLEN_SET(reg, val) BSP_FLD32SET(reg, val, 5, 6) +#define VERSAL_UARTLCR_H_WLEN_5 0x00U +#define VERSAL_UARTLCR_H_WLEN_6 0x01U +#define VERSAL_UARTLCR_H_WLEN_7 0x02U +#define VERSAL_UARTLCR_H_WLEN_8 0x03U +#define VERSAL_UARTLCR_H_FEN BSP_BIT32(4) +#define VERSAL_UARTLCR_H_STP2 BSP_BIT32(3) +#define VERSAL_UARTLCR_H_EPS BSP_BIT32(2) +#define VERSAL_UARTLCR_H_PEN BSP_BIT32(1) +#define VERSAL_UARTLCR_H_BRK BSP_BIT32(0) + uint32_t uartcr; +#define VERSAL_UARTCR_CTSEN BSP_BIT32(15) +#define VERSAL_UARTCR_RTSEN BSP_BIT32(14) +#define VERSAL_UARTCR_OUT2 BSP_BIT32(13) +#define VERSAL_UARTCR_OUT1 BSP_BIT32(12) +#define VERSAL_UARTCR_RTS BSP_BIT32(11) +#define VERSAL_UARTCR_DTR BSP_BIT32(10) +#define VERSAL_UARTCR_RXE BSP_BIT32(9) +#define VERSAL_UARTCR_TXE BSP_BIT32(8) +#define VERSAL_UARTCR_LBE BSP_BIT32(7) +//#define VERSAL_UARTCR_SIREN BSP_BIT32()? +#define VERSAL_UARTCR_UARTEN BSP_BIT32(0) + uint32_t uartifls; +#define VERSAL_UARTIFLS_RXIFLSEL(val) BSP_FLD32(val, 3, 5) +#define VERSAL_UARTIFLS_RXIFLSEL_GET(reg) BSP_FLD32GET(reg, 3, 5) +#define VERSAL_UARTIFLS_RXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 3, 5) +#define VERSAL_UARTIFLS_TXIFLSEL(val) BSP_FLD32(val, 0, 2) +#define VERSAL_UARTIFLS_TXIFLSEL_GET(reg) BSP_FLD32GET(reg, 0, 2) +#define VERSAL_UARTIFLS_TXIFLSEL_SET(reg, val) BSP_FLD32SET(reg, val, 0, 2) + uint32_t uartimsc; + uint32_t uartris; + uint32_t uartmis; + uint32_t uarticr; +#define VERSAL_UARTI_OEI BSP_BIT32(10) +#define VERSAL_UARTI_BEI BSP_BIT32(9) +#define VERSAL_UARTI_PEI BSP_BIT32(8) +#define VERSAL_UARTI_FEI BSP_BIT32(7) +#define VERSAL_UARTI_RTI BSP_BIT32(6) +#define VERSAL_UARTI_TXI BSP_BIT32(5) +#define VERSAL_UARTI_RXI BSP_BIT32(4) +#define VERSAL_UARTI_DSRMI BSP_BIT32(3) +#define VERSAL_UARTI_DCDMI BSP_BIT32(2) +#define VERSAL_UARTI_CTSMI BSP_BIT32(1) +#define VERSAL_UARTI_RIMI BSP_BIT32(0) +} versal_uart; + +/** @} */ + +#endif /* LIBBSP_ARM_XILINX_ZYNQ_UART_REGS_H */ diff --git a/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h new file mode 100644 index 0000000000..95b5172218 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/include/dev/serial/versal-uart.h @@ -0,0 +1,90 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup versal_uart + * + * @brief Xilinx Versal UART support. + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef LIBBSP_ARM_XILINX_VERSAL_UART_H +#define LIBBSP_ARM_XILINX_VERSAL_UART_H + +#include + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +/** + * @defgroup versal_uart Xilinx Versal UART Support + * @ingroup RTEMSBSPsARMVersal + * @brief UART Support + * + * This driver operates an instance of the Xilinx UART present in the + * family of Xilinx Versal SoCs. + */ + +typedef struct { + rtems_termios_device_context base; + volatile struct versal_uart *regs; + bool transmitting; /* Currently unused */ + rtems_vector_number irq; +} versal_uart_context; + +extern const rtems_termios_device_handler versal_uart_handler; + +#define VERSAL_UART_DEFAULT_BAUD 115200 + +int versal_uart_initialize(rtems_termios_device_context *base); + +int versal_uart_read_polled(rtems_termios_device_context *base); + +void versal_uart_write_polled( + rtems_termios_device_context *base, + char c +); + +/** + * Flush TX FIFO and wait until it is empty. + */ +void versal_uart_reset_tx_flush(rtems_termios_device_context *base); + +int versal_cal_baud_rate( + uint32_t baudrate, + uint32_t maxerror, + uint32_t* ibdiv, + uint32_t* fbdiv +); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* LIBBSP_ARM_XILINX_VERSAL_UART_H */ diff --git a/bsps/aarch64/xilinx-versal/include/tm27.h b/bsps/aarch64/xilinx-versal/include/tm27.h new file mode 100644 index 0000000000..acf26a255d --- /dev/null +++ b/bsps/aarch64/xilinx-versal/include/tm27.h @@ -0,0 +1,45 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This header file provides functionality for the tm27 test. + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _RTEMS_TMTEST27 +#error "This is an RTEMS internal file you must not include directly." +#endif + +#ifndef __tm27_h +#define __tm27_h + +#include + +#endif /* __tm27_h */ diff --git a/bsps/aarch64/xilinx-versal/start/bspstart.c b/bsps/aarch64/xilinx-versal/start/bspstart.c new file mode 100644 index 0000000000..2f0048ddf3 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/start/bspstart.c @@ -0,0 +1,48 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This source file contains the implementation of bsp_start(). + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include +#include + +void bsp_start( void ) +{ + bsp_interrupt_initialize(); + rtems_cache_coherent_add_area( + bsp_section_nocacheheap_begin, + (uintptr_t) bsp_section_nocacheheap_size + ); +} diff --git a/bsps/aarch64/xilinx-versal/start/bspstarthooks.c b/bsps/aarch64/xilinx-versal/start/bspstarthooks.c new file mode 100644 index 0000000000..be98675a24 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/start/bspstarthooks.c @@ -0,0 +1,51 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This source file contains the implementation of this BSP's startup + * hooks. + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include + +BSP_START_TEXT_SECTION void bsp_start_hook_0(void) +{ + /* Do nothing */ +} + +BSP_START_TEXT_SECTION void bsp_start_hook_1(void) +{ + AArch64_start_set_vector_base(); + bsp_start_copy_sections(); + versal_setup_mmu_and_cache(); + bsp_start_clear_bss(); +} diff --git a/bsps/aarch64/xilinx-versal/start/bspstartmmu.c b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c new file mode 100644 index 0000000000..6ab33cc4f1 --- /dev/null +++ b/bsps/aarch64/xilinx-versal/start/bspstartmmu.c @@ -0,0 +1,77 @@ +/* SPDX-License-Identifier: BSD-2-Clause */ + +/** + * @file + * + * @ingroup RTEMSBSPsAArch64XilinxVersal + * + * @brief This source file contains the default MMU tables and setup. + */ + +/* + * Copyright (C) 2021 Gedare Bloom + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +BSP_START_DATA_SECTION static const aarch64_mmu_config_entry +versal_mmu_config_table[] = { + AARCH64_MMU_DEFAULT_SECTIONS, + { /* APU GIC */ + .begin = 0xf9000000U, + .end = 0xf90c0000U, + .flags = AARCH64_MMU_DEVICE + }, { /* FPD CSRs */ + .begin = 0xfd000000U, + .end = 0xfe000000U, + .flags = AARCH64_MMU_DEVICE + }, { /* LPD CSRs */ + .begin = 0xfe000000U, + .end = 0xfe800000U, + .flags = AARCH64_MMU_DEVICE + }, { /* LPD IOP CSRs and LPD peripherals */ + .begin = 0xff000000U, + .end = 0xffc00000U, + .flags = AARCH64_MMU_DEVICE + } +}; + +/* + * Make weak and let the user override. + */ +BSP_START_TEXT_SECTION void +versal_setup_mmu_and_cache( void ) __attribute__ ((weak)); + +BSP_START_TEXT_SECTION void +versal_setup_mmu_and_cache( void ) +{ + aarch64_mmu_setup(); + + aarch64_mmu_setup_translation_table_and_enable( + &versal_mmu_config_table[ 0 ], + RTEMS_ARRAY_SIZE( versal_mmu_config_table ) + ); +} -- cgit v1.2.3