From 11cc51ef2788e727deb5f289d59ea602fecc5912 Mon Sep 17 00:00:00 2001 From: Sebastian Huber Date: Thu, 16 Mar 2023 09:00:43 +0100 Subject: bsps/riscv: Use per-CPU mtimecmp in clock driver Use the mtimecmp from the PLIC/CLINT initialization in the clock driver. This register is defined by the device tree and does not assume a fixed mapping. --- bsps/riscv/riscv/clock/clockdrv.c | 41 ++++++++++++++------------------------- 1 file changed, 15 insertions(+), 26 deletions(-) (limited to 'bsps') diff --git a/bsps/riscv/riscv/clock/clockdrv.c b/bsps/riscv/riscv/clock/clockdrv.c index 28222c69db..6d70419a5c 100644 --- a/bsps/riscv/riscv/clock/clockdrv.c +++ b/bsps/riscv/riscv/clock/clockdrv.c @@ -8,7 +8,7 @@ */ /* - * Copyright (c) 2018 embedded brains GmbH + * Copyright (c) 2018, 2023 embedded brains GmbH * COPYRIGHT (c) 2015 Hesham Alatary * * Redistribution and use in source and binary forms, with or without @@ -41,6 +41,7 @@ #include #include #include +#include #include #include @@ -92,18 +93,16 @@ static uint64_t riscv_clock_read_mtime(volatile RISCV_CLINT_timer_reg *mtime) static void riscv_clock_at_tick(riscv_timecounter *tc) { - volatile RISCV_CLINT_regs *clint; + Per_CPU_Control *cpu_self; + volatile RISCV_CLINT_timer_reg *mtimecmp; uint64_t value; - uint32_t cpu = rtems_scheduler_get_processor(); - - cpu = _RISCV_Map_cpu_index_to_hardid(cpu); - - clint = tc->clint; - value = clint->mtimecmp[cpu].val_64; + cpu_self = _Per_CPU_Get(); + mtimecmp = cpu_self->cpu_per_cpu.clint_mtimecmp; + value = mtimecmp->val_64; value += tc->interval; - riscv_clock_write_mtimecmp(&clint->mtimecmp[cpu], value); + riscv_clock_write_mtimecmp(mtimecmp, value); } static void riscv_clock_handler_install(void) @@ -153,16 +152,12 @@ static uint32_t riscv_clock_get_timebase_frequency(const void *fdt) return fdt32_to_cpu(*val); } -static void riscv_clock_clint_init( - volatile RISCV_CLINT_regs *clint, - uint64_t cmpval, - uint32_t cpu -) +static void riscv_clock_clint_init(uint64_t cmpval) { - riscv_clock_write_mtimecmp( - &clint->mtimecmp[cpu], - cmpval - ); + Per_CPU_Control *cpu_self; + + cpu_self = _Per_CPU_Get(); + riscv_clock_write_mtimecmp(cpu_self->cpu_per_cpu.clint_mtimecmp, cmpval); /* Enable mtimer interrupts */ set_csr(mie, MIP_MTIP); @@ -171,13 +166,7 @@ static void riscv_clock_clint_init( #if defined(RTEMS_SMP) && !defined(CLOCK_DRIVER_USE_ONLY_BOOT_PROCESSOR) static void riscv_clock_secondary_action(void *arg) { - volatile RISCV_CLINT_regs *clint = riscv_clint; - uint64_t *cmpval = arg; - uint32_t cpu = _CPU_SMP_Get_current_processor(); - - cpu = _RISCV_Map_cpu_index_to_hardid(cpu); - - riscv_clock_clint_init(clint, *cmpval, cpu); + riscv_clock_clint_init(*(uint64_t *) arg); } #endif @@ -219,7 +208,7 @@ static void riscv_clock_initialize(void) cmpval = riscv_clock_read_mtime(&clint->mtime); cmpval += interval; - riscv_clock_clint_init(clint, cmpval, RISCV_BOOT_HARTID); + riscv_clock_clint_init(cmpval); riscv_clock_secondary_initialization(clint, cmpval, interval); /* Initialize timecounter */ -- cgit v1.2.3